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wdenk71f95112003-06-15 22:40:42 +00001/*
Jerry Huang4a6ee172010-11-25 17:06:07 +00002 * Copyright 2008,2010 Freescale Semiconductor, Inc
Andy Fleming272cc702008-10-30 16:41:01 -05003 * Andy Fleming
4 *
5 * Based (loosely) on the Linux code
wdenk71f95112003-06-15 22:40:42 +00006 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
wdenk71f95112003-06-15 22:40:42 +00008 */
9
10#ifndef _MMC_H_
11#define _MMC_H_
wdenk71f95112003-06-15 22:40:42 +000012
Andy Fleming272cc702008-10-30 16:41:01 -050013#include <linux/list.h>
Peng Fan3697e592016-09-01 11:13:38 +080014#include <linux/sizes.h>
Lad, Prabhakar0d986e62012-06-24 21:35:20 +000015#include <linux/compiler.h>
Mateusz Zalega07a2d422014-04-30 13:04:15 +020016#include <part.h>
Andy Fleming272cc702008-10-30 16:41:01 -050017
Pantelis Antoniou4b7cee52015-01-23 12:12:01 +020018/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
19#define SD_VERSION_SD (1U << 31)
20#define MMC_VERSION_MMC (1U << 30)
21
22#define MAKE_SDMMC_VERSION(a, b, c) \
23 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
24#define MAKE_SD_VERSION(a, b, c) \
25 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
26#define MAKE_MMC_VERSION(a, b, c) \
27 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
28
29#define EXTRACT_SDMMC_MAJOR_VERSION(x) \
30 (((u32)(x) >> 16) & 0xff)
31#define EXTRACT_SDMMC_MINOR_VERSION(x) \
32 (((u32)(x) >> 8) & 0xff)
33#define EXTRACT_SDMMC_CHANGE_VERSION(x) \
34 ((u32)(x) & 0xff)
35
36#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
37#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
38#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
39#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
40
41#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
42#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
43#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
44#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
45#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
46#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
47#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
48#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
49#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
50#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
51#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
52#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
Stefan Wahren1a3619c2016-06-16 17:54:06 +000053#define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
Andy Fleming272cc702008-10-30 16:41:01 -050054
Jaehoon Chung8caf46d2014-05-16 13:59:53 +090055#define MMC_MODE_HS (1 << 0)
56#define MMC_MODE_HS_52MHz (1 << 1)
57#define MMC_MODE_4BIT (1 << 2)
58#define MMC_MODE_8BIT (1 << 3)
59#define MMC_MODE_SPI (1 << 4)
Rob Herring5a203972015-03-23 17:56:59 -050060#define MMC_MODE_DDR_52MHz (1 << 5)
Ɓukasz Majewski62722032012-03-12 22:07:18 +000061
Andy Fleming272cc702008-10-30 16:41:01 -050062#define SD_DATA_4BIT 0x00040000
63
Pantelis Antoniou4b7cee52015-01-23 12:12:01 +020064#define IS_SD(x) ((x)->version & SD_VERSION_SD)
Andrew Gabbasov3f2da752015-03-19 07:44:02 -050065#define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
Andy Fleming272cc702008-10-30 16:41:01 -050066
67#define MMC_DATA_READ 1
68#define MMC_DATA_WRITE 2
69
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020070#define MMC_CMD_GO_IDLE_STATE 0
71#define MMC_CMD_SEND_OP_COND 1
72#define MMC_CMD_ALL_SEND_CID 2
73#define MMC_CMD_SET_RELATIVE_ADDR 3
74#define MMC_CMD_SET_DSR 4
Andy Fleming272cc702008-10-30 16:41:01 -050075#define MMC_CMD_SWITCH 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020076#define MMC_CMD_SELECT_CARD 7
Andy Fleming272cc702008-10-30 16:41:01 -050077#define MMC_CMD_SEND_EXT_CSD 8
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020078#define MMC_CMD_SEND_CSD 9
79#define MMC_CMD_SEND_CID 10
Andy Fleming272cc702008-10-30 16:41:01 -050080#define MMC_CMD_STOP_TRANSMISSION 12
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020081#define MMC_CMD_SEND_STATUS 13
82#define MMC_CMD_SET_BLOCKLEN 16
83#define MMC_CMD_READ_SINGLE_BLOCK 17
84#define MMC_CMD_READ_MULTIPLE_BLOCK 18
Pierre Aubert91fdabc2014-04-24 10:30:06 +020085#define MMC_CMD_SET_BLOCK_COUNT 23
Andy Fleming272cc702008-10-30 16:41:01 -050086#define MMC_CMD_WRITE_SINGLE_BLOCK 24
87#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
Lei Wene6f99a52011-06-22 17:03:31 +000088#define MMC_CMD_ERASE_GROUP_START 35
89#define MMC_CMD_ERASE_GROUP_END 36
90#define MMC_CMD_ERASE 38
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020091#define MMC_CMD_APP_CMD 55
Thomas Choud52ebf12010-12-24 13:12:21 +000092#define MMC_CMD_SPI_READ_OCR 58
93#define MMC_CMD_SPI_CRC_ON_OFF 59
Amar3690d6d2013-04-27 11:42:58 +053094#define MMC_CMD_RES_MAN 62
95
96#define MMC_CMD62_ARG1 0xefac62ec
97#define MMC_CMD62_ARG2 0xcbaea7
98
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020099
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200100#define SD_CMD_SEND_RELATIVE_ADDR 3
Andy Fleming272cc702008-10-30 16:41:01 -0500101#define SD_CMD_SWITCH_FUNC 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200102#define SD_CMD_SEND_IF_COND 8
Otavio Salvadorf022d362015-02-17 10:42:43 -0200103#define SD_CMD_SWITCH_UHS18V 11
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200104
105#define SD_CMD_APP_SET_BUS_WIDTH 6
Peng Fan3697e592016-09-01 11:13:38 +0800106#define SD_CMD_APP_SD_STATUS 13
Lei Wene6f99a52011-06-22 17:03:31 +0000107#define SD_CMD_ERASE_WR_BLK_START 32
108#define SD_CMD_ERASE_WR_BLK_END 33
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200109#define SD_CMD_APP_SEND_OP_COND 41
Andy Fleming272cc702008-10-30 16:41:01 -0500110#define SD_CMD_APP_SEND_SCR 51
111
112/* SCR definitions in different words */
113#define SD_HIGHSPEED_BUSY 0x00020000
114#define SD_HIGHSPEED_SUPPORTED 0x00020000
115
Thomas Chouabe2c932011-04-19 03:48:31 +0000116#define OCR_BUSY 0x80000000
117#define OCR_HCS 0x40000000
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000118#define OCR_VOLTAGE_MASK 0x007FFF80
119#define OCR_ACCESS_MODE 0x60000000
Andy Fleming272cc702008-10-30 16:41:01 -0500120
Eric Nelson1aa2d072015-12-07 07:50:01 -0700121#define MMC_ERASE_ARG 0x00000000
122#define MMC_SECURE_ERASE_ARG 0x80000000
123#define MMC_TRIM_ARG 0x00000001
124#define MMC_DISCARD_ARG 0x00000003
125#define MMC_SECURE_TRIM1_ARG 0x80000001
126#define MMC_SECURE_TRIM2_ARG 0x80008000
Lei Wene6f99a52011-06-22 17:03:31 +0000127
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000128#define MMC_STATUS_MASK (~0x0206BF7F)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500129#define MMC_STATUS_SWITCH_ERROR (1 << 7)
Thomas Chouabe2c932011-04-19 03:48:31 +0000130#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
131#define MMC_STATUS_CURR_STATE (0xf << 9)
Thomas Choued018b22011-04-19 03:48:32 +0000132#define MMC_STATUS_ERROR (1 << 19)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000133
Jan Kloetzked617c422012-02-05 22:29:12 +0000134#define MMC_STATE_PRG (7 << 9)
135
Andy Fleming272cc702008-10-30 16:41:01 -0500136#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
137#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
138#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
139#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
140#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
141#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
142#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
143#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
144#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
145#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
146#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
147#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
148#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
149#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
150#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
151#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
152#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
153
154#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
155#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
156 addressed by index which are
157 1 in value field */
158#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
159 addressed by index, which are
160 1 in value field */
161#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
162
163#define SD_SWITCH_CHECK 0
164#define SD_SWITCH_SWITCH 1
165
166/*
167 * EXT_CSD fields
168 */
Diego Santa Cruza7f852b2014-12-23 10:50:22 +0100169#define EXT_CSD_ENH_START_ADDR 136 /* R/W */
170#define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
Stephen Warrenf866a462013-06-11 15:14:01 -0600171#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
Markus Niebeld7b29122014-11-18 15:11:42 +0100172#define EXT_CSD_PARTITION_SETTING 155 /* R/W */
Oliver Metz1937e5a2013-10-01 20:32:07 +0200173#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100174#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
Lei Wen0560db12011-10-03 20:35:10 +0000175#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
Tom Rini33ace362014-02-07 14:15:20 -0500176#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
Tomas Melincd3d4882016-11-25 11:01:03 +0200177#define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100178#define EXT_CSD_WR_REL_PARAM 166 /* R */
179#define EXT_CSD_WR_REL_SET 167 /* R/W */
Stephen Warrenf866a462013-06-11 15:14:01 -0600180#define EXT_CSD_RPMB_MULT 168 /* RO */
Lei Wen0560db12011-10-03 20:35:10 +0000181#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
Amar3690d6d2013-04-27 11:42:58 +0530182#define EXT_CSD_BOOT_BUS_WIDTH 177
Lei Wen0560db12011-10-03 20:35:10 +0000183#define EXT_CSD_PART_CONF 179 /* R/W */
184#define EXT_CSD_BUS_WIDTH 183 /* R/W */
185#define EXT_CSD_HS_TIMING 185 /* R/W */
186#define EXT_CSD_REV 192 /* RO */
187#define EXT_CSD_CARD_TYPE 196 /* RO */
188#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
Stephen Warrenf866a462013-06-11 15:14:01 -0600189#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
Lei Wen0560db12011-10-03 20:35:10 +0000190#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
Stephen Warren8948ea82012-07-30 10:55:43 +0000191#define EXT_CSD_BOOT_MULT 226 /* RO */
Tomas Melincd3d4882016-11-25 11:01:03 +0200192#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
Andy Fleming272cc702008-10-30 16:41:01 -0500193
194/*
195 * EXT_CSD field definitions
196 */
197
Thomas Chouabe2c932011-04-19 03:48:31 +0000198#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
199#define EXT_CSD_CMD_SET_SECURE (1 << 1)
200#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
Andy Fleming272cc702008-10-30 16:41:01 -0500201
Thomas Chouabe2c932011-04-19 03:48:31 +0000202#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
203#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900204#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
205#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
206#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
207 | EXT_CSD_CARD_TYPE_DDR_1_2V)
Andy Fleming272cc702008-10-30 16:41:01 -0500208
209#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
210#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
211#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900212#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
213#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200214
Amar3690d6d2013-04-27 11:42:58 +0530215#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
216#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
217#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
218#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
219
220#define EXT_CSD_BOOT_ACK(x) (x << 6)
221#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
222#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
223
Tom Rini5a99b9d2014-02-05 10:24:22 -0500224#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
225#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
226#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
Amar3690d6d2013-04-27 11:42:58 +0530227
Markus Niebeld7b29122014-11-18 15:11:42 +0100228#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
229
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100230#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
231#define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
232
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100233#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
234
235#define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
236#define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
237
Andy Fleming1de97f92008-10-30 16:31:39 -0500238#define R1_ILLEGAL_COMMAND (1 << 22)
239#define R1_APP_CMD (1 << 5)
240
Andy Fleming272cc702008-10-30 16:41:01 -0500241#define MMC_RSP_PRESENT (1 << 0)
Thomas Chouabe2c932011-04-19 03:48:31 +0000242#define MMC_RSP_136 (1 << 1) /* 136 bit response */
243#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
244#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
245#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
Andy Fleming272cc702008-10-30 16:41:01 -0500246
Thomas Chouabe2c932011-04-19 03:48:31 +0000247#define MMC_RSP_NONE (0)
248#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500249#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
250 MMC_RSP_BUSY)
Thomas Chouabe2c932011-04-19 03:48:31 +0000251#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
252#define MMC_RSP_R3 (MMC_RSP_PRESENT)
253#define MMC_RSP_R4 (MMC_RSP_PRESENT)
254#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
255#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
256#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500257
Lei Wenbc897b12011-05-02 16:26:26 +0000258#define MMCPART_NOAVAILABLE (0xff)
259#define PART_ACCESS_MASK (0x7)
260#define PART_SUPPORT (0x1)
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100261#define ENHNCD_SUPPORT (0x2)
Oliver Metz1937e5a2013-10-01 20:32:07 +0200262#define PART_ENH_ATTRIB (0x1f)
wdenk71f95112003-06-15 22:40:42 +0000263
Simon Glass8bfa1952013-04-03 08:54:30 +0000264/* Maximum block size for MMC */
265#define MMC_MAX_BLOCK_LEN 512
266
Amar3690d6d2013-04-27 11:42:58 +0530267/* The number of MMC physical partitions. These consist of:
268 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
269 */
270#define MMC_NUM_BOOT_PARTITION 2
Pierre Aubert91fdabc2014-04-24 10:30:06 +0200271#define MMC_PART_RPMB 3 /* RPMB partition number */
Amar3690d6d2013-04-27 11:42:58 +0530272
Simon Glasse7ecf7c2015-06-23 15:38:48 -0600273/* Driver model support */
274
275/**
276 * struct mmc_uclass_priv - Holds information about a device used by the uclass
277 */
278struct mmc_uclass_priv {
279 struct mmc *mmc;
280};
281
282/**
283 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
284 *
285 * Provided that the device is already probed and ready for use, this value
286 * will be available.
287 *
288 * @dev: Device
289 * @return associated mmc struct pointer if available, else NULL
290 */
291struct mmc *mmc_get_mmc_dev(struct udevice *dev);
292
293/* End of driver model support */
294
Andy Fleming1de97f92008-10-30 16:31:39 -0500295struct mmc_cid {
296 unsigned long psn;
297 unsigned short oid;
298 unsigned char mid;
299 unsigned char prv;
300 unsigned char mdt;
301 char pnm[7];
302};
303
Andy Fleming272cc702008-10-30 16:41:01 -0500304struct mmc_cmd {
305 ushort cmdidx;
306 uint resp_type;
307 uint cmdarg;
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530308 uint response[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500309};
310
311struct mmc_data {
312 union {
313 char *dest;
314 const char *src; /* src buffers don't get written to */
315 };
316 uint flags;
317 uint blocks;
318 uint blocksize;
319};
320
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200321/* forward decl. */
322struct mmc;
323
Simon Glass8ca51e52016-06-12 23:30:22 -0600324#ifdef CONFIG_DM_MMC_OPS
325struct dm_mmc_ops {
326 /**
327 * send_cmd() - Send a command to the MMC device
328 *
329 * @dev: Device to receive the command
330 * @cmd: Command to send
331 * @data: Additional data to send/receive
332 * @return 0 if OK, -ve on error
333 */
334 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
335 struct mmc_data *data);
336
337 /**
338 * set_ios() - Set the I/O speed/width for an MMC device
339 *
340 * @dev: Device to update
341 * @return 0 if OK, -ve on error
342 */
343 int (*set_ios)(struct udevice *dev);
344
345 /**
346 * get_cd() - See whether a card is present
347 *
348 * @dev: Device to check
349 * @return 0 if not present, 1 if present, -ve on error
350 */
351 int (*get_cd)(struct udevice *dev);
352
353 /**
354 * get_wp() - See whether a card has write-protect enabled
355 *
356 * @dev: Device to check
357 * @return 0 if write-enabled, 1 if write-protected, -ve on error
358 */
359 int (*get_wp)(struct udevice *dev);
360};
361
362#define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
363
364int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
365 struct mmc_data *data);
366int dm_mmc_set_ios(struct udevice *dev);
367int dm_mmc_get_cd(struct udevice *dev);
368int dm_mmc_get_wp(struct udevice *dev);
369
370/* Transition functions for compatibility */
371int mmc_set_ios(struct mmc *mmc);
372int mmc_getcd(struct mmc *mmc);
373int mmc_getwp(struct mmc *mmc);
374
375#else
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200376struct mmc_ops {
377 int (*send_cmd)(struct mmc *mmc,
378 struct mmc_cmd *cmd, struct mmc_data *data);
Jaehoon Chung07b0b9c2016-12-30 15:30:16 +0900379 int (*set_ios)(struct mmc *mmc);
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200380 int (*init)(struct mmc *mmc);
381 int (*getcd)(struct mmc *mmc);
382 int (*getwp)(struct mmc *mmc);
383};
Simon Glass8ca51e52016-06-12 23:30:22 -0600384#endif
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200385
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200386struct mmc_config {
387 const char *name;
Simon Glass8ca51e52016-06-12 23:30:22 -0600388#ifndef CONFIG_DM_MMC_OPS
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200389 const struct mmc_ops *ops;
Simon Glass8ca51e52016-06-12 23:30:22 -0600390#endif
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200391 uint host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -0500392 uint voltages;
Andy Fleming272cc702008-10-30 16:41:01 -0500393 uint f_min;
394 uint f_max;
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200395 uint b_max;
396 unsigned char part_type;
397};
398
Peng Fan3697e592016-09-01 11:13:38 +0800399struct sd_ssr {
400 unsigned int au; /* In sectors */
401 unsigned int erase_timeout; /* In milliseconds */
402 unsigned int erase_offset; /* In milliseconds */
403};
404
Simon Glass8ca51e52016-06-12 23:30:22 -0600405/*
406 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
407 * with mmc_get_mmc_dev().
408 *
409 * TODO struct mmc should be in mmc_private but it's hard to fix right now
410 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200411struct mmc {
Simon Glass33fb2112016-05-01 13:52:41 -0600412#ifndef CONFIG_BLK
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200413 struct list_head link;
Simon Glass33fb2112016-05-01 13:52:41 -0600414#endif
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200415 const struct mmc_config *cfg; /* provided configuration */
416 uint version;
417 void *priv;
418 uint has_init;
Andy Fleming272cc702008-10-30 16:41:01 -0500419 int high_capacity;
420 uint bus_width;
421 uint clock;
422 uint card_caps;
Andy Fleming272cc702008-10-30 16:41:01 -0500423 uint ocr;
Markus Niebelab711882013-12-16 13:40:46 +0100424 uint dsr;
425 uint dsr_imp;
Andy Fleming272cc702008-10-30 16:41:01 -0500426 uint scr[2];
427 uint csd[4];
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530428 uint cid[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500429 ushort rca;
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100430 u8 part_support;
431 u8 part_attr;
Diego Santa Cruz9e41a002014-12-23 10:50:33 +0100432 u8 wr_rel_set;
Tom Rini7ca0d3d2017-05-10 15:20:16 -0400433 u8 part_config;
Andy Fleming272cc702008-10-30 16:41:01 -0500434 uint tran_speed;
435 uint read_bl_len;
436 uint write_bl_len;
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +0100437 uint erase_grp_size; /* in 512-byte sectors */
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +0100438 uint hc_wp_grp_size; /* in 512-byte sectors */
Peng Fan3697e592016-09-01 11:13:38 +0800439 struct sd_ssr ssr; /* SD status register */
Andy Fleming272cc702008-10-30 16:41:01 -0500440 u64 capacity;
Stephen Warrenf866a462013-06-11 15:14:01 -0600441 u64 capacity_user;
442 u64 capacity_boot;
443 u64 capacity_rpmb;
444 u64 capacity_gp[4];
Diego Santa Cruza7f852b2014-12-23 10:50:22 +0100445 u64 enh_user_start;
446 u64 enh_user_size;
Simon Glass33fb2112016-05-01 13:52:41 -0600447#ifndef CONFIG_BLK
Simon Glass4101f682016-02-29 15:25:34 -0700448 struct blk_desc block_dev;
Simon Glass33fb2112016-05-01 13:52:41 -0600449#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +0000450 char op_cond_pending; /* 1 if we are waiting on an op_cond command */
451 char init_in_progress; /* 1 if we have done mmc_start_init() */
452 char preinit; /* start init as early as possible */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600453 int ddr_mode;
Simon Glasscffe5d82016-05-01 13:52:34 -0600454#ifdef CONFIG_DM_MMC
455 struct udevice *dev; /* Device for this MMC controller */
456#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500457};
458
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100459struct mmc_hwpart_conf {
460 struct {
461 uint enh_start; /* in 512-byte sectors */
462 uint enh_size; /* in 512-byte sectors, if 0 no enh area */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100463 unsigned wr_rel_change : 1;
464 unsigned wr_rel_set : 1;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100465 } user;
466 struct {
467 uint size; /* in 512-byte sectors */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100468 unsigned enhanced : 1;
469 unsigned wr_rel_change : 1;
470 unsigned wr_rel_set : 1;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100471 } gp_part[4];
472};
473
474enum mmc_hwpart_conf_mode {
475 MMC_HWPART_CONF_CHECK,
476 MMC_HWPART_CONF_SET,
477 MMC_HWPART_CONF_COMPLETE,
478};
479
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200480struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
Simon Glassad27dd52016-05-01 13:52:40 -0600481
482/**
483 * mmc_bind() - Set up a new MMC device ready for probing
484 *
485 * A child block device is bound with the IF_TYPE_MMC interface type. This
486 * allows the device to be used with CONFIG_BLK
487 *
488 * @dev: MMC device to set up
489 * @mmc: MMC struct
490 * @cfg: MMC configuration
491 * @return 0 if OK, -ve on error
492 */
493int mmc_bind(struct udevice *dev, struct mmc *mmc,
494 const struct mmc_config *cfg);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200495void mmc_destroy(struct mmc *mmc);
Simon Glassad27dd52016-05-01 13:52:40 -0600496
497/**
498 * mmc_unbind() - Unbind a MMC device's child block device
499 *
500 * @dev: MMC device
501 * @return 0 if OK, -ve on error
502 */
503int mmc_unbind(struct udevice *dev);
Andy Fleming272cc702008-10-30 16:41:01 -0500504int mmc_initialize(bd_t *bis);
505int mmc_init(struct mmc *mmc);
506int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
Jerry Huang4a6ee172010-11-25 17:06:07 +0000507void mmc_set_clock(struct mmc *mmc, uint clock);
Andy Fleming272cc702008-10-30 16:41:01 -0500508struct mmc *find_mmc_device(int dev_num);
Steve Sakoman89716962010-07-01 12:12:42 -0700509int mmc_set_dev(int dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500510void print_mmc_devices(char separator);
Kever Yang46683f32016-07-22 17:22:50 +0800511
512/**
513 * get_mmc_num() - get the total MMC device number
514 *
515 * @return 0 if there is no MMC device, else the number of devices
516 */
Lei Wenea6ebe22011-05-02 16:26:25 +0000517int get_mmc_num(void);
Marek Vasutb5b838f2016-12-01 02:06:33 +0100518int mmc_switch_part(struct mmc *mmc, unsigned int part_num);
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100519int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
520 enum mmc_hwpart_conf_mode mode);
Simon Glass8ca51e52016-06-12 23:30:22 -0600521
522#ifndef CONFIG_DM_MMC_OPS
Thierry Reding48972d92012-01-02 01:15:37 +0000523int mmc_getcd(struct mmc *mmc);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200524int board_mmc_getcd(struct mmc *mmc);
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +0000525int mmc_getwp(struct mmc *mmc);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200526int board_mmc_getwp(struct mmc *mmc);
Simon Glass8ca51e52016-06-12 23:30:22 -0600527#endif
528
Markus Niebelab711882013-12-16 13:40:46 +0100529int mmc_set_dsr(struct mmc *mmc, u16 val);
Amar3690d6d2013-04-27 11:42:58 +0530530/* Function to change the size of boot partition and rpmb partitions */
531int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
532 unsigned long rpmbsize);
Tom Rini792970b2014-02-05 10:24:21 -0500533/* Function to modify the PARTITION_CONFIG field of EXT_CSD */
534int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
Tom Rini5a99b9d2014-02-05 10:24:22 -0500535/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
536int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
Tom Rini33ace362014-02-07 14:15:20 -0500537/* Function to modify the RST_n_FUNCTION field of EXT_CSD */
538int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
Pierre Aubert91fdabc2014-04-24 10:30:06 +0200539/* Functions to read / write the RPMB partition */
540int mmc_rpmb_set_key(struct mmc *mmc, void *key);
541int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
542int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
543 unsigned short cnt, unsigned char *key);
544int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
545 unsigned short cnt, unsigned char *key);
Tomas Melincd3d4882016-11-25 11:01:03 +0200546#ifdef CONFIG_CMD_BKOPS_ENABLE
547int mmc_set_bkops_enable(struct mmc *mmc);
548#endif
549
Che-Liang Chioue9550442012-11-28 15:21:13 +0000550/**
551 * Start device initialization and return immediately; it does not block on
552 * polling OCR (operation condition register) status. Then you should call
553 * mmc_init, which would block on polling OCR status and complete the device
554 * initializatin.
555 *
556 * @param mmc Pointer to a MMC device struct
557 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
558 */
559int mmc_start_init(struct mmc *mmc);
560
561/**
562 * Set preinit flag of mmc device.
563 *
564 * This will cause the device to be pre-inited during mmc_initialize(),
565 * which may save boot time if the device is not accessed until later.
566 * Some eMMC devices take 200-300ms to init, but unfortunately they
567 * must be sent a series of commands to even get them to start preparing
568 * for operation.
569 *
570 * @param mmc Pointer to a MMC device struct
571 * @param preinit preinit flag value
572 */
573void mmc_set_preinit(struct mmc *mmc, int preinit);
574
Paul Burton8687d5c2013-09-04 16:12:26 +0100575#ifdef CONFIG_MMC_SPI
Tom Rini0b2da7e2014-03-28 16:55:29 -0400576#define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
Paul Burton8687d5c2013-09-04 16:12:26 +0100577#else
578#define mmc_host_is_spi(mmc) 0
579#endif
Thomas Choud52ebf12010-12-24 13:12:21 +0000580struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200581
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +0100582void board_mmc_power_init(void);
Fabio Estevam3c7ca962014-02-15 14:51:59 -0200583int board_mmc_init(bd_t *bis);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200584int cpu_mmc_init(bd_t *bis);
Jeroen Hofsteeaeb80552014-10-08 22:58:05 +0200585int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
Clemens Gruberaa844fe2016-01-26 16:20:38 +0100586int mmc_get_env_dev(void);
Fabio Estevam3c7ca962014-02-15 14:51:59 -0200587
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200588/* Set block count limit because of 16 bit register limit on some hardware*/
589#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
590#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
591#endif
592
Simon Glasscb5ec332016-05-01 13:52:27 -0600593/**
594 * mmc_get_blk_desc() - Get the block descriptor for an MMC device
595 *
596 * @mmc: MMC device
597 * @return block device if found, else NULL
598 */
599struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
600
wdenk71f95112003-06-15 22:40:42 +0000601#endif /* _MMC_H_ */