blob: 9e3a652f44513c15bfa5c3b2c091623d361a9e3a [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk5653fc32004-02-08 22:55:38 +00002/*
wdenkbf9e3b32004-02-12 00:47:09 +00003 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00004 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 *
6 * Copyright (C) 2003 Arabella Software Ltd.
7 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00008 *
wdenkbf9e3b32004-02-12 00:47:09 +00009 * Copyright (C) 2004
10 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010011 *
12 * Copyright (C) 2006
13 * Tolunay Orkun <listmember@orkun.us>
wdenk5653fc32004-02-08 22:55:38 +000014 */
15
16/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000017/* #define DEBUG */
18
wdenk5653fc32004-02-08 22:55:38 +000019#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070020#include <console.h>
Thomas Chouf1056912015-11-07 14:31:08 +080021#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060022#include <env.h>
Thomas Chouf1056912015-11-07 14:31:08 +080023#include <errno.h>
24#include <fdt_support.h>
Simon Glassb79fdc72020-05-10 11:39:54 -060025#include <flash.h>
Simon Glass691d7192020-05-10 11:40:02 -060026#include <init.h>
Simon Glassc30b7ad2019-11-14 12:57:41 -070027#include <irq_func.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060028#include <log.h>
wdenk5653fc32004-02-08 22:55:38 +000029#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010030#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000031#include <asm/byteorder.h>
Andrew Gabbasovaedadf12013-05-14 12:27:52 -050032#include <asm/unaligned.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060033#include <env_internal.h>
Simon Glassc05ed002020-05-10 11:40:11 -060034#include <linux/delay.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010035#include <mtd/cfi_flash.h>
Jens Scharsig (BuS Elektronik)a9f5fab2012-01-27 09:29:53 +010036#include <watchdog.h>
wdenk028ab6b2004-02-23 23:54:43 +000037
wdenk5653fc32004-02-08 22:55:38 +000038/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010039 * This file implements a Common Flash Interface (CFI) driver for
40 * U-Boot.
41 *
42 * The width of the port and the width of the chips are determined at
43 * initialization. These widths are used to calculate the address for
44 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000045 *
46 * References
47 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
48 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
49 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
50 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010051 * AMD CFI Specification, Release 2.0 December 1, 2001
52 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
53 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000054 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010056 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000057 */
58
Thomas Chouf1056912015-11-07 14:31:08 +080059DECLARE_GLOBAL_DATA_PTR;
60
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010061static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysinger4ffeab22010-12-22 09:41:13 -050062#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010063static uint flash_verbose = 1;
Mike Frysinger4ffeab22010-12-22 09:41:13 -050064#else
65#define flash_verbose 1
66#endif
Wolfgang Denk92eb7292006-12-27 01:26:13 +010067
Wolfgang Denk2a112b22008-08-08 16:39:54 +020068flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
69
Stefan Roese79b4cda2006-02-28 15:29:58 +010070/*
71 * Check if chip width is defined. If not, start detecting with 8bit.
72 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
74#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +010075#endif
76
Jeroen Hofstee00dcb072014-10-08 22:57:23 +020077#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
78#define __maybe_weak __weak
79#else
80#define __maybe_weak static
81#endif
82
Stefan Roese6f726f92010-10-25 18:31:48 +020083/*
84 * 0xffff is an undefined value for the configuration register. When
85 * this value is returned, the configuration register shall not be
86 * written at all (default mode).
87 */
88static u16 cfi_flash_config_reg(int i)
89{
90#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
91 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
92#else
93 return 0xffff;
94#endif
95}
96
Stefan Roeseca5def32010-08-31 10:00:10 +020097#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
98int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
Mario Sixd9a35692018-01-26 14:43:56 +010099#else
100int cfi_flash_num_flash_banks;
Stefan Roeseca5def32010-08-31 10:00:10 +0200101#endif
102
Thomas Chouf1056912015-11-07 14:31:08 +0800103#ifdef CONFIG_CFI_FLASH /* for driver model */
104static void cfi_flash_init_dm(void)
105{
106 struct udevice *dev;
107
108 cfi_flash_num_flash_banks = 0;
109 /*
110 * The uclass_first_device() will probe the first device and
111 * uclass_next_device() will probe the rest if they exist. So
112 * that cfi_flash_probe() will get called assigning the base
113 * addresses that are available.
114 */
115 for (uclass_first_device(UCLASS_MTD, &dev);
116 dev;
117 uclass_next_device(&dev)) {
118 }
119}
120
Thomas Chouf1056912015-11-07 14:31:08 +0800121phys_addr_t cfi_flash_bank_addr(int i)
122{
Marek Vasut1ec0a372017-09-12 19:09:08 +0200123 return flash_info[i].base;
Thomas Chouf1056912015-11-07 14:31:08 +0800124}
125#else
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200126__weak phys_addr_t cfi_flash_bank_addr(int i)
Stefan Roeseb00e19c2010-08-30 10:11:51 +0200127{
128 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
129}
Thomas Chouf1056912015-11-07 14:31:08 +0800130#endif
Stefan Roeseb00e19c2010-08-30 10:11:51 +0200131
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200132__weak unsigned long cfi_flash_bank_size(int i)
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200133{
134#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
135 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
136#else
137 return 0;
138#endif
139}
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200140
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200141__maybe_weak void flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100142{
143 __raw_writeb(value, addr);
144}
145
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200146__maybe_weak void flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100147{
148 __raw_writew(value, addr);
149}
150
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200151__maybe_weak void flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100152{
153 __raw_writel(value, addr);
154}
155
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200156__maybe_weak void flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100157{
158 /* No architectures currently implement __raw_writeq() */
159 *(volatile u64 *)addr = value;
160}
161
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200162__maybe_weak u8 flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100163{
164 return __raw_readb(addr);
165}
166
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200167__maybe_weak u16 flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100168{
169 return __raw_readw(addr);
170}
171
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200172__maybe_weak u32 flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100173{
174 return __raw_readl(addr);
175}
176
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200177__maybe_weak u64 flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100178{
179 /* No architectures currently implement __raw_readq() */
180 return *(volatile u64 *)addr;
181}
182
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200183/*-----------------------------------------------------------------------
184 */
Mario Sixddcf0542018-01-26 14:43:54 +0100185#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
Vignesh Raghavendrad75eacf2019-10-23 13:30:00 +0530186 (defined(CONFIG_SYS_MONITOR_BASE) && \
187 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
Marek Vasut236c49a2017-08-20 17:20:00 +0200188static flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200189{
190 int i;
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900191 flash_info_t *info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200192
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Masahiro Yamadae2e273a2013-05-17 14:50:36 +0900194 info = &flash_info[i];
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200195 if (info->size && info->start[0] <= base &&
196 base <= info->start[0] + info->size - 1)
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900197 return info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200198 }
199
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900200 return NULL;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200201}
wdenk5653fc32004-02-08 22:55:38 +0000202#endif
203
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100204unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
205{
206 if (sect != (info->sector_count - 1))
207 return info->start[sect + 1] - info->start[sect];
208 else
209 return info->start[0] + info->size - info->start[sect];
210}
211
wdenk5653fc32004-02-08 22:55:38 +0000212/*-----------------------------------------------------------------------
213 * create an address based on the offset and the port width
214 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100215static inline void *
Mario Sixca2b07a2018-01-26 14:43:32 +0100216flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000217{
Stefan Roesee303be22013-04-12 19:04:54 +0200218 unsigned int byte_offset = offset * info->portwidth;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100219
Stefan Roesee303be22013-04-12 19:04:54 +0200220 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100221}
222
223static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
Mario Sixc0350fb2018-01-26 14:43:55 +0100224 unsigned int offset, void *addr)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100225{
wdenk5653fc32004-02-08 22:55:38 +0000226}
wdenkbf9e3b32004-02-12 00:47:09 +0000227
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200228/*-----------------------------------------------------------------------
229 * make a proper sized command based on the port and chip widths
230 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200231static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200232{
233 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400234 int cword_offset;
235 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200237 u32 cmd_le = cpu_to_le32(cmd);
238#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400239 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200240 uchar *cp = (uchar *) cmdbuf;
241
Mario Sixb1683862018-01-26 14:43:33 +0100242 for (i = info->portwidth; i > 0; i--) {
Mario Six640f4e32018-01-26 14:43:36 +0100243 cword_offset = (info->portwidth - i) % info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400245 cp_offset = info->portwidth - i;
Mario Sixdb91bb22018-01-26 14:43:34 +0100246 val = *((uchar *)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200247#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400248 cp_offset = i - 1;
Mario Sixdb91bb22018-01-26 14:43:34 +0100249 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200250#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200251 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400252 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200253}
254
wdenkbf9e3b32004-02-12 00:47:09 +0000255#ifdef DEBUG
256/*-----------------------------------------------------------------------
257 * Debug support
258 */
Mario Six188a5562018-01-26 14:43:31 +0100259static void print_longlong(char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000260{
261 int i;
262 char *cp;
263
Mario Six640f4e32018-01-26 14:43:36 +0100264 cp = (char *)&data;
wdenkbf9e3b32004-02-12 00:47:09 +0000265 for (i = 0; i < 8; i++)
Mario Six188a5562018-01-26 14:43:31 +0100266 sprintf(&str[i * 2], "%2.2x", *cp++);
wdenkbf9e3b32004-02-12 00:47:09 +0000267}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200268
Mario Six188a5562018-01-26 14:43:31 +0100269static void flash_printqry(struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000270{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100271 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000272 int x, y;
273
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100274 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
275 debug("%02x : ", x);
276 for (y = 0; y < 16; y++)
277 debug("%2.2x ", p[x + y]);
278 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000279 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100280 unsigned char c = p[x + y];
Mario Six7223a8c2018-01-26 14:43:37 +0100281
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100282 if (c >= 0x20 && c <= 0x7e)
283 debug("%c", c);
284 else
285 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000286 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100287 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000288 }
289}
wdenkbf9e3b32004-02-12 00:47:09 +0000290#endif
291
wdenk5653fc32004-02-08 22:55:38 +0000292/*-----------------------------------------------------------------------
293 * read a character at a port width address
294 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100295static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000296{
297 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100298 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000299
Mario Six188a5562018-01-26 14:43:31 +0100300 cp = flash_map(info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200301#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100302 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000303#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100304 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000305#endif
Mario Six188a5562018-01-26 14:43:31 +0100306 flash_unmap(info, 0, offset, cp);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100307 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000308}
309
310/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100311 * read a word at a port width address, assume 16bit bus
312 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100313static inline ushort flash_read_word(flash_info_t *info, uint offset)
Tor Krill90447ec2008-03-28 11:29:10 +0100314{
315 ushort *addr, retval;
316
Mario Six188a5562018-01-26 14:43:31 +0100317 addr = flash_map(info, 0, offset);
318 retval = flash_read16(addr);
319 flash_unmap(info, 0, offset, addr);
Tor Krill90447ec2008-03-28 11:29:10 +0100320 return retval;
321}
322
Tor Krill90447ec2008-03-28 11:29:10 +0100323/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100324 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000325 * port size word. Swap for ppc format.
326 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100327static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100328 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000329{
wdenkbf9e3b32004-02-12 00:47:09 +0000330 uchar *addr;
331 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000332
wdenkbf9e3b32004-02-12 00:47:09 +0000333#ifdef DEBUG
334 int x;
335#endif
Mario Six188a5562018-01-26 14:43:31 +0100336 addr = flash_map(info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000337
338#ifdef DEBUG
Mario Six188a5562018-01-26 14:43:31 +0100339 debug("long addr is at %p info->portwidth = %d\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100340 info->portwidth);
Mario Six0412e902018-01-26 14:43:38 +0100341 for (x = 0; x < 4 * info->portwidth; x++)
Mario Six188a5562018-01-26 14:43:31 +0100342 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000343#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200344#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100345 retval = ((flash_read8(addr) << 16) |
346 (flash_read8(addr + info->portwidth) << 24) |
347 (flash_read8(addr + 2 * info->portwidth)) |
348 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000349#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100350 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
351 (flash_read8(addr + info->portwidth - 1) << 16) |
352 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
353 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000354#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100355 flash_unmap(info, sect, offset, addr);
356
wdenkbf9e3b32004-02-12 00:47:09 +0000357 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000358}
359
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200360/*
361 * Write a proper sized command to the correct address
362 */
Marek Vasut236c49a2017-08-20 17:20:00 +0200363static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
364 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200365{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100366 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200367 cfiword_t cword;
368
Mario Six188a5562018-01-26 14:43:31 +0100369 addr = flash_map(info, sect, offset);
370 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200371 switch (info->portwidth) {
372 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +0100373 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Mario Sixc0350fb2018-01-26 14:43:55 +0100374 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100375 flash_write8(cword.w8, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200376 break;
377 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +0100378 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100379 cmd, cword.w16,
380 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100381 flash_write16(cword.w16, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200382 break;
383 case FLASH_CFI_32BIT:
Mario Six188a5562018-01-26 14:43:31 +0100384 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100385 cmd, cword.w32,
386 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100387 flash_write32(cword.w32, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200388 break;
389 case FLASH_CFI_64BIT:
390#ifdef DEBUG
391 {
392 char str[20];
393
Mario Six188a5562018-01-26 14:43:31 +0100394 print_longlong(str, cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200395
Mario Six188a5562018-01-26 14:43:31 +0100396 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Mario Sixc0350fb2018-01-26 14:43:55 +0100397 addr, cmd, str,
398 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200399 }
400#endif
Ryan Harkin622b9522015-10-23 16:50:51 +0100401 flash_write64(cword.w64, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200402 break;
403 }
404
405 /* Ensure all the instructions are fully finished */
406 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100407
408 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200409}
410
Mario Sixca2b07a2018-01-26 14:43:32 +0100411static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200412{
Mario Six188a5562018-01-26 14:43:31 +0100413 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
414 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200415}
416
417/*-----------------------------------------------------------------------
418 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100419static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
420 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200421{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100422 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200423 cfiword_t cword;
424 int retval;
425
Mario Six188a5562018-01-26 14:43:31 +0100426 addr = flash_map(info, sect, offset);
427 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200428
Mario Six188a5562018-01-26 14:43:31 +0100429 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200430 switch (info->portwidth) {
431 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +0100432 debug("is= %x %x\n", flash_read8(addr), cword.w8);
Ryan Harkin622b9522015-10-23 16:50:51 +0100433 retval = (flash_read8(addr) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200434 break;
435 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +0100436 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
Ryan Harkin622b9522015-10-23 16:50:51 +0100437 retval = (flash_read16(addr) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200438 break;
439 case FLASH_CFI_32BIT:
Mario Six188a5562018-01-26 14:43:31 +0100440 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
Ryan Harkin622b9522015-10-23 16:50:51 +0100441 retval = (flash_read32(addr) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200442 break;
443 case FLASH_CFI_64BIT:
444#ifdef DEBUG
445 {
446 char str1[20];
447 char str2[20];
448
Mario Six188a5562018-01-26 14:43:31 +0100449 print_longlong(str1, flash_read64(addr));
450 print_longlong(str2, cword.w64);
451 debug("is= %s %s\n", str1, str2);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200452 }
453#endif
Ryan Harkin622b9522015-10-23 16:50:51 +0100454 retval = (flash_read64(addr) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200455 break;
456 default:
457 retval = 0;
458 break;
459 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100460 flash_unmap(info, sect, offset, addr);
461
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200462 return retval;
463}
464
465/*-----------------------------------------------------------------------
466 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100467static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
468 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200469{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100470 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200471 cfiword_t cword;
472 int retval;
473
Mario Six188a5562018-01-26 14:43:31 +0100474 addr = flash_map(info, sect, offset);
475 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 switch (info->portwidth) {
477 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100478 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100481 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200482 break;
483 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100484 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200485 break;
486 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100487 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200488 break;
489 default:
490 retval = 0;
491 break;
492 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100493 flash_unmap(info, sect, offset, addr);
494
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200495 return retval;
496}
497
498/*-----------------------------------------------------------------------
499 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100500static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
501 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200502{
Mario Six53128382018-01-26 14:43:49 +0100503 u8 *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200504 cfiword_t cword;
505 int retval;
506
Mario Six188a5562018-01-26 14:43:31 +0100507 addr = flash_map(info, sect, offset);
508 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 switch (info->portwidth) {
510 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200511 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 break;
513 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200514 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200515 break;
516 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200517 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200518 break;
519 case FLASH_CFI_64BIT:
Mario Sixb1683862018-01-26 14:43:33 +0100520 retval = ((flash_read32(addr) != flash_read32(addr)) ||
Mario Six640f4e32018-01-26 14:43:36 +0100521 (flash_read32(addr + 4) != flash_read32(addr + 4)));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200522 break;
523 default:
524 retval = 0;
525 break;
526 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100527 flash_unmap(info, sect, offset, addr);
528
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200529 return retval;
530}
531
532/*
533 * flash_is_busy - check to see if the flash is busy
534 *
535 * This routine checks the status of the chip and returns true if the
536 * chip is busy.
537 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100538static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200539{
540 int retval;
541
542 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400543 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200544 case CFI_CMDSET_INTEL_STANDARD:
545 case CFI_CMDSET_INTEL_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +0100546 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200547 break;
548 case CFI_CMDSET_AMD_STANDARD:
549 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100550#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200551 case CFI_CMDSET_AMD_LEGACY:
552#endif
Marek Vasut72443c72017-09-12 19:09:31 +0200553 if (info->sr_supported) {
Mario Six188a5562018-01-26 14:43:31 +0100554 flash_write_cmd(info, sect, info->addr_unlock1,
Mario Sixc0350fb2018-01-26 14:43:55 +0100555 FLASH_CMD_READ_STATUS);
Mario Six188a5562018-01-26 14:43:31 +0100556 retval = !flash_isset(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100557 FLASH_STATUS_DONE);
Marek Vasut72443c72017-09-12 19:09:31 +0200558 } else {
Mario Six188a5562018-01-26 14:43:31 +0100559 retval = flash_toggle(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100560 AMD_STATUS_TOGGLE);
Marek Vasut72443c72017-09-12 19:09:31 +0200561 }
562
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200563 break;
564 default:
565 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100566 }
Mario Six38d28312018-01-26 14:43:40 +0100567 debug("%s: %d\n", __func__, retval);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200568 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100569}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200570
571/*-----------------------------------------------------------------------
572 * wait for XSR.7 to be set. Time out with an error if it does not.
573 * This routine does not set the flash to read-array mode.
574 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100575static int flash_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100576 ulong tout, char *prompt)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200577{
578 ulong start;
579
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200580#if CONFIG_SYS_HZ != 1000
Mario Sixddcf0542018-01-26 14:43:54 +0100581 /* Avoid overflow for large HZ */
Renato Andreolac40c94a2010-03-24 23:00:47 +0800582 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixddcf0542018-01-26 14:43:54 +0100583 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Renato Andreolac40c94a2010-03-24 23:00:47 +0800584 else
585 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200586#endif
587
588 /* Wait for command completion */
Graeme Russe110c4f2011-07-15 02:18:56 +0000589#ifdef CONFIG_SYS_LOW_RES_TIMER
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800590 reset_timer();
Graeme Russe110c4f2011-07-15 02:18:56 +0000591#endif
Mario Six188a5562018-01-26 14:43:31 +0100592 start = get_timer(0);
Jens Scharsig (BuS Elektronik)a9f5fab2012-01-27 09:29:53 +0100593 WATCHDOG_RESET();
Mario Six188a5562018-01-26 14:43:31 +0100594 while (flash_is_busy(info, sector)) {
595 if (get_timer(start) > tout) {
596 printf("Flash %s timeout at address %lx data %lx\n",
Mario Sixc0350fb2018-01-26 14:43:55 +0100597 prompt, info->start[sector],
598 flash_read_long(info, sector, 0));
Mario Six188a5562018-01-26 14:43:31 +0100599 flash_write_cmd(info, sector, 0, info->cmd_reset);
Stefan Roesee303be22013-04-12 19:04:54 +0200600 udelay(1);
Mario Six9dbaebc2018-01-26 14:43:52 +0100601 return ERR_TIMEOUT;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200602 }
Mario Six188a5562018-01-26 14:43:31 +0100603 udelay(1); /* also triggers watchdog */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200604 }
605 return ERR_OK;
606}
607
608/*-----------------------------------------------------------------------
609 * Wait for XSR.7 to be set, if it times out print an error, otherwise
610 * do a full status check.
611 *
612 * This routine sets the flash to read-array mode.
613 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100614static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100615 ulong tout, char *prompt)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200616{
617 int retcode;
618
Mario Six188a5562018-01-26 14:43:31 +0100619 retcode = flash_status_check(info, sector, tout, prompt);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200620 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400621 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200622 case CFI_CMDSET_INTEL_EXTENDED:
623 case CFI_CMDSET_INTEL_STANDARD:
Mario Six4f89da42018-01-26 14:43:42 +0100624 if (retcode == ERR_OK &&
Mario Sixc0350fb2018-01-26 14:43:55 +0100625 !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200626 retcode = ERR_INVAL;
Mario Six188a5562018-01-26 14:43:31 +0100627 printf("Flash %s error at address %lx\n", prompt,
Mario Sixc0350fb2018-01-26 14:43:55 +0100628 info->start[sector]);
Mario Six188a5562018-01-26 14:43:31 +0100629 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200630 FLASH_STATUS_PSLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100631 puts("Command Sequence Error.\n");
632 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200633 FLASH_STATUS_ECLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100634 puts("Block Erase Error.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200635 retcode = ERR_NOT_ERASED;
Mario Six188a5562018-01-26 14:43:31 +0100636 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200637 FLASH_STATUS_PSLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100638 puts("Locking Error\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200639 }
Mario Six188a5562018-01-26 14:43:31 +0100640 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
641 puts("Block locked.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200642 retcode = ERR_PROTECTED;
643 }
Mario Six188a5562018-01-26 14:43:31 +0100644 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
645 puts("Vpp Low Error.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200646 }
Mario Six188a5562018-01-26 14:43:31 +0100647 flash_write_cmd(info, sector, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -0700648 udelay(1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200649 break;
650 default:
651 break;
652 }
653 return retcode;
654}
655
Thomas Choue5720822010-03-26 08:17:00 +0800656static int use_flash_status_poll(flash_info_t *info)
657{
658#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
659 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
660 info->vendor == CFI_CMDSET_AMD_STANDARD)
661 return 1;
662#endif
663 return 0;
664}
665
666static int flash_status_poll(flash_info_t *info, void *src, void *dst,
667 ulong tout, char *prompt)
668{
669#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
670 ulong start;
671 int ready;
672
673#if CONFIG_SYS_HZ != 1000
Mario Sixddcf0542018-01-26 14:43:54 +0100674 /* Avoid overflow for large HZ */
Thomas Choue5720822010-03-26 08:17:00 +0800675 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixddcf0542018-01-26 14:43:54 +0100676 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Thomas Choue5720822010-03-26 08:17:00 +0800677 else
678 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
679#endif
680
681 /* Wait for command completion */
Graeme Russe110c4f2011-07-15 02:18:56 +0000682#ifdef CONFIG_SYS_LOW_RES_TIMER
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800683 reset_timer();
Graeme Russe110c4f2011-07-15 02:18:56 +0000684#endif
Thomas Choue5720822010-03-26 08:17:00 +0800685 start = get_timer(0);
Jens Scharsig (BuS Elektronik)a9f5fab2012-01-27 09:29:53 +0100686 WATCHDOG_RESET();
Thomas Choue5720822010-03-26 08:17:00 +0800687 while (1) {
688 switch (info->portwidth) {
689 case FLASH_CFI_8BIT:
690 ready = flash_read8(dst) == flash_read8(src);
691 break;
692 case FLASH_CFI_16BIT:
693 ready = flash_read16(dst) == flash_read16(src);
694 break;
695 case FLASH_CFI_32BIT:
696 ready = flash_read32(dst) == flash_read32(src);
697 break;
698 case FLASH_CFI_64BIT:
699 ready = flash_read64(dst) == flash_read64(src);
700 break;
701 default:
702 ready = 0;
703 break;
704 }
705 if (ready)
706 break;
707 if (get_timer(start) > tout) {
708 printf("Flash %s timeout at address %lx data %lx\n",
709 prompt, (ulong)dst, (ulong)flash_read8(dst));
Mario Six9dbaebc2018-01-26 14:43:52 +0100710 return ERR_TIMEOUT;
Thomas Choue5720822010-03-26 08:17:00 +0800711 }
712 udelay(1); /* also triggers watchdog */
713 }
714#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
715 return ERR_OK;
716}
717
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200718/*-----------------------------------------------------------------------
719 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100720static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200721{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200722#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200723 unsigned short w;
724 unsigned int l;
725 unsigned long long ll;
726#endif
727
728 switch (info->portwidth) {
729 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100730 cword->w8 = c;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200731 break;
732 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200733#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200734 w = c;
735 w <<= 8;
Ryan Harkin622b9522015-10-23 16:50:51 +0100736 cword->w16 = (cword->w16 >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100737#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100738 cword->w16 = (cword->w16 << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100739#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200740 break;
741 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200742#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200743 l = c;
744 l <<= 24;
Ryan Harkin622b9522015-10-23 16:50:51 +0100745 cword->w32 = (cword->w32 >> 8) | l;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200746#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100747 cword->w32 = (cword->w32 << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200748#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200749 break;
750 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200751#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200752 ll = c;
753 ll <<= 56;
Ryan Harkin622b9522015-10-23 16:50:51 +0100754 cword->w64 = (cword->w64 >> 8) | ll;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200755#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100756 cword->w64 = (cword->w64 << 8) | c;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200757#endif
758 break;
wdenk5653fc32004-02-08 22:55:38 +0000759 }
wdenk5653fc32004-02-08 22:55:38 +0000760}
761
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100762/*
763 * Loop through the sector table starting from the previously found sector.
764 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000765 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100766static flash_sect_t find_sector(flash_info_t *info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000767{
Kim Phillips11dc4012012-10-29 13:34:45 +0000768 static flash_sect_t saved_sector; /* previously found sector */
Stefan Roesee303be22013-04-12 19:04:54 +0200769 static flash_info_t *saved_info; /* previously used flash bank */
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100770 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000771
Mario Six4f89da42018-01-26 14:43:42 +0100772 if (info != saved_info || sector >= info->sector_count)
Stefan Roesee303be22013-04-12 19:04:54 +0200773 sector = 0;
774
Mario Six5701ba82018-01-26 14:43:53 +0100775 while ((sector < info->sector_count - 1) &&
Mario Sixc0350fb2018-01-26 14:43:55 +0100776 (info->start[sector] < addr))
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100777 sector++;
778 while ((info->start[sector] > addr) && (sector > 0))
779 /*
780 * also decrements the sector in case of an overshot
781 * in the first loop
782 */
783 sector--;
784
785 saved_sector = sector;
Stefan Roesee303be22013-04-12 19:04:54 +0200786 saved_info = info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200787 return sector;
wdenk7680c142005-05-16 15:23:22 +0000788}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200789
790/*-----------------------------------------------------------------------
791 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100792static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200793{
Becky Bruce09ce9922009-02-02 16:34:51 -0600794 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200795 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100796 flash_sect_t sect = 0;
797 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200798
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200799 /* Check if Flash is (sufficiently) erased */
800 switch (info->portwidth) {
801 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100802 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200803 break;
804 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100805 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200806 break;
807 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100808 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200809 break;
810 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100811 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200812 break;
813 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100814 flag = 0;
815 break;
816 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600817 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100818 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200819
820 /* Disable interrupts which might cause a timeout here */
Mario Six188a5562018-01-26 14:43:31 +0100821 flag = disable_interrupts();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200822
823 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400824 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200825 case CFI_CMDSET_INTEL_EXTENDED:
826 case CFI_CMDSET_INTEL_STANDARD:
Mario Six188a5562018-01-26 14:43:31 +0100827 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
828 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200829 break;
830 case CFI_CMDSET_AMD_EXTENDED:
831 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500832 sect = find_sector(info, dest);
Mario Six188a5562018-01-26 14:43:31 +0100833 flash_unlock_seq(info, sect);
834 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100835 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200836 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800837#ifdef CONFIG_FLASH_CFI_LEGACY
838 case CFI_CMDSET_AMD_LEGACY:
839 sect = find_sector(info, dest);
Mario Six188a5562018-01-26 14:43:31 +0100840 flash_unlock_seq(info, 0);
841 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800842 sect_found = 1;
843 break;
844#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200845 }
846
847 switch (info->portwidth) {
848 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100849 flash_write8(cword.w8, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200850 break;
851 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100852 flash_write16(cword.w16, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200853 break;
854 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100855 flash_write32(cword.w32, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200856 break;
857 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100858 flash_write64(cword.w64, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200859 break;
860 }
861
862 /* re-enable interrupts if necessary */
863 if (flag)
Mario Six188a5562018-01-26 14:43:31 +0100864 enable_interrupts();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200865
Jens Gehrleina7292872008-12-16 17:25:54 +0100866 if (!sect_found)
Mario Six188a5562018-01-26 14:43:31 +0100867 sect = find_sector(info, dest);
Jens Gehrleina7292872008-12-16 17:25:54 +0100868
Thomas Choue5720822010-03-26 08:17:00 +0800869 if (use_flash_status_poll(info))
870 return flash_status_poll(info, &cword, dstaddr,
871 info->write_tout, "write");
872 else
873 return flash_full_status_check(info, sect,
874 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200875}
876
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200877#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200878
Mario Sixca2b07a2018-01-26 14:43:32 +0100879static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
Mario Sixc0350fb2018-01-26 14:43:55 +0100880 int len)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200881{
882 flash_sect_t sector;
883 int cnt;
884 int retcode;
Mario Six53128382018-01-26 14:43:49 +0100885 u8 *src = cp;
886 u8 *dst = (u8 *)dest;
887 u8 *dst2 = dst;
Tao Hou85c344e2012-03-15 23:33:58 +0800888 int flag = 1;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200889 uint offset = 0;
890 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400891 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100892
Stefan Roese0dc80e22007-12-27 07:50:54 +0100893 switch (info->portwidth) {
894 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200895 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100896 break;
897 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200898 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100899 break;
900 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200901 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100902 break;
903 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200904 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100905 break;
906 default:
907 retcode = ERR_INVAL;
908 goto out_unmap;
909 }
910
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200911 cnt = len >> shift;
912
Tao Hou85c344e2012-03-15 23:33:58 +0800913 while ((cnt-- > 0) && (flag == 1)) {
Stefan Roese0dc80e22007-12-27 07:50:54 +0100914 switch (info->portwidth) {
915 case FLASH_CFI_8BIT:
916 flag = ((flash_read8(dst2) & flash_read8(src)) ==
917 flash_read8(src));
918 src += 1, dst2 += 1;
919 break;
920 case FLASH_CFI_16BIT:
921 flag = ((flash_read16(dst2) & flash_read16(src)) ==
922 flash_read16(src));
923 src += 2, dst2 += 2;
924 break;
925 case FLASH_CFI_32BIT:
926 flag = ((flash_read32(dst2) & flash_read32(src)) ==
927 flash_read32(src));
928 src += 4, dst2 += 4;
929 break;
930 case FLASH_CFI_64BIT:
931 flag = ((flash_read64(dst2) & flash_read64(src)) ==
932 flash_read64(src));
933 src += 8, dst2 += 8;
934 break;
935 }
936 }
937 if (!flag) {
938 retcode = ERR_NOT_ERASED;
939 goto out_unmap;
940 }
941
942 src = cp;
Mario Six188a5562018-01-26 14:43:31 +0100943 sector = find_sector(info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200944
945 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400946 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200947 case CFI_CMDSET_INTEL_STANDARD:
948 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400949 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
Mario Sixddcf0542018-01-26 14:43:54 +0100950 FLASH_CMD_WRITE_BUFFER_PROG :
951 FLASH_CMD_WRITE_TO_BUFFER;
Mario Six188a5562018-01-26 14:43:31 +0100952 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
953 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
954 flash_write_cmd(info, sector, 0, write_cmd);
955 retcode = flash_status_check(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100956 info->buffer_write_tout,
957 "write to buffer");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200958 if (retcode == ERR_OK) {
959 /* reduce the number of loops by the width of
Mario Sixa6d18f22018-01-26 14:43:41 +0100960 * the port
961 */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200962 cnt = len >> shift;
Mario Six188a5562018-01-26 14:43:31 +0100963 flash_write_cmd(info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200964 while (cnt-- > 0) {
965 switch (info->portwidth) {
966 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100967 flash_write8(flash_read8(src), dst);
968 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200969 break;
970 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100971 flash_write16(flash_read16(src), dst);
972 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200973 break;
974 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100975 flash_write32(flash_read32(src), dst);
976 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200977 break;
978 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100979 flash_write64(flash_read64(src), dst);
980 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200981 break;
982 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100983 retcode = ERR_INVAL;
984 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200985 }
986 }
Mario Six188a5562018-01-26 14:43:31 +0100987 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100988 FLASH_CMD_WRITE_BUFFER_CONFIRM);
Mario Six188a5562018-01-26 14:43:31 +0100989 retcode = flash_full_status_check(
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200990 info, sector, info->buffer_write_tout,
991 "buffer write");
992 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100993
994 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200995
996 case CFI_CMDSET_AMD_STANDARD:
997 case CFI_CMDSET_AMD_EXTENDED:
Rouven Behr7570a0c2016-04-10 13:38:13 +0200998 flash_unlock_seq(info, sector);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200999
1000#ifdef CONFIG_FLASH_SPANSION_S29WS_N
1001 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1002#endif
1003 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1004 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -05001005 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001006
1007 switch (info->portwidth) {
1008 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001009 while (cnt-- > 0) {
1010 flash_write8(flash_read8(src), dst);
1011 src += 1, dst += 1;
1012 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001013 break;
1014 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001015 while (cnt-- > 0) {
1016 flash_write16(flash_read16(src), dst);
1017 src += 2, dst += 2;
1018 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001019 break;
1020 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001021 while (cnt-- > 0) {
1022 flash_write32(flash_read32(src), dst);
1023 src += 4, dst += 4;
1024 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001025 break;
1026 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001027 while (cnt-- > 0) {
1028 flash_write64(flash_read64(src), dst);
1029 src += 8, dst += 8;
1030 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001031 break;
1032 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001033 retcode = ERR_INVAL;
1034 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001035 }
1036
Mario Six188a5562018-01-26 14:43:31 +01001037 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +08001038 if (use_flash_status_poll(info))
1039 retcode = flash_status_poll(info, src - (1 << shift),
1040 dst - (1 << shift),
1041 info->buffer_write_tout,
1042 "buffer write");
1043 else
1044 retcode = flash_full_status_check(info, sector,
1045 info->buffer_write_tout,
1046 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001047 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001048
1049 default:
Mario Six188a5562018-01-26 14:43:31 +01001050 debug("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001051 retcode = ERR_INVAL;
1052 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001053 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001054
1055out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001056 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001057}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001058#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001059
wdenk7680c142005-05-16 15:23:22 +00001060/*-----------------------------------------------------------------------
1061 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001062int flash_erase(flash_info_t *info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001063{
1064 int rcode = 0;
1065 int prot;
1066 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001067 int st;
wdenk5653fc32004-02-08 22:55:38 +00001068
wdenkbf9e3b32004-02-12 00:47:09 +00001069 if (info->flash_id != FLASH_MAN_CFI) {
Mario Six188a5562018-01-26 14:43:31 +01001070 puts("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001071 return 1;
1072 }
Mario Six4f89da42018-01-26 14:43:42 +01001073 if (s_first < 0 || s_first > s_last) {
Mario Six188a5562018-01-26 14:43:31 +01001074 puts("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001075 return 1;
1076 }
1077
1078 prot = 0;
Mario Six0412e902018-01-26 14:43:38 +01001079 for (sect = s_first; sect <= s_last; ++sect)
1080 if (info->protect[sect])
wdenk5653fc32004-02-08 22:55:38 +00001081 prot++;
wdenk5653fc32004-02-08 22:55:38 +00001082 if (prot) {
Mario Six188a5562018-01-26 14:43:31 +01001083 printf("- Warning: %d protected sectors will not be erased!\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001084 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001085 } else if (flash_verbose) {
Mario Six188a5562018-01-26 14:43:31 +01001086 putc('\n');
wdenk5653fc32004-02-08 22:55:38 +00001087 }
1088
wdenkbf9e3b32004-02-12 00:47:09 +00001089 for (sect = s_first; sect <= s_last; sect++) {
Joe Hershbergerde15a062012-08-17 15:36:41 -05001090 if (ctrlc()) {
1091 printf("\n");
1092 return 1;
1093 }
1094
wdenk5653fc32004-02-08 22:55:38 +00001095 if (info->protect[sect] == 0) { /* not protected */
Joe Hershberger6822a642012-08-17 15:36:40 -05001096#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1097 int k;
1098 int size;
1099 int erased;
1100 u32 *flash;
1101
1102 /*
1103 * Check if whole sector is erased
1104 */
1105 size = flash_sector_size(info, sect);
1106 erased = 1;
1107 flash = (u32 *)info->start[sect];
1108 /* divide by 4 for longword access */
1109 size = size >> 2;
1110 for (k = 0; k < size; k++) {
1111 if (flash_read32(flash++) != 0xffffffff) {
1112 erased = 0;
1113 break;
1114 }
1115 }
1116 if (erased) {
1117 if (flash_verbose)
1118 putc(',');
1119 continue;
1120 }
1121#endif
wdenkbf9e3b32004-02-12 00:47:09 +00001122 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001123 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001124 case CFI_CMDSET_INTEL_STANDARD:
1125 case CFI_CMDSET_INTEL_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +01001126 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001127 FLASH_CMD_CLEAR_STATUS);
Mario Six188a5562018-01-26 14:43:31 +01001128 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001129 FLASH_CMD_BLOCK_ERASE);
Mario Six188a5562018-01-26 14:43:31 +01001130 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001131 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001132 break;
1133 case CFI_CMDSET_AMD_STANDARD:
1134 case CFI_CMDSET_AMD_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +01001135 flash_unlock_seq(info, sect);
1136 flash_write_cmd(info, sect,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001137 info->addr_unlock1,
1138 AMD_CMD_ERASE_START);
Mario Six188a5562018-01-26 14:43:31 +01001139 flash_unlock_seq(info, sect);
1140 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001141 info->cmd_erase_sector);
wdenk5653fc32004-02-08 22:55:38 +00001142 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001143#ifdef CONFIG_FLASH_CFI_LEGACY
1144 case CFI_CMDSET_AMD_LEGACY:
Mario Six188a5562018-01-26 14:43:31 +01001145 flash_unlock_seq(info, 0);
1146 flash_write_cmd(info, 0, info->addr_unlock1,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001147 AMD_CMD_ERASE_START);
Mario Six188a5562018-01-26 14:43:31 +01001148 flash_unlock_seq(info, 0);
1149 flash_write_cmd(info, sect, 0,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001150 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001151 break;
1152#endif
wdenk5653fc32004-02-08 22:55:38 +00001153 default:
Mario Six9f720212018-01-26 14:43:44 +01001154 debug("Unknown flash vendor %d\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001155 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001156 break;
1157 }
1158
Thomas Choue5720822010-03-26 08:17:00 +08001159 if (use_flash_status_poll(info)) {
Kim Phillips11dc4012012-10-29 13:34:45 +00001160 cfiword_t cword;
Thomas Choue5720822010-03-26 08:17:00 +08001161 void *dest;
Mario Six7223a8c2018-01-26 14:43:37 +01001162
Ryan Harkin622b9522015-10-23 16:50:51 +01001163 cword.w64 = 0xffffffffffffffffULL;
Thomas Choue5720822010-03-26 08:17:00 +08001164 dest = flash_map(info, sect, 0);
1165 st = flash_status_poll(info, &cword, dest,
Mario Sixddcf0542018-01-26 14:43:54 +01001166 info->erase_blk_tout,
1167 "erase");
Thomas Choue5720822010-03-26 08:17:00 +08001168 flash_unmap(info, sect, 0, dest);
Mario Six12d7fed2018-01-26 14:43:43 +01001169 } else {
Thomas Choue5720822010-03-26 08:17:00 +08001170 st = flash_full_status_check(info, sect,
1171 info->erase_blk_tout,
1172 "erase");
Mario Six12d7fed2018-01-26 14:43:43 +01001173 }
1174
Thomas Choue5720822010-03-26 08:17:00 +08001175 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001176 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001177 else if (flash_verbose)
Mario Six188a5562018-01-26 14:43:31 +01001178 putc('.');
wdenk5653fc32004-02-08 22:55:38 +00001179 }
1180 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001181
1182 if (flash_verbose)
Mario Six188a5562018-01-26 14:43:31 +01001183 puts(" done\n");
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001184
wdenk5653fc32004-02-08 22:55:38 +00001185 return rcode;
1186}
1187
Stefan Roese70084df2010-08-13 09:36:36 +02001188#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1189static int sector_erased(flash_info_t *info, int i)
1190{
1191 int k;
1192 int size;
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001193 u32 *flash;
Stefan Roese70084df2010-08-13 09:36:36 +02001194
1195 /*
1196 * Check if whole sector is erased
1197 */
1198 size = flash_sector_size(info, i);
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001199 flash = (u32 *)info->start[i];
Stefan Roese70084df2010-08-13 09:36:36 +02001200 /* divide by 4 for longword access */
1201 size = size >> 2;
1202
1203 for (k = 0; k < size; k++) {
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001204 if (flash_read32(flash++) != 0xffffffff)
Stefan Roese70084df2010-08-13 09:36:36 +02001205 return 0; /* not erased */
1206 }
1207
1208 return 1; /* erased */
1209}
1210#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1211
Mario Sixca2b07a2018-01-26 14:43:32 +01001212void flash_print_info(flash_info_t *info)
wdenk5653fc32004-02-08 22:55:38 +00001213{
1214 int i;
1215
1216 if (info->flash_id != FLASH_MAN_CFI) {
Mario Six188a5562018-01-26 14:43:31 +01001217 puts("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001218 return;
1219 }
1220
Mario Six188a5562018-01-26 14:43:31 +01001221 printf("%s flash (%d x %d)",
Mario Sixc0350fb2018-01-26 14:43:55 +01001222 info->name,
1223 (info->portwidth << 3), (info->chipwidth << 3));
Mario Six640f4e32018-01-26 14:43:36 +01001224 if (info->size < 1024 * 1024)
Mario Six188a5562018-01-26 14:43:31 +01001225 printf(" Size: %ld kB in %d Sectors\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001226 info->size >> 10, info->sector_count);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001227 else
Mario Six188a5562018-01-26 14:43:31 +01001228 printf(" Size: %ld MB in %d Sectors\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001229 info->size >> 20, info->sector_count);
Mario Six188a5562018-01-26 14:43:31 +01001230 printf(" ");
Stefan Roese260421a2006-11-13 13:55:24 +01001231 switch (info->vendor) {
Mario Sixdde09132018-01-26 14:43:35 +01001232 case CFI_CMDSET_INTEL_PROG_REGIONS:
1233 printf("Intel Prog Regions");
1234 break;
1235 case CFI_CMDSET_INTEL_STANDARD:
1236 printf("Intel Standard");
1237 break;
1238 case CFI_CMDSET_INTEL_EXTENDED:
1239 printf("Intel Extended");
1240 break;
1241 case CFI_CMDSET_AMD_STANDARD:
1242 printf("AMD Standard");
1243 break;
1244 case CFI_CMDSET_AMD_EXTENDED:
1245 printf("AMD Extended");
1246 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001247#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Sixdde09132018-01-26 14:43:35 +01001248 case CFI_CMDSET_AMD_LEGACY:
1249 printf("AMD Legacy");
1250 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001251#endif
Mario Sixdde09132018-01-26 14:43:35 +01001252 default:
1253 printf("Unknown (%d)", info->vendor);
1254 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001255 }
Mario Six188a5562018-01-26 14:43:31 +01001256 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
Mario Sixc0350fb2018-01-26 14:43:55 +01001257 info->manufacturer_id);
Mario Six188a5562018-01-26 14:43:31 +01001258 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixc0350fb2018-01-26 14:43:55 +01001259 info->device_id);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001260 if ((info->device_id & 0xff) == 0x7E) {
1261 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixc0350fb2018-01-26 14:43:55 +01001262 info->device_id2);
Stefan Roese260421a2006-11-13 13:55:24 +01001263 }
Mario Six4f89da42018-01-26 14:43:42 +01001264 if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
Stefan Roesed2af0282012-12-06 15:44:12 +01001265 printf("\n Advanced Sector Protection (PPB) enabled");
Mario Six188a5562018-01-26 14:43:31 +01001266 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001267 info->erase_blk_tout, info->write_tout);
Stefan Roese260421a2006-11-13 13:55:24 +01001268 if (info->buffer_size > 1) {
Mario Six876c52f2018-01-26 14:43:50 +01001269 printf(" Buffer write timeout: %ld ms, ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001270 info->buffer_write_tout);
Mario Six876c52f2018-01-26 14:43:50 +01001271 printf("buffer size: %d bytes\n", info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001272 }
wdenk5653fc32004-02-08 22:55:38 +00001273
Mario Six188a5562018-01-26 14:43:31 +01001274 puts("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001275 for (i = 0; i < info->sector_count; ++i) {
Kim Phillips2e973942010-07-26 18:35:39 -05001276 if (ctrlc())
Stefan Roese70084df2010-08-13 09:36:36 +02001277 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001278 if ((i % 5) == 0)
Stefan Roese70084df2010-08-13 09:36:36 +02001279 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001280#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001281 /* print empty and read-only info */
Mario Six188a5562018-01-26 14:43:31 +01001282 printf(" %08lX %c %s ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001283 info->start[i],
1284 sector_erased(info, i) ? 'E' : ' ',
1285 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001286#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Mario Six188a5562018-01-26 14:43:31 +01001287 printf(" %08lX %s ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001288 info->start[i],
1289 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001290#endif
1291 }
Mario Six188a5562018-01-26 14:43:31 +01001292 putc('\n');
wdenk5653fc32004-02-08 22:55:38 +00001293}
1294
1295/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001296 * This is used in a few places in write_buf() to show programming
1297 * progress. Making it a function is nasty because it needs to do side
1298 * effect updates to digit and dots. Repeated code is nasty too, so
1299 * we define it once here.
1300 */
Stefan Roesef0105722008-03-19 07:09:26 +01001301#ifdef CONFIG_FLASH_SHOW_PROGRESS
1302#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001303 if (flash_verbose) { \
1304 dots -= dots_sub; \
Mario Six4f89da42018-01-26 14:43:42 +01001305 if (scale > 0 && dots <= 0) { \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001306 if ((digit % 5) == 0) \
Mario Six188a5562018-01-26 14:43:31 +01001307 printf("%d", digit / 5); \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001308 else \
Mario Six188a5562018-01-26 14:43:31 +01001309 putc('.'); \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001310 digit--; \
1311 dots += scale; \
1312 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001313 }
Stefan Roesef0105722008-03-19 07:09:26 +01001314#else
1315#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1316#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001317
1318/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001319 * Copy memory to flash, returns:
1320 * 0 - OK
1321 * 1 - write timeout
1322 * 2 - Flash not erased
1323 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001324int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001325{
1326 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001327 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001328 int aln;
1329 cfiword_t cword;
1330 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001331#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001332 int buffered_size;
1333#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001334#ifdef CONFIG_FLASH_SHOW_PROGRESS
1335 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1336 int scale = 0;
1337 int dots = 0;
1338
1339 /*
1340 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1341 */
1342 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1343 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1344 CONFIG_FLASH_SHOW_PROGRESS);
1345 }
1346#endif
1347
wdenkbf9e3b32004-02-12 00:47:09 +00001348 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001349 wp = (addr & ~(info->portwidth - 1));
1350
1351 /* handle unaligned start */
Mario Sixd3525b62018-01-26 14:43:48 +01001352 aln = addr - wp;
1353 if (aln != 0) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001354 cword.w32 = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001355 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001356 for (i = 0; i < aln; ++i)
Mario Six188a5562018-01-26 14:43:31 +01001357 flash_add_byte(info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001358
wdenkbf9e3b32004-02-12 00:47:09 +00001359 for (; (i < info->portwidth) && (cnt > 0); i++) {
Mario Six188a5562018-01-26 14:43:31 +01001360 flash_add_byte(info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001361 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001362 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001363 for (; (cnt == 0) && (i < info->portwidth); ++i)
Mario Six188a5562018-01-26 14:43:31 +01001364 flash_add_byte(info, &cword, flash_read8(p + i));
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001365
Mario Six188a5562018-01-26 14:43:31 +01001366 rc = flash_write_cfiword(info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001367 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001368 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001369
1370 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001371 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001372 }
1373
wdenkbf9e3b32004-02-12 00:47:09 +00001374 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001375#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001376 buffered_size = (info->portwidth / info->chipwidth);
1377 buffered_size *= info->buffer_size;
1378 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001379 /* prohibit buffer write when buffer_size is 1 */
1380 if (info->buffer_size == 1) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001381 cword.w32 = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01001382 for (i = 0; i < info->portwidth; i++)
Mario Six188a5562018-01-26 14:43:31 +01001383 flash_add_byte(info, &cword, *src++);
Mario Sixd3525b62018-01-26 14:43:48 +01001384 rc = flash_write_cfiword(info, wp, cword);
1385 if (rc != 0)
Stefan Roese79b4cda2006-02-28 15:29:58 +01001386 return rc;
1387 wp += info->portwidth;
1388 cnt -= info->portwidth;
1389 continue;
1390 }
1391
1392 /* write buffer until next buffered_size aligned boundary */
1393 i = buffered_size - (wp % buffered_size);
1394 if (i > cnt)
1395 i = cnt;
Mario Sixd3525b62018-01-26 14:43:48 +01001396 rc = flash_write_cfibuffer(info, wp, src, i);
1397 if (rc != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001398 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001399 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001400 wp += i;
1401 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001402 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001403 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Joe Hershbergerde15a062012-08-17 15:36:41 -05001404 /* Only check every once in a while */
1405 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1406 return ERR_ABORTED;
wdenk5653fc32004-02-08 22:55:38 +00001407 }
1408#else
wdenkbf9e3b32004-02-12 00:47:09 +00001409 while (cnt >= info->portwidth) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001410 cword.w32 = 0;
Mario Six0412e902018-01-26 14:43:38 +01001411 for (i = 0; i < info->portwidth; i++)
Mario Six188a5562018-01-26 14:43:31 +01001412 flash_add_byte(info, &cword, *src++);
Mario Sixd3525b62018-01-26 14:43:48 +01001413 rc = flash_write_cfiword(info, wp, cword);
1414 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001415 return rc;
1416 wp += info->portwidth;
1417 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001418 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
Joe Hershbergerde15a062012-08-17 15:36:41 -05001419 /* Only check every once in a while */
1420 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1421 return ERR_ABORTED;
wdenk5653fc32004-02-08 22:55:38 +00001422 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001423#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001424
Mario Six0412e902018-01-26 14:43:38 +01001425 if (cnt == 0)
wdenk5653fc32004-02-08 22:55:38 +00001426 return (0);
wdenk5653fc32004-02-08 22:55:38 +00001427
1428 /*
1429 * handle unaligned tail bytes
1430 */
Ryan Harkin622b9522015-10-23 16:50:51 +01001431 cword.w32 = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001432 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001433 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
Mario Six188a5562018-01-26 14:43:31 +01001434 flash_add_byte(info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001435 --cnt;
1436 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001437 for (; i < info->portwidth; ++i)
Mario Six188a5562018-01-26 14:43:31 +01001438 flash_add_byte(info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001439
Mario Six188a5562018-01-26 14:43:31 +01001440 return flash_write_cfiword(info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001441}
1442
Stefan Roese20043a42012-12-06 15:44:09 +01001443static inline int manufact_match(flash_info_t *info, u32 manu)
1444{
1445 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1446}
1447
wdenk5653fc32004-02-08 22:55:38 +00001448/*-----------------------------------------------------------------------
1449 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001450#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001451
Holger Brunck81316a92012-08-09 10:22:41 +02001452static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1453{
Mario Six88ecd8b2018-01-26 14:43:39 +01001454 if (manufact_match(info, INTEL_MANUFACT) &&
Mario Sixc0350fb2018-01-26 14:43:55 +01001455 info->device_id == NUMONYX_256MBIT) {
Holger Brunck81316a92012-08-09 10:22:41 +02001456 /*
1457 * see errata called
1458 * "Numonyx Axcell P33/P30 Specification Update" :)
1459 */
1460 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1461 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1462 prot)) {
1463 /*
1464 * cmd must come before FLASH_CMD_PROTECT + 20us
1465 * Disable interrupts which might cause a timeout here.
1466 */
1467 int flag = disable_interrupts();
1468 unsigned short cmd;
1469
1470 if (prot)
1471 cmd = FLASH_CMD_PROTECT_SET;
1472 else
1473 cmd = FLASH_CMD_PROTECT_CLEAR;
Andre Przywara58eab322016-11-16 00:50:06 +00001474
1475 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
Holger Brunck81316a92012-08-09 10:22:41 +02001476 flash_write_cmd(info, sector, 0, cmd);
1477 /* re-enable interrupts if necessary */
1478 if (flag)
1479 enable_interrupts();
1480 }
1481 return 1;
1482 }
1483 return 0;
1484}
1485
Mario Sixca2b07a2018-01-26 14:43:32 +01001486int flash_real_protect(flash_info_t *info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001487{
1488 int retcode = 0;
1489
Rafael Camposbc9019e2008-07-31 10:22:20 +02001490 switch (info->vendor) {
Mario Sixdde09132018-01-26 14:43:35 +01001491 case CFI_CMDSET_INTEL_PROG_REGIONS:
1492 case CFI_CMDSET_INTEL_STANDARD:
1493 case CFI_CMDSET_INTEL_EXTENDED:
1494 if (!cfi_protect_bugfix(info, sector, prot)) {
1495 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001496 FLASH_CMD_CLEAR_STATUS);
Mario Sixdde09132018-01-26 14:43:35 +01001497 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001498 FLASH_CMD_PROTECT);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001499 if (prot)
Mario Sixdde09132018-01-26 14:43:35 +01001500 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001501 FLASH_CMD_PROTECT_SET);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001502 else
Mario Sixdde09132018-01-26 14:43:35 +01001503 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001504 FLASH_CMD_PROTECT_CLEAR);
Mario Sixdde09132018-01-26 14:43:35 +01001505 }
1506 break;
1507 case CFI_CMDSET_AMD_EXTENDED:
1508 case CFI_CMDSET_AMD_STANDARD:
1509 /* U-Boot only checks the first byte */
1510 if (manufact_match(info, ATM_MANUFACT)) {
1511 if (prot) {
1512 flash_unlock_seq(info, 0);
1513 flash_write_cmd(info, 0,
1514 info->addr_unlock1,
1515 ATM_CMD_SOFTLOCK_START);
1516 flash_unlock_seq(info, 0);
1517 flash_write_cmd(info, sector, 0,
1518 ATM_CMD_LOCK_SECT);
1519 } else {
1520 flash_write_cmd(info, 0,
1521 info->addr_unlock1,
1522 AMD_CMD_UNLOCK_START);
1523 if (info->device_id == ATM_ID_BV6416)
1524 flash_write_cmd(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001525 0, ATM_CMD_UNLOCK_SECT);
Mario Sixdde09132018-01-26 14:43:35 +01001526 }
1527 }
1528 if (info->legacy_unlock) {
1529 int flag = disable_interrupts();
1530 int lock_flag;
1531
1532 flash_unlock_seq(info, 0);
1533 flash_write_cmd(info, 0, info->addr_unlock1,
1534 AMD_CMD_SET_PPB_ENTRY);
1535 lock_flag = flash_isset(info, sector, 0, 0x01);
1536 if (prot) {
1537 if (lock_flag) {
1538 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001539 AMD_CMD_PPB_LOCK_BC1);
Mario Sixdde09132018-01-26 14:43:35 +01001540 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001541 AMD_CMD_PPB_LOCK_BC2);
Mario Sixdde09132018-01-26 14:43:35 +01001542 }
1543 debug("sector %ld %slocked\n", sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001544 lock_flag ? "" : "already ");
Mario Sixdde09132018-01-26 14:43:35 +01001545 } else {
1546 if (!lock_flag) {
1547 debug("unlock %ld\n", sector);
1548 flash_write_cmd(info, 0, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001549 AMD_CMD_PPB_UNLOCK_BC1);
Mario Sixdde09132018-01-26 14:43:35 +01001550 flash_write_cmd(info, 0, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001551 AMD_CMD_PPB_UNLOCK_BC2);
Mario Sixdde09132018-01-26 14:43:35 +01001552 }
1553 debug("sector %ld %sunlocked\n", sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001554 !lock_flag ? "" : "already ");
Mario Sixdde09132018-01-26 14:43:35 +01001555 }
1556 if (flag)
1557 enable_interrupts();
1558
1559 if (flash_status_check(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001560 info->erase_blk_tout,
1561 prot ? "protect" : "unprotect"))
Mario Sixdde09132018-01-26 14:43:35 +01001562 printf("status check error\n");
1563
1564 flash_write_cmd(info, 0, 0,
1565 AMD_CMD_SET_PPB_EXIT_BC1);
1566 flash_write_cmd(info, 0, 0,
1567 AMD_CMD_SET_PPB_EXIT_BC2);
1568 }
1569 break;
1570#ifdef CONFIG_FLASH_CFI_LEGACY
1571 case CFI_CMDSET_AMD_LEGACY:
1572 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1573 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1574 if (prot)
Mario Sixddcf0542018-01-26 14:43:54 +01001575 flash_write_cmd(info, sector, 0,
1576 FLASH_CMD_PROTECT_SET);
Mario Sixdde09132018-01-26 14:43:35 +01001577 else
Mario Sixddcf0542018-01-26 14:43:54 +01001578 flash_write_cmd(info, sector, 0,
1579 FLASH_CMD_PROTECT_CLEAR);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001580#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001581 };
wdenk5653fc32004-02-08 22:55:38 +00001582
Stefan Roesedf4e8132010-10-25 18:31:29 +02001583 /*
1584 * Flash needs to be in status register read mode for
1585 * flash_full_status_check() to work correctly
1586 */
1587 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
Mario Sixd3525b62018-01-26 14:43:48 +01001588 retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
Mario Sixc0350fb2018-01-26 14:43:55 +01001589 prot ? "protect" : "unprotect");
Mario Sixd3525b62018-01-26 14:43:48 +01001590 if (retcode == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001591 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001592
1593 /*
1594 * On some of Intel's flash chips (marked via legacy_unlock)
1595 * unprotect unprotects all locking.
1596 */
Mario Six4f89da42018-01-26 14:43:42 +01001597 if (prot == 0 && info->legacy_unlock) {
wdenk5653fc32004-02-08 22:55:38 +00001598 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001599
1600 for (i = 0; i < info->sector_count; i++) {
1601 if (info->protect[i])
Mario Six188a5562018-01-26 14:43:31 +01001602 flash_real_protect(info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001603 }
1604 }
1605 }
wdenk5653fc32004-02-08 22:55:38 +00001606 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001607}
1608
wdenk5653fc32004-02-08 22:55:38 +00001609/*-----------------------------------------------------------------------
1610 * flash_read_user_serial - read the OneTimeProgramming cells
1611 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001612void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixc0350fb2018-01-26 14:43:55 +01001613 int len)
wdenk5653fc32004-02-08 22:55:38 +00001614{
wdenkbf9e3b32004-02-12 00:47:09 +00001615 uchar *src;
1616 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001617
1618 dst = buffer;
Mario Six188a5562018-01-26 14:43:31 +01001619 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1620 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1621 memcpy(dst, src + offset, len);
1622 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001623 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001624 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001625}
wdenkbf9e3b32004-02-12 00:47:09 +00001626
wdenk5653fc32004-02-08 22:55:38 +00001627/*
1628 * flash_read_factory_serial - read the device Id from the protection area
1629 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001630void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixc0350fb2018-01-26 14:43:55 +01001631 int len)
wdenk5653fc32004-02-08 22:55:38 +00001632{
wdenkbf9e3b32004-02-12 00:47:09 +00001633 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001634
Mario Six188a5562018-01-26 14:43:31 +01001635 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1636 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1637 memcpy(buffer, src + offset, len);
1638 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001639 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001640 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001641}
1642
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001643#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001644
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001645/*-----------------------------------------------------------------------
1646 * Reverse the order of the erase regions in the CFI QRY structure.
1647 * This is needed for chips that are either a) correctly detected as
1648 * top-boot, or b) buggy.
1649 */
1650static void cfi_reverse_geometry(struct cfi_qry *qry)
1651{
1652 unsigned int i, j;
1653 u32 tmp;
1654
1655 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
Mario Six4f89da42018-01-26 14:43:42 +01001656 tmp = get_unaligned(&qry->erase_region_info[i]);
1657 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1658 &qry->erase_region_info[i]);
1659 put_unaligned(tmp, &qry->erase_region_info[j]);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001660 }
1661}
wdenk5653fc32004-02-08 22:55:38 +00001662
1663/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001664 * read jedec ids from device and set corresponding fields in info struct
1665 *
1666 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1667 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001668 */
1669static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1670{
1671 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001672 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001673 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1674 udelay(1000); /* some flash are slow to respond */
Mario Six188a5562018-01-26 14:43:31 +01001675 info->manufacturer_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001676 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001677 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
Mario Six188a5562018-01-26 14:43:31 +01001678 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1679 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001680 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1681}
1682
1683static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1684{
1685 info->cmd_reset = FLASH_CMD_RESET;
1686
1687 cmdset_intel_read_jedec_ids(info);
1688 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1689
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001690#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001691 /* read legacy lock/unlock bit from intel flash */
1692 if (info->ext_addr) {
Mario Sixc0350fb2018-01-26 14:43:55 +01001693 info->legacy_unlock =
1694 flash_read_uchar(info, info->ext_addr + 5) & 0x08;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001695 }
1696#endif
1697
1698 return 0;
1699}
1700
1701static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1702{
Mario Sixc8a9a822018-01-26 14:43:51 +01001703 ushort bank_id = 0;
1704 uchar manu_id;
York Sun2544f472017-11-18 11:09:08 -08001705 uchar feature;
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001706
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001707 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1708 flash_unlock_seq(info, 0);
1709 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1710 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001711
Mario Sixc8a9a822018-01-26 14:43:51 +01001712 manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001713 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
Mario Sixc8a9a822018-01-26 14:43:51 +01001714 while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1715 bank_id += 0x100;
1716 manu_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001717 bank_id | FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001718 }
Mario Sixc8a9a822018-01-26 14:43:51 +01001719 info->manufacturer_id = manu_id;
Tor Krill90447ec2008-03-28 11:29:10 +01001720
York Sun2544f472017-11-18 11:09:08 -08001721 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1722 info->ext_addr, info->cfi_version);
1723 if (info->ext_addr && info->cfi_version >= 0x3134) {
1724 /* read software feature (at 0x53) */
1725 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1726 debug("feature = 0x%x\n", feature);
1727 info->sr_supported = feature & 0x1;
1728 }
Marek Vasut72443c72017-09-12 19:09:31 +02001729
Mario Sixb1683862018-01-26 14:43:33 +01001730 switch (info->chipwidth) {
Tor Krill90447ec2008-03-28 11:29:10 +01001731 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +01001732 info->device_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001733 FLASH_OFFSET_DEVICE_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001734 if (info->device_id == 0x7E) {
1735 /* AMD 3-byte (expanded) device ids */
Mario Six188a5562018-01-26 14:43:31 +01001736 info->device_id2 = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001737 FLASH_OFFSET_DEVICE_ID2);
Tor Krill90447ec2008-03-28 11:29:10 +01001738 info->device_id2 <<= 8;
Mario Six188a5562018-01-26 14:43:31 +01001739 info->device_id2 |= flash_read_uchar(info,
Tor Krill90447ec2008-03-28 11:29:10 +01001740 FLASH_OFFSET_DEVICE_ID3);
1741 }
1742 break;
1743 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +01001744 info->device_id = flash_read_word(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001745 FLASH_OFFSET_DEVICE_ID);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001746 if ((info->device_id & 0xff) == 0x7E) {
1747 /* AMD 3-byte (expanded) device ids */
Mario Six188a5562018-01-26 14:43:31 +01001748 info->device_id2 = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001749 FLASH_OFFSET_DEVICE_ID2);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001750 info->device_id2 <<= 8;
Mario Six188a5562018-01-26 14:43:31 +01001751 info->device_id2 |= flash_read_uchar(info,
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001752 FLASH_OFFSET_DEVICE_ID3);
1753 }
Tor Krill90447ec2008-03-28 11:29:10 +01001754 break;
1755 default:
1756 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001757 }
1758 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001759 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001760}
1761
1762static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1763{
1764 info->cmd_reset = AMD_CMD_RESET;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01001765 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001766
1767 cmdset_amd_read_jedec_ids(info);
1768 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1769
Anatolij Gustschin66863b02012-08-09 08:18:12 +02001770#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roeseac6b9112012-12-06 15:44:11 +01001771 if (info->ext_addr) {
1772 /* read sector protect/unprotect scheme (at 0x49) */
1773 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
Anatolij Gustschin66863b02012-08-09 08:18:12 +02001774 info->legacy_unlock = 1;
1775 }
1776#endif
1777
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001778 return 0;
1779}
1780
1781#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Sixca2b07a2018-01-26 14:43:32 +01001782static void flash_read_jedec_ids(flash_info_t *info)
Stefan Roese260421a2006-11-13 13:55:24 +01001783{
1784 info->manufacturer_id = 0;
1785 info->device_id = 0;
1786 info->device_id2 = 0;
1787
1788 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001789 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001790 case CFI_CMDSET_INTEL_STANDARD:
1791 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001792 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001793 break;
1794 case CFI_CMDSET_AMD_STANDARD:
1795 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001796 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001797 break;
1798 default:
1799 break;
1800 }
1801}
1802
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001803/*-----------------------------------------------------------------------
1804 * Call board code to request info about non-CFI flash.
1805 * board_flash_get_legacy needs to fill in at least:
1806 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1807 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001808static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001809{
1810 flash_info_t *info = &flash_info[banknum];
1811
1812 if (board_flash_get_legacy(base, banknum, info)) {
1813 /* board code may have filled info completely. If not, we
Mario Sixa6d18f22018-01-26 14:43:41 +01001814 * use JEDEC ID probing.
1815 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001816 if (!info->vendor) {
1817 int modes[] = {
1818 CFI_CMDSET_AMD_STANDARD,
1819 CFI_CMDSET_INTEL_STANDARD
1820 };
1821 int i;
1822
Axel Lin31bf0f52013-06-23 00:56:46 +08001823 for (i = 0; i < ARRAY_SIZE(modes); i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001824 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001825 info->start[0] =
1826 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001827 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001828 MAP_NOCACHE);
Mario Six88ecd8b2018-01-26 14:43:39 +01001829 if (info->portwidth == FLASH_CFI_8BIT &&
Mario Sixc0350fb2018-01-26 14:43:55 +01001830 info->interface == FLASH_CFI_X8X16) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001831 info->addr_unlock1 = 0x2AAA;
1832 info->addr_unlock2 = 0x5555;
1833 } else {
1834 info->addr_unlock1 = 0x5555;
1835 info->addr_unlock2 = 0x2AAA;
1836 }
1837 flash_read_jedec_ids(info);
1838 debug("JEDEC PROBE: ID %x %x %x\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001839 info->manufacturer_id,
1840 info->device_id,
1841 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001842 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001843 break;
Mario Six98601372018-01-26 14:43:45 +01001844
1845 unmap_physmem((void *)info->start[0],
1846 info->portwidth);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001847 }
1848 }
1849
Mario Sixb1683862018-01-26 14:43:33 +01001850 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001851 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001852 case CFI_CMDSET_INTEL_STANDARD:
1853 case CFI_CMDSET_INTEL_EXTENDED:
1854 info->cmd_reset = FLASH_CMD_RESET;
1855 break;
1856 case CFI_CMDSET_AMD_STANDARD:
1857 case CFI_CMDSET_AMD_EXTENDED:
1858 case CFI_CMDSET_AMD_LEGACY:
1859 info->cmd_reset = AMD_CMD_RESET;
1860 break;
1861 }
1862 info->flash_id = FLASH_MAN_CFI;
1863 return 1;
1864 }
1865 return 0; /* use CFI */
1866}
1867#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001868static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001869{
1870 return 0; /* use CFI */
1871}
1872#endif
1873
Stefan Roese260421a2006-11-13 13:55:24 +01001874/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001875 * detect if flash is compatible with the Common Flash Interface (CFI)
1876 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001877 */
Mario Sixc0350fb2018-01-26 14:43:55 +01001878static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1879 size_t len)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001880{
1881 u8 *p = buf;
1882 unsigned int i;
1883
1884 for (i = 0; i < len; i++)
Stefan Roesee303be22013-04-12 19:04:54 +02001885 p[i] = flash_read_uchar(info, start + i);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001886}
1887
Kim Phillips11dc4012012-10-29 13:34:45 +00001888static void __flash_cmd_reset(flash_info_t *info)
Stefan Roesefa36ae72009-10-27 15:15:55 +01001889{
1890 /*
1891 * We do not yet know what kind of commandset to use, so we issue
1892 * the reset command in both Intel and AMD variants, in the hope
1893 * that AMD flash roms ignore the Intel command.
1894 */
1895 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001896 udelay(1);
Stefan Roesefa36ae72009-10-27 15:15:55 +01001897 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1898}
Mario Six7223a8c2018-01-26 14:43:37 +01001899
Stefan Roesefa36ae72009-10-27 15:15:55 +01001900void flash_cmd_reset(flash_info_t *info)
Mario Six640f4e32018-01-26 14:43:36 +01001901 __attribute__((weak, alias("__flash_cmd_reset")));
Stefan Roesefa36ae72009-10-27 15:15:55 +01001902
Mario Sixca2b07a2018-01-26 14:43:32 +01001903static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001904{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001905 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001906
Stefan Roesee303be22013-04-12 19:04:54 +02001907 /* Issue FLASH reset command */
1908 flash_cmd_reset(info);
1909
Axel Lin31bf0f52013-06-23 00:56:46 +08001910 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001911 cfi_offset++) {
Mario Six188a5562018-01-26 14:43:31 +01001912 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
Mario Sixc0350fb2018-01-26 14:43:55 +01001913 FLASH_CMD_CFI);
Mario Six88ecd8b2018-01-26 14:43:39 +01001914 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
Mario Sixddcf0542018-01-26 14:43:54 +01001915 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1916 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Mario Sixc0350fb2018-01-26 14:43:55 +01001917 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1918 sizeof(struct cfi_qry));
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001919 info->interface = le16_to_cpu(qry->interface_desc);
Stefan Roesee303be22013-04-12 19:04:54 +02001920
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001921 info->cfi_offset = flash_offset_cfi[cfi_offset];
Mario Six188a5562018-01-26 14:43:31 +01001922 debug("device interface is %d\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001923 info->interface);
Mario Six188a5562018-01-26 14:43:31 +01001924 debug("found port %d chip %d ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001925 info->portwidth, info->chipwidth);
Mario Six188a5562018-01-26 14:43:31 +01001926 debug("port %d bits chip %d bits\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001927 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1928 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001929
1930 /* calculate command offsets as in the Linux driver */
Stefan Roesee303be22013-04-12 19:04:54 +02001931 info->addr_unlock1 = 0x555;
1932 info->addr_unlock2 = 0x2aa;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001933
1934 /*
1935 * modify the unlock address if we are
1936 * in compatibility mode
1937 */
Mario Sixb1683862018-01-26 14:43:33 +01001938 if (/* x8/x16 in x8 mode */
Mario Six4f89da42018-01-26 14:43:42 +01001939 (info->chipwidth == FLASH_CFI_BY8 &&
1940 info->interface == FLASH_CFI_X8X16) ||
Mario Sixb1683862018-01-26 14:43:33 +01001941 /* x16/x32 in x16 mode */
Mario Six4f89da42018-01-26 14:43:42 +01001942 (info->chipwidth == FLASH_CFI_BY16 &&
Mario Six0cec0a12018-01-26 14:43:46 +01001943 info->interface == FLASH_CFI_X16X32)) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001944 info->addr_unlock1 = 0xaaa;
1945 info->addr_unlock2 = 0x555;
1946 }
1947
1948 info->name = "CFI conformant";
1949 return 1;
1950 }
1951 }
1952
1953 return 0;
1954}
1955
Mario Sixca2b07a2018-01-26 14:43:32 +01001956static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001957{
Mario Six188a5562018-01-26 14:43:31 +01001958 debug("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001959
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001960 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001961 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1962 for (info->chipwidth = FLASH_CFI_BY8;
1963 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001964 info->chipwidth <<= 1)
Stefan Roesee303be22013-04-12 19:04:54 +02001965 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001966 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001967 }
Mario Six188a5562018-01-26 14:43:31 +01001968 debug("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001969 return 0;
1970}
wdenkbf9e3b32004-02-12 00:47:09 +00001971
wdenk5653fc32004-02-08 22:55:38 +00001972/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001973 * Manufacturer-specific quirks. Add workarounds for geometry
1974 * reversal, etc. here.
1975 */
1976static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1977{
1978 /* check if flash geometry needs reversal */
1979 if (qry->num_erase_regions > 1) {
1980 /* reverse geometry if top boot part */
1981 if (info->cfi_version < 0x3131) {
1982 /* CFI < 1.1, try to guess from device id */
1983 if ((info->device_id & 0x80) != 0)
1984 cfi_reverse_geometry(qry);
Stefan Roesee303be22013-04-12 19:04:54 +02001985 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001986 /* CFI >= 1.1, deduct from top/bottom flag */
1987 /* note: ext_addr is valid since cfi_version > 0 */
1988 cfi_reverse_geometry(qry);
1989 }
1990 }
1991}
1992
1993static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1994{
1995 int reverse_geometry = 0;
1996
1997 /* Check the "top boot" bit in the PRI */
1998 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1999 reverse_geometry = 1;
2000
2001 /* AT49BV6416(T) list the erase regions in the wrong order.
2002 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01002003 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002004 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002005 if (info->device_id == 0xd6 || info->device_id == 0xd2)
2006 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002007
2008 if (reverse_geometry)
2009 cfi_reverse_geometry(qry);
2010}
2011
Richard Retanubune8eac432009-01-14 08:44:26 -05002012static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2013{
2014 /* check if flash geometry needs reversal */
2015 if (qry->num_erase_regions > 1) {
2016 /* reverse geometry if top boot part */
2017 if (info->cfi_version < 0x3131) {
Mike Frysinger6a011ce2011-04-10 16:06:29 -04002018 /* CFI < 1.1, guess by device id */
2019 if (info->device_id == 0x22CA || /* M29W320DT */
2020 info->device_id == 0x2256 || /* M29W320ET */
2021 info->device_id == 0x22D7) { /* M29W800DT */
Richard Retanubune8eac432009-01-14 08:44:26 -05002022 cfi_reverse_geometry(qry);
2023 }
Mike Frysinger4c2105c2011-05-09 18:33:36 -04002024 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2025 /* CFI >= 1.1, deduct from top/bottom flag */
2026 /* note: ext_addr is valid since cfi_version > 0 */
2027 cfi_reverse_geometry(qry);
Richard Retanubune8eac432009-01-14 08:44:26 -05002028 }
2029 }
2030}
2031
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002032static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2033{
2034 /*
2035 * SST, for many recent nor parallel flashes, says they are
2036 * CFI-conformant. This is not true, since qry struct.
2037 * reports a std. AMD command set (0x0002), while SST allows to
2038 * erase two different sector sizes for the same memory.
2039 * 64KB sector (SST call it block) needs 0x30 to be erased.
2040 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2041 * Since CFI query detect the 4KB number of sectors, users expects
2042 * a sector granularity of 4KB, and it is here set.
2043 */
2044 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2045 info->device_id == 0x5C23) { /* SST39VF3202B */
2046 /* set sector granularity to 4KB */
Mario Six640f4e32018-01-26 14:43:36 +01002047 info->cmd_erase_sector = 0x50;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002048 }
2049}
2050
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302051static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2052{
2053 /*
2054 * The M29EW devices seem to report the CFI information wrong
2055 * when it's in 8 bit mode.
2056 * There's an app note from Numonyx on this issue.
2057 * So adjust the buffer size for M29EW while operating in 8-bit mode
2058 */
Mario Six4f89da42018-01-26 14:43:42 +01002059 if (qry->max_buf_write_size > 0x8 &&
Mario Sixc0350fb2018-01-26 14:43:55 +01002060 info->device_id == 0x7E &&
2061 (info->device_id2 == 0x2201 ||
2062 info->device_id2 == 0x2301 ||
2063 info->device_id2 == 0x2801 ||
2064 info->device_id2 == 0x4801)) {
Mario Six876c52f2018-01-26 14:43:50 +01002065 debug("Adjusted buffer size on Numonyx flash");
2066 debug(" M29EW family in 8 bit mode\n");
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302067 qry->max_buf_write_size = 0x8;
2068 }
2069}
2070
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002071/*
wdenk5653fc32004-02-08 22:55:38 +00002072 * The following code cannot be run from FLASH!
2073 *
2074 */
Mario Six188a5562018-01-26 14:43:31 +01002075ulong flash_get_size(phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00002076{
wdenkbf9e3b32004-02-12 00:47:09 +00002077 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00002078 int i, j;
2079 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06002080 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00002081 unsigned long tmp;
2082 int size_ratio;
2083 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00002084 int erase_region_size;
2085 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002086 struct cfi_qry qry;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002087 unsigned long max_size;
Stefan Roese260421a2006-11-13 13:55:24 +01002088
Kumar Galaf9796902008-05-15 15:13:08 -05002089 memset(&qry, 0, sizeof(qry));
2090
Stefan Roese260421a2006-11-13 13:55:24 +01002091 info->ext_addr = 0;
2092 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002093#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02002094 info->legacy_unlock = 0;
2095#endif
wdenk5653fc32004-02-08 22:55:38 +00002096
Becky Bruce09ce9922009-02-02 16:34:51 -06002097 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00002098
Mario Six188a5562018-01-26 14:43:31 +01002099 if (flash_detect_cfi(info, &qry)) {
Mario Six4f89da42018-01-26 14:43:42 +01002100 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2101 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002102 num_erase_regions = qry.num_erase_regions;
2103
Stefan Roese260421a2006-11-13 13:55:24 +01002104 if (info->ext_addr) {
Mario Six640f4e32018-01-26 14:43:36 +01002105 info->cfi_version = (ushort)flash_read_uchar(info,
Stefan Roesee303be22013-04-12 19:04:54 +02002106 info->ext_addr + 3) << 8;
Mario Six640f4e32018-01-26 14:43:36 +01002107 info->cfi_version |= (ushort)flash_read_uchar(info,
Stefan Roesee303be22013-04-12 19:04:54 +02002108 info->ext_addr + 4);
Stefan Roese260421a2006-11-13 13:55:24 +01002109 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002110
wdenkbf9e3b32004-02-12 00:47:09 +00002111#ifdef DEBUG
Mario Six188a5562018-01-26 14:43:31 +01002112 flash_printqry(&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00002113#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002114
wdenkbf9e3b32004-02-12 00:47:09 +00002115 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002116 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00002117 case CFI_CMDSET_INTEL_STANDARD:
2118 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002119 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00002120 break;
2121 case CFI_CMDSET_AMD_STANDARD:
2122 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002123 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00002124 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002125 default:
2126 printf("CFI: Unknown command set 0x%x\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002127 info->vendor);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002128 /*
2129 * Unfortunately, this means we don't know how
2130 * to get the chip back to Read mode. Might
2131 * as well try an Intel-style reset...
2132 */
2133 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2134 return 0;
wdenk5653fc32004-02-08 22:55:38 +00002135 }
wdenkcd37d9e2004-02-10 00:03:41 +00002136
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002137 /* Do manufacturer-specific fixups */
2138 switch (info->manufacturer_id) {
Mario Schuknecht2c9f48a2011-02-21 13:13:14 +01002139 case 0x0001: /* AMD */
2140 case 0x0037: /* AMIC */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002141 flash_fixup_amd(info, &qry);
2142 break;
2143 case 0x001f:
2144 flash_fixup_atmel(info, &qry);
2145 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05002146 case 0x0020:
2147 flash_fixup_stm(info, &qry);
2148 break;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002149 case 0x00bf: /* SST */
2150 flash_fixup_sst(info, &qry);
2151 break;
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302152 case 0x0089: /* Numonyx */
2153 flash_fixup_num(info, &qry);
2154 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002155 }
2156
Mario Six188a5562018-01-26 14:43:31 +01002157 debug("manufacturer is %d\n", info->vendor);
2158 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2159 debug("device id is 0x%x\n", info->device_id);
2160 debug("device id2 is 0x%x\n", info->device_id2);
2161 debug("cfi version is 0x%04x\n", info->cfi_version);
Stefan Roese260421a2006-11-13 13:55:24 +01002162
wdenk5653fc32004-02-08 22:55:38 +00002163 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00002164 /* if the chip is x8/x16 reduce the ratio by half */
Mario Six4f89da42018-01-26 14:43:42 +01002165 if (info->interface == FLASH_CFI_X8X16 &&
Mario Sixc0350fb2018-01-26 14:43:55 +01002166 info->chipwidth == FLASH_CFI_BY8) {
wdenkbf9e3b32004-02-12 00:47:09 +00002167 size_ratio >>= 1;
2168 }
Mario Six188a5562018-01-26 14:43:31 +01002169 debug("size_ratio %d port %d bits chip %d bits\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002170 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2171 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002172 info->size = 1 << qry.dev_size;
2173 /* multiply the size by the number of chips */
2174 info->size *= size_ratio;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002175 max_size = cfi_flash_bank_size(banknum);
Mario Six4f89da42018-01-26 14:43:42 +01002176 if (max_size && info->size > max_size) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002177 debug("[truncated from %ldMiB]", info->size >> 20);
2178 info->size = max_size;
2179 }
Mario Six188a5562018-01-26 14:43:31 +01002180 debug("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00002181 sect_cnt = 0;
2182 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00002183 for (i = 0; i < num_erase_regions; i++) {
2184 if (i > NUM_ERASE_REGIONS) {
Mario Six188a5562018-01-26 14:43:31 +01002185 printf("%d erase regions found, only %d used\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002186 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00002187 break;
2188 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002189
Andrew Gabbasovaedadf12013-05-14 12:27:52 -05002190 tmp = le32_to_cpu(get_unaligned(
Mario Six4f89da42018-01-26 14:43:42 +01002191 &qry.erase_region_info[i]));
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002192 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002193
2194 erase_region_count = (tmp & 0xffff) + 1;
2195 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00002196 erase_region_size =
2197 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
Mario Sixddcf0542018-01-26 14:43:54 +01002198 debug("erase_region_count = %d ", erase_region_count);
2199 debug("erase_region_size = %d\n", erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00002200 for (j = 0; j < erase_region_count; j++) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002201 if (sector - base >= info->size)
2202 break;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002203 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002204 printf("ERROR: too many flash sectors\n");
2205 break;
2206 }
Becky Bruce09ce9922009-02-02 16:34:51 -06002207 info->start[sect_cnt] =
2208 (ulong)map_physmem(sector,
2209 info->portwidth,
2210 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00002211 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00002212
2213 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002214 * Only read protection status from
2215 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00002216 */
2217 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002218 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00002219 case CFI_CMDSET_INTEL_EXTENDED:
2220 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roesedf4e8132010-10-25 18:31:29 +02002221 /*
2222 * Set flash to read-id mode. Otherwise
2223 * reading protected status is not
2224 * guaranteed.
2225 */
2226 flash_write_cmd(info, sect_cnt, 0,
2227 FLASH_CMD_READ_ID);
wdenka1191902005-01-09 17:12:27 +00002228 info->protect[sect_cnt] =
Mario Six188a5562018-01-26 14:43:31 +01002229 flash_isset(info, sect_cnt,
Mario Sixc0350fb2018-01-26 14:43:55 +01002230 FLASH_OFFSET_PROTECT,
2231 FLASH_STATUS_PROTECT);
Vasily Khoruzhickedc498c2016-03-20 18:37:10 -07002232 flash_write_cmd(info, sect_cnt, 0,
2233 FLASH_CMD_RESET);
wdenka1191902005-01-09 17:12:27 +00002234 break;
Stefan Roese03deff42012-12-06 15:44:10 +01002235 case CFI_CMDSET_AMD_EXTENDED:
2236 case CFI_CMDSET_AMD_STANDARD:
Stefan Roeseac6b9112012-12-06 15:44:11 +01002237 if (!info->legacy_unlock) {
Stefan Roese03deff42012-12-06 15:44:10 +01002238 /* default: not protected */
2239 info->protect[sect_cnt] = 0;
2240 break;
2241 }
2242
2243 /* Read protection (PPB) from sector */
2244 flash_write_cmd(info, 0, 0,
2245 info->cmd_reset);
2246 flash_unlock_seq(info, 0);
2247 flash_write_cmd(info, 0,
2248 info->addr_unlock1,
2249 FLASH_CMD_READ_ID);
2250 info->protect[sect_cnt] =
2251 flash_isset(
2252 info, sect_cnt,
2253 FLASH_OFFSET_PROTECT,
2254 FLASH_STATUS_PROTECT);
2255 break;
wdenka1191902005-01-09 17:12:27 +00002256 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002257 /* default: not protected */
2258 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00002259 }
2260
wdenk5653fc32004-02-08 22:55:38 +00002261 sect_cnt++;
2262 }
2263 }
2264
2265 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002266 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2267 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002268 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002269 (1 << qry.block_erase_timeout_max);
2270 tmp = (1 << qry.buf_write_timeout_typ) *
2271 (1 << qry.buf_write_timeout_max);
2272
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002273 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002274 info->buffer_write_tout = (tmp + 999) / 1000;
2275 tmp = (1 << qry.word_write_timeout_typ) *
2276 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002277 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002278 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00002279 info->flash_id = FLASH_MAN_CFI;
Mario Six4f89da42018-01-26 14:43:42 +01002280 if (info->interface == FLASH_CFI_X8X16 &&
2281 info->chipwidth == FLASH_CFI_BY8) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002282 /* XXX - Need to test on x8/x16 in parallel. */
2283 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00002284 }
Mike Frysinger22159872008-10-02 01:55:38 -04002285
Mario Six188a5562018-01-26 14:43:31 +01002286 flash_write_cmd(info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00002287 }
2288
wdenkbf9e3b32004-02-12 00:47:09 +00002289 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00002290}
2291
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002292#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002293void flash_set_verbose(uint v)
2294{
2295 flash_verbose = v;
2296}
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002297#endif
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002298
Stefan Roese6f726f92010-10-25 18:31:48 +02002299static void cfi_flash_set_config_reg(u32 base, u16 val)
2300{
2301#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2302 /*
2303 * Only set this config register if really defined
2304 * to a valid value (0xffff is invalid)
2305 */
2306 if (val == 0xffff)
2307 return;
2308
2309 /*
2310 * Set configuration register. Data is "encrypted" in the 16 lower
2311 * address bits.
2312 */
2313 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2314 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2315
2316 /*
2317 * Finally issue reset-command to bring device back to
2318 * read-array mode
2319 */
2320 flash_write16(FLASH_CMD_RESET, (void *)base);
2321#endif
2322}
2323
wdenk5653fc32004-02-08 22:55:38 +00002324/*-----------------------------------------------------------------------
2325 */
Heiko Schocher6ee14162011-04-04 08:10:21 +02002326
Marek Vasut236c49a2017-08-20 17:20:00 +02002327static void flash_protect_default(void)
Heiko Schocher6ee14162011-04-04 08:10:21 +02002328{
Peter Tyser2c519832011-04-13 11:46:56 -05002329#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2330 int i;
2331 struct apl_s {
2332 ulong start;
2333 ulong size;
2334 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2335#endif
2336
Heiko Schocher6ee14162011-04-04 08:10:21 +02002337 /* Monitor protection ON by default */
Vignesh Raghavendrad75eacf2019-10-23 13:30:00 +05302338#if defined(CONFIG_SYS_MONITOR_BASE) && \
2339 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
Heiko Schocher6ee14162011-04-04 08:10:21 +02002340 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2341 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002342 CONFIG_SYS_MONITOR_BASE,
2343 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2344 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002345#endif
2346
2347 /* Environment protection ON by default */
2348#ifdef CONFIG_ENV_IS_IN_FLASH
2349 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002350 CONFIG_ENV_ADDR,
2351 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2352 flash_get_info(CONFIG_ENV_ADDR));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002353#endif
2354
2355 /* Redundant environment protection ON by default */
2356#ifdef CONFIG_ENV_ADDR_REDUND
2357 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002358 CONFIG_ENV_ADDR_REDUND,
2359 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2360 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002361#endif
2362
2363#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Axel Lin31bf0f52013-06-23 00:56:46 +08002364 for (i = 0; i < ARRAY_SIZE(apl); i++) {
Marek Vasut31d34142011-10-21 14:17:05 +00002365 debug("autoprotecting from %08lx to %08lx\n",
Heiko Schocher6ee14162011-04-04 08:10:21 +02002366 apl[i].start, apl[i].start + apl[i].size - 1);
2367 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002368 apl[i].start,
2369 apl[i].start + apl[i].size - 1,
2370 flash_get_info(apl[i].start));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002371 }
2372#endif
2373}
2374
Mario Six188a5562018-01-26 14:43:31 +01002375unsigned long flash_init(void)
wdenk5653fc32004-02-08 22:55:38 +00002376{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002377 unsigned long size = 0;
2378 int i;
wdenk5653fc32004-02-08 22:55:38 +00002379
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002380#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002381 /* read environment from EEPROM */
2382 char s[64];
Mario Six7223a8c2018-01-26 14:43:37 +01002383
Simon Glass00caae62017-08-03 12:22:12 -06002384 env_get_f("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002385#endif
wdenk5653fc32004-02-08 22:55:38 +00002386
Thomas Chouf1056912015-11-07 14:31:08 +08002387#ifdef CONFIG_CFI_FLASH /* for driver model */
2388 cfi_flash_init_dm();
2389#endif
2390
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002391 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002392 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002393 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002394
Stefan Roese6f726f92010-10-25 18:31:48 +02002395 /* Optionally write flash configuration register */
2396 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2397 cfi_flash_config_reg(i));
2398
Stefan Roeseb00e19c2010-08-30 10:11:51 +02002399 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002400 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002401 size += flash_info[i].size;
2402 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002403#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Mario Six876c52f2018-01-26 14:43:50 +01002404 printf("## Unknown flash on Bank %d ", i + 1);
2405 printf("- Size = 0x%08lx = %ld MB\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002406 flash_info[i].size,
2407 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002408#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002409 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002410#ifdef CONFIG_SYS_FLASH_PROTECTION
Jeroen Hofsteec15df212014-06-17 22:47:31 +02002411 else if (strcmp(s, "yes") == 0) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002412 /*
2413 * Only the U-Boot image and it's environment
2414 * is protected, all other sectors are
2415 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002416 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002417 * and the environment variable "unlock" is
2418 * set to "yes".
2419 */
2420 if (flash_info[i].legacy_unlock) {
2421 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002422
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002423 /*
2424 * Disable legacy_unlock temporarily,
2425 * since flash_real_protect would
2426 * relock all other sectors again
2427 * otherwise.
2428 */
2429 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002430
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002431 /*
2432 * Legacy unlocking (e.g. Intel J3) ->
2433 * unlock only one sector. This will
2434 * unlock all sectors.
2435 */
Mario Six188a5562018-01-26 14:43:31 +01002436 flash_real_protect(&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002437
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002438 flash_info[i].legacy_unlock = 1;
2439
2440 /*
2441 * Manually mark other sectors as
2442 * unlocked (unprotected)
2443 */
2444 for (k = 1; k < flash_info[i].sector_count; k++)
2445 flash_info[i].protect[k] = 0;
2446 } else {
2447 /*
2448 * No legancy unlocking -> unlock all sectors
2449 */
Mario Six188a5562018-01-26 14:43:31 +01002450 flash_protect(FLAG_PROTECT_CLEAR,
Mario Sixc0350fb2018-01-26 14:43:55 +01002451 flash_info[i].start[0],
2452 flash_info[i].start[0]
2453 + flash_info[i].size - 1,
2454 &flash_info[i]);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002455 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002456 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002457#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002458 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002459
Heiko Schocher6ee14162011-04-04 08:10:21 +02002460 flash_protect_default();
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002461#ifdef CONFIG_FLASH_CFI_MTD
2462 cfi_mtd_init();
2463#endif
2464
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002465 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002466}
Thomas Chouf1056912015-11-07 14:31:08 +08002467
2468#ifdef CONFIG_CFI_FLASH /* for driver model */
2469static int cfi_flash_probe(struct udevice *dev)
2470{
Andre Przywara492b9912020-09-24 00:22:04 +01002471 fdt_addr_t addr;
2472 int idx;
Thomas Chouf1056912015-11-07 14:31:08 +08002473
Andre Przywara492b9912020-09-24 00:22:04 +01002474 for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) {
2475 addr = dev_read_addr_index(dev, idx);
2476 if (addr == FDT_ADDR_T_NONE)
2477 break;
Mario Six8bfeb332018-03-28 14:38:41 +02002478
Marek Vasut1ec0a372017-09-12 19:09:08 +02002479 flash_info[cfi_flash_num_flash_banks].dev = dev;
2480 flash_info[cfi_flash_num_flash_banks].base = addr;
2481 cfi_flash_num_flash_banks++;
Thomas Chouf1056912015-11-07 14:31:08 +08002482 }
Marek Vasut1ec0a372017-09-12 19:09:08 +02002483 gd->bd->bi_flashstart = flash_info[0].base;
Thomas Chouf1056912015-11-07 14:31:08 +08002484
2485 return 0;
2486}
2487
2488static const struct udevice_id cfi_flash_ids[] = {
2489 { .compatible = "cfi-flash" },
2490 { .compatible = "jedec-flash" },
2491 {}
2492};
2493
2494U_BOOT_DRIVER(cfi_flash) = {
2495 .name = "cfi_flash",
2496 .id = UCLASS_MTD,
2497 .of_match = cfi_flash_ids,
2498 .probe = cfi_flash_probe,
2499};
2500#endif /* CONFIG_CFI_FLASH */