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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 8d8d7e93619b8aef77843cb718f973b0e3d00224 / . / drivers / usb / host / Kconfig
blob: e04cf9411ae5d8fde76911424db1e84bf0d79b92 [file] [log] [blame]
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]1#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900[diff] [blame]6config USB_HOST
7 bool
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]8 select DM_USB
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900[diff] [blame]9
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]10config USB_XHCI_HCD
11 bool "xHCI HCD (USB 3.0) support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]12 depends on DM && OF_CONTROL
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900[diff] [blame]13 select USB_HOST
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]14 ---help---
15 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
16 "SuperSpeed" host controller hardware.
17
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]18if USB_XHCI_HCD
19
Masahiro Yamada10db7502016-06-04 07:35:04 +0900[diff] [blame]20config USB_XHCI_DWC3
21 bool "DesignWare USB3 DRD Core Support"
22 help
23 Say Y or if your system has a Dual Role SuperSpeed
24 USB controller based on the DesignWare USB3 IP Core.
25
Neil Armstrongca7fdc82018-04-11 17:08:00 +0200[diff] [blame]26config USB_XHCI_DWC3_OF_SIMPLE
27 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
Jean-Jacques Hiblot103774b2018-04-12 10:41:10 +0200[diff] [blame]28 depends on DM_USB
Mark Kettenisaaa8d6b2019-06-30 18:01:54 +0200[diff] [blame]29 default y if ARCH_ROCKCHIP
Jean-Jacques Hiblotcc73ba92018-04-12 10:41:11 +0200[diff] [blame]30 default y if DRA7XX
Neil Armstrongca7fdc82018-04-11 17:08:00 +0200[diff] [blame]31 help
32 Support USB2/3 functionality in simple SoC integrations with
33 USB controller based on the DesignWare USB3 IP Core.
34
Chunfeng Yun74102832020-05-02 11:35:18 +0200[diff] [blame]35config USB_XHCI_MTK
36 bool "Support for MediaTek on-chip xHCI USB controller"
37 depends on ARCH_MEDIATEK
38 help
39 Enables support for the on-chip xHCI controller on MediaTek SoCs.
40
Stefan Roese81c1f6f2016-07-14 11:39:20 +0200[diff] [blame]41config USB_XHCI_MVEBU
42 bool "MVEBU USB 3.0 support"
43 default y
44 depends on ARCH_MVEBU
Konstantin Porotchkin81192b72017-02-12 11:10:30 +0200[diff] [blame]45 select DM_REGULATOR
Stefan Roese81c1f6f2016-07-14 11:39:20 +0200[diff] [blame]46 help
47 Choose this option to add support for USB 3.0 driver on mvebu
48 SoCs, which includes Armada8K, Armada3700 and other Armada
49 family SoCs.
50
Stefan Roese92ca2fe2020-08-24 13:04:38 +0200[diff] [blame]51config USB_XHCI_OCTEON
52 bool "Support for Marvell Octeon family on-chip xHCI USB controller"
53 depends on ARCH_OCTEON
54 default y
55 help
56 Enables support for the on-chip xHCI controller on Marvell Octeon
57 family SoCs. This is a driver for the dwc3 to provide the glue logic
58 to configure the controller.
59
Tom Rini8d8d7e92021-09-12 20:32:22 -0400[diff] [blame^]60config USB_XHCI_OMAP
61 bool "Support for TI OMAP family xHCI USB controller"
62 depends on ARCH_OMAP2PLUS
63 help
64 Enables support for the on-chip xHCI controller found on some TI SoC
65 families. Note that some families have multiple contollers while
66 others only have something such as DesignWare-based controllers.
67 Consult the SoC documentation to determine if this option applies
68 to your hardware.
69
Bin Mengd7cde282017-07-19 21:50:08 +0800[diff] [blame]70config USB_XHCI_PCI
71 bool "Support for PCI-based xHCI USB controller"
Bin Meng978f6a32017-07-19 21:51:07 +0800[diff] [blame]72 depends on DM_USB
Bin Mengd7cde282017-07-19 21:50:08 +0800[diff] [blame]73 default y if X86
74 help
75 Enables support for the PCI-based xHCI controller.
76
Marek Vasute1cc60c2017-10-15 15:01:29 +0200[diff] [blame]77config USB_XHCI_RCAR
78 bool "Renesas RCar USB 3.0 support"
79 default y
80 depends on ARCH_RMOBILE
81 help
82 Choose this option to add support for USB 3.0 driver on Renesas
83 RCar Gen3 SoCs.
84
Patrice Chotard40d1a312017-09-05 11:04:24 +0200[diff] [blame]85config USB_XHCI_STI
86 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
87 depends on ARCH_STI
88 default y
89 help
90 Enables support for the on-chip xHCI controller on STMicroelectronics
91 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
92 to configure the controller.
93
Uri Mashiachef3f3b82017-02-23 15:39:36 +0200[diff] [blame]94config USB_XHCI_DRA7XX_INDEX
95 int "DRA7XX xHCI USB index"
96 range 0 1
97 default 0
98 depends on DRA7XX
99 help
100 Select the DRA7XX xHCI USB index.
101 Current supported values: 0, 1.
102
Ran Wang420b0eb2017-10-23 10:09:22 +0800[diff] [blame]103config USB_XHCI_FSL
104 bool "Support for NXP Layerscape on-chip xHCI USB controller"
105 default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
106 depends on !SPL_NO_USB
107 help
108 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
Rayagonda Kokatanur9cadf052020-04-09 09:23:15 +0530[diff] [blame]109
110config USB_XHCI_BRCM
111 bool "Broadcom USB3 Host XHCI controller"
112 depends on DM_USB
113 help
114 USB controller based on the Broadcom USB3 IP Core.
115 Supports USB2/3 functionality.
116
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]117endif # USB_XHCI_HCD
Alexey Brodkinfee331f2015-12-14 17:18:50 +0300[diff] [blame]118
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]119config USB_EHCI_HCD
120 bool "EHCI HCD (USB 2.0) support"
Tom Rini64d6ac52017-05-12 22:33:28 -0400[diff] [blame]121 default y if ARCH_MX5 || ARCH_MX6
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]122 depends on DM && OF_CONTROL
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900[diff] [blame]123 select USB_HOST
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]124 ---help---
125 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
126 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
127 If your USB host controller supports USB 2.0, you will likely want to
128 configure this Host Controller Driver.
129
130 EHCI controllers are packaged with "companion" host controllers (OHCI
131 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
132 will connect to EHCI if the device is high speed, otherwise they
133 connect to a companion controller. If you configure EHCI, you should
134 probably configure the OHCI (for NEC and some other vendors) USB Host
135 Controller Driver or UHCI (for Via motherboards) Host Controller
136 Driver too.
137
138 You may want to read <file:Documentation/usb/ehci.txt>.
139
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900[diff] [blame]140if USB_EHCI_HCD
141
Wenyou Yang17b68b52016-08-05 08:57:35 +0800[diff] [blame]142config USB_EHCI_ATMEL
143 bool "Support for Atmel on-chip EHCI USB controller"
144 depends on ARCH_AT91
145 default y
146 ---help---
147 Enables support for the on-chip EHCI controller on Atmel chips.
148
Stefan Roesecd482252015-09-01 11:39:44 +0200[diff] [blame]149config USB_EHCI_MARVELL
Tom Rini80f1f322017-05-12 22:33:29 -0400[diff] [blame]150 bool "Support for Marvell on-chip EHCI USB controller"
Trevor Woernerbb0fb4c2020-05-06 08:02:40 -0400[diff] [blame]151 depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
Stefan Roesecd482252015-09-01 11:39:44 +0200[diff] [blame]152 default y
153 ---help---
154 Enables support for the on-chip EHCI controller on MVEBU SoCs.
155
Lukasz Majewski400b9722019-04-04 12:26:55 +0200[diff] [blame]156config USB_EHCI_MX5
157 bool "Support for i.MX5 on-chip EHCI USB controller"
158 depends on ARCH_MX5
Lukasz Majewski400b9722019-04-04 12:26:55 +0200[diff] [blame]159 help
160 Enables support for the on-chip EHCI controller on i.MX5 SoCs.
161
Nikita Kiryanov919e8022015-07-23 17:19:35 +0300[diff] [blame]162config USB_EHCI_MX6
Ye Li235f5e12019-10-24 10:29:32 -0300[diff] [blame]163 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
Giulio Benettie7e81e82021-05-20 16:10:15 +0200[diff] [blame]164 depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
Nikita Kiryanov919e8022015-07-23 17:19:35 +0300[diff] [blame]165 default y
166 ---help---
167 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
168
Stefan Agner2deebe22016-07-13 00:25:36 -0700[diff] [blame]169config USB_EHCI_MX7
170 bool "Support for i.MX7 on-chip EHCI USB controller"
Marek Vasut5e7e2a82021-04-02 14:07:22 +0200[diff] [blame]171 depends on ARCH_MX7 || IMX8M
172 select PHY if IMX8M
173 select NOP_PHY if IMX8M
Stefan Agner2deebe22016-07-13 00:25:36 -0700[diff] [blame]174 default y
175 ---help---
176 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
177
Tom Rini1d1ab612017-05-12 22:33:30 -0400[diff] [blame]178config USB_EHCI_OMAP
179 bool "Support for OMAP3+ on-chip EHCI USB controller"
180 depends on ARCH_OMAP2PLUS
181 default y
182 ---help---
183 Enables support for the on-chip EHCI controller on OMAP3 and later
184 SoCs.
185
Marcel Ziswiler20df4b52019-03-25 17:24:54 +0100[diff] [blame]186config USB_EHCI_VF
187 bool "Support for Vybrid on-chip EHCI USB controller"
188 depends on ARCH_VF610
189 default y
190 help
191 Enables support for the on-chip EHCI controller on Vybrid SoCs.
192
Ye Li235f5e12019-10-24 10:29:32 -0300[diff] [blame]193if USB_EHCI_MX6 || USB_EHCI_MX7
Stefan Agnerc4483092016-07-13 00:25:38 -0700[diff] [blame]194
195config MXC_USB_OTG_HACTIVE
196 bool "USB Power pin high active"
197 ---help---
198 Set the USB Power pin polarity to be high active (PWR_POL)
199
200endif
201
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200[diff] [blame]202config USB_EHCI_MSM
203 bool "Support for Qualcomm on-chip EHCI USB controller"
204 depends on DM_USB
205 select USB_ULPI_VIEWPORT
Ramon Fried0ac0b6e2018-09-21 13:35:50 +0300[diff] [blame]206 select MSM8916_USB_PHY
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200[diff] [blame]207 ---help---
208 Enables support for the on-chip EHCI controller on Qualcomm
209 Snapdragon SoCs.
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200[diff] [blame]210
Bin Menga11a5b82017-08-09 00:21:54 -0700[diff] [blame]211config USB_EHCI_PCI
212 bool "Support for PCI-based EHCI USB controller"
213 default y if X86
214 help
215 Enables support for the PCI-based EHCI controller.
216
Peter Robinson747fed52019-02-20 12:17:27 +0000[diff] [blame]217config USB_EHCI_TEGRA
218 bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
Trevor Woerner18138ab2020-05-06 08:02:41 -0400[diff] [blame]219 depends on ARCH_TEGRA
Peter Robinson747fed52019-02-20 12:17:27 +0000[diff] [blame]220 ---help---
221 Enable support for Tegra on-chip EHCI USB controller
222
Siva Durga Prasad Paladugu2cdc7782016-07-22 14:51:51 +0530[diff] [blame]223config USB_EHCI_ZYNQ
224 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
Michal Simek54fdef22020-08-24 14:41:51 +0200[diff] [blame]225 default y if ARCH_ZYNQ
Siva Durga Prasad Paladugu2cdc7782016-07-22 14:51:51 +0530[diff] [blame]226 ---help---
227 Enable support for Zynq on-chip EHCI USB controller
228
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300[diff] [blame]229config USB_EHCI_GENERIC
230 bool "Support for generic EHCI USB controller"
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300[diff] [blame]231 depends on DM_USB
Jagan Teki29d280c2018-12-22 18:18:10 +0530[diff] [blame]232 default ARCH_SUNXI
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300[diff] [blame]233 ---help---
234 Enables support for generic EHCI controller.
235
Ran Wang91f4fb92017-12-20 10:34:20 +0800[diff] [blame]236config USB_EHCI_FSL
237 bool "Support for FSL on-chip EHCI USB controller"
Ran Wang91f4fb92017-12-20 10:34:20 +0800[diff] [blame]238 select CONFIG_EHCI_HCD_INIT_AFTER_RESET
239 ---help---
240 Enables support for the on-chip EHCI controller on FSL chips.
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]241endif # USB_EHCI_HCD
242
243config USB_OHCI_HCD
244 bool "OHCI HCD (USB 1.1) support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]245 depends on DM && OF_CONTROL
246 select USB_HOST
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]247 ---help---
248 The Open Host Controller Interface (OHCI) is a standard for accessing
249 USB 1.1 host controller hardware. It does more in hardware than Intel's
250 UHCI specification. If your USB host controller follows the OHCI spec,
251 say Y. On most non-x86 systems, and on x86 hardware that's not using a
252 USB controller from Intel or VIA, this is appropriate. If your host
253 controller doesn't use PCI, this is probably appropriate. For a PCI
254 based system where you're not sure, the "lspci -v" entry will list the
255 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
256
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]257if USB_OHCI_HCD
258
Heiko Schocher991e6602019-07-16 10:49:07 +0200[diff] [blame]259config USB_OHCI_PCI
260 bool "Support for PCI-based OHCI USB controller"
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]261 depends on PCI
Heiko Schocher991e6602019-07-16 10:49:07 +0200[diff] [blame]262 help
263 Enables support for the PCI-based OHCI controller.
264
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]265config USB_OHCI_GENERIC
266 bool "Support for generic OHCI USB controller"
Jagan Teki29d280c2018-12-22 18:18:10 +0530[diff] [blame]267 default ARCH_SUNXI
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]268 ---help---
269 Enables support for generic OHCI controller.
270
Adam Ford9da54742019-04-30 05:21:41 -0500[diff] [blame]271config USB_OHCI_DA8XX
272 bool "Support for da850 OHCI USB controller"
273 help
274 Enable support for the da850 USB controller.
275
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900[diff] [blame]276endif # USB_OHCI_HCD
Masahiro Yamada96d82842016-08-01 00:16:33 +0900[diff] [blame]277
278config USB_UHCI_HCD
279 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900[diff] [blame]280 select USB_HOST
Masahiro Yamada96d82842016-08-01 00:16:33 +0900[diff] [blame]281 ---help---
282 The Universal Host Controller Interface is a standard by Intel for
283 accessing the USB hardware in the PC (which is also called the USB
284 host controller). If your USB host controller conforms to this
285 standard, you may want to say Y, but see below. All recent boards
286 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
287 i810, i820) conform to this standard. Also all VIA PCI chipsets
288 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
289 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
290 If unsure, say Y.
291
292if USB_UHCI_HCD
293
294endif # USB_UHCI_HCD
Philipp Tomsich4ac72f52017-07-03 18:30:06 +0200[diff] [blame]295
296config USB_DWC2
297 bool "DesignWare USB2 Core support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]298 depends on DM && OF_CONTROL
Philipp Tomsich4ac72f52017-07-03 18:30:06 +0200[diff] [blame]299 select USB_HOST
300 ---help---
301 The DesignWare USB 2.0 controller is compliant with the
302 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
303 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
304 operation is compliant to the controller Supplement. If you want to
305 enable this controller in host mode, say Y.
Alexey Brodkin42637fd2018-02-28 16:16:58 +0300[diff] [blame]306
307if USB_DWC2
308config USB_DWC2_BUFFER_SIZE
309 int "Data buffer size in kB"
310 default 64
311 ---help---
312 By default 64 kB buffer is used but if amount of RAM avaialble on
313 the target is not enough to accommodate allocation of buffer of
314 that size it is possible to shrink it. Smaller sizes should be fine
315 because larger transactions could be split in smaller ones.
316
317endif # USB_DWC2
Marek Vasuta3d65652019-08-11 13:23:43 +0200[diff] [blame]318
319config USB_R8A66597_HCD
320 bool "Renesas R8A66597 USB Core support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400[diff] [blame]321 depends on DM && OF_CONTROL
Marek Vasuta3d65652019-08-11 13:23:43 +0200[diff] [blame]322 select USB_HOST
323 ---help---
324 This enables support for the on-chip Renesas R8A66597 USB 2.0
325 controller, present in various RZ and SH SoCs.