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wdenk71f95112003-06-15 22:40:42 +00001/*
Jerry Huang4a6ee172010-11-25 17:06:07 +00002 * Copyright 2008,2010 Freescale Semiconductor, Inc
Andy Fleming272cc702008-10-30 16:41:01 -05003 * Andy Fleming
4 *
5 * Based (loosely) on the Linux code
wdenk71f95112003-06-15 22:40:42 +00006 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
wdenk71f95112003-06-15 22:40:42 +00008 */
9
10#ifndef _MMC_H_
11#define _MMC_H_
wdenk71f95112003-06-15 22:40:42 +000012
Andy Fleming272cc702008-10-30 16:41:01 -050013#include <linux/list.h>
Lad, Prabhakar0d986e62012-06-24 21:35:20 +000014#include <linux/compiler.h>
Mateusz Zalega07a2d422014-04-30 13:04:15 +020015#include <part.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016
Pantelis Antoniou4b7cee52015-01-23 12:12:01 +020017/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
18#define SD_VERSION_SD (1U << 31)
19#define MMC_VERSION_MMC (1U << 30)
20
21#define MAKE_SDMMC_VERSION(a, b, c) \
22 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
23#define MAKE_SD_VERSION(a, b, c) \
24 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
25#define MAKE_MMC_VERSION(a, b, c) \
26 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
27
28#define EXTRACT_SDMMC_MAJOR_VERSION(x) \
29 (((u32)(x) >> 16) & 0xff)
30#define EXTRACT_SDMMC_MINOR_VERSION(x) \
31 (((u32)(x) >> 8) & 0xff)
32#define EXTRACT_SDMMC_CHANGE_VERSION(x) \
33 ((u32)(x) & 0xff)
34
35#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
36#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
37#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
38#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
39
40#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
41#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
42#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
43#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
44#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
45#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
46#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
47#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
48#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
49#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
50#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
51#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
Andy Fleming272cc702008-10-30 16:41:01 -050052
Jaehoon Chung8caf46d2014-05-16 13:59:53 +090053#define MMC_MODE_HS (1 << 0)
54#define MMC_MODE_HS_52MHz (1 << 1)
55#define MMC_MODE_4BIT (1 << 2)
56#define MMC_MODE_8BIT (1 << 3)
57#define MMC_MODE_SPI (1 << 4)
Rob Herring5a203972015-03-23 17:56:59 -050058#define MMC_MODE_DDR_52MHz (1 << 5)
Ɓukasz Majewski62722032012-03-12 22:07:18 +000059
Andy Fleming272cc702008-10-30 16:41:01 -050060#define SD_DATA_4BIT 0x00040000
61
Pantelis Antoniou4b7cee52015-01-23 12:12:01 +020062#define IS_SD(x) ((x)->version & SD_VERSION_SD)
Andrew Gabbasov3f2da752015-03-19 07:44:02 -050063#define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
Andy Fleming272cc702008-10-30 16:41:01 -050064
65#define MMC_DATA_READ 1
66#define MMC_DATA_WRITE 2
67
68#define NO_CARD_ERR -16 /* No SD/MMC card inserted */
69#define UNUSABLE_ERR -17 /* Unusable Card */
70#define COMM_ERR -18 /* Communications Error */
71#define TIMEOUT -19
Andrew Gabbasovbd47c132015-03-19 07:44:07 -050072#define SWITCH_ERR -20 /* Card reports failure to switch mode */
Andy Fleming272cc702008-10-30 16:41:01 -050073
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020074#define MMC_CMD_GO_IDLE_STATE 0
75#define MMC_CMD_SEND_OP_COND 1
76#define MMC_CMD_ALL_SEND_CID 2
77#define MMC_CMD_SET_RELATIVE_ADDR 3
78#define MMC_CMD_SET_DSR 4
Andy Fleming272cc702008-10-30 16:41:01 -050079#define MMC_CMD_SWITCH 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020080#define MMC_CMD_SELECT_CARD 7
Andy Fleming272cc702008-10-30 16:41:01 -050081#define MMC_CMD_SEND_EXT_CSD 8
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020082#define MMC_CMD_SEND_CSD 9
83#define MMC_CMD_SEND_CID 10
Andy Fleming272cc702008-10-30 16:41:01 -050084#define MMC_CMD_STOP_TRANSMISSION 12
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020085#define MMC_CMD_SEND_STATUS 13
86#define MMC_CMD_SET_BLOCKLEN 16
87#define MMC_CMD_READ_SINGLE_BLOCK 17
88#define MMC_CMD_READ_MULTIPLE_BLOCK 18
Pierre Aubert91fdabc2014-04-24 10:30:06 +020089#define MMC_CMD_SET_BLOCK_COUNT 23
Andy Fleming272cc702008-10-30 16:41:01 -050090#define MMC_CMD_WRITE_SINGLE_BLOCK 24
91#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
Lei Wene6f99a52011-06-22 17:03:31 +000092#define MMC_CMD_ERASE_GROUP_START 35
93#define MMC_CMD_ERASE_GROUP_END 36
94#define MMC_CMD_ERASE 38
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020095#define MMC_CMD_APP_CMD 55
Thomas Choud52ebf12010-12-24 13:12:21 +000096#define MMC_CMD_SPI_READ_OCR 58
97#define MMC_CMD_SPI_CRC_ON_OFF 59
Amar3690d6d2013-04-27 11:42:58 +053098#define MMC_CMD_RES_MAN 62
99
100#define MMC_CMD62_ARG1 0xefac62ec
101#define MMC_CMD62_ARG2 0xcbaea7
102
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200103
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200104#define SD_CMD_SEND_RELATIVE_ADDR 3
Andy Fleming272cc702008-10-30 16:41:01 -0500105#define SD_CMD_SWITCH_FUNC 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200106#define SD_CMD_SEND_IF_COND 8
Otavio Salvadorf022d362015-02-17 10:42:43 -0200107#define SD_CMD_SWITCH_UHS18V 11
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200108
109#define SD_CMD_APP_SET_BUS_WIDTH 6
Lei Wene6f99a52011-06-22 17:03:31 +0000110#define SD_CMD_ERASE_WR_BLK_START 32
111#define SD_CMD_ERASE_WR_BLK_END 33
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200112#define SD_CMD_APP_SEND_OP_COND 41
Andy Fleming272cc702008-10-30 16:41:01 -0500113#define SD_CMD_APP_SEND_SCR 51
114
115/* SCR definitions in different words */
116#define SD_HIGHSPEED_BUSY 0x00020000
117#define SD_HIGHSPEED_SUPPORTED 0x00020000
118
Thomas Chouabe2c932011-04-19 03:48:31 +0000119#define OCR_BUSY 0x80000000
120#define OCR_HCS 0x40000000
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000121#define OCR_VOLTAGE_MASK 0x007FFF80
122#define OCR_ACCESS_MODE 0x60000000
Andy Fleming272cc702008-10-30 16:41:01 -0500123
Eric Nelson1aa2d072015-12-07 07:50:01 -0700124#define MMC_ERASE_ARG 0x00000000
125#define MMC_SECURE_ERASE_ARG 0x80000000
126#define MMC_TRIM_ARG 0x00000001
127#define MMC_DISCARD_ARG 0x00000003
128#define MMC_SECURE_TRIM1_ARG 0x80000001
129#define MMC_SECURE_TRIM2_ARG 0x80008000
Lei Wene6f99a52011-06-22 17:03:31 +0000130
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000131#define MMC_STATUS_MASK (~0x0206BF7F)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500132#define MMC_STATUS_SWITCH_ERROR (1 << 7)
Thomas Chouabe2c932011-04-19 03:48:31 +0000133#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
134#define MMC_STATUS_CURR_STATE (0xf << 9)
Thomas Choued018b22011-04-19 03:48:32 +0000135#define MMC_STATUS_ERROR (1 << 19)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000136
Jan Kloetzked617c422012-02-05 22:29:12 +0000137#define MMC_STATE_PRG (7 << 9)
138
Andy Fleming272cc702008-10-30 16:41:01 -0500139#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
140#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
141#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
142#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
143#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
144#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
145#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
146#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
147#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
148#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
149#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
150#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
151#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
152#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
153#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
154#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
155#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
156
157#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
158#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
159 addressed by index which are
160 1 in value field */
161#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
162 addressed by index, which are
163 1 in value field */
164#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
165
166#define SD_SWITCH_CHECK 0
167#define SD_SWITCH_SWITCH 1
168
169/*
170 * EXT_CSD fields
171 */
Diego Santa Cruza7f852b2014-12-23 10:50:22 +0100172#define EXT_CSD_ENH_START_ADDR 136 /* R/W */
173#define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
Stephen Warrenf866a462013-06-11 15:14:01 -0600174#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
Markus Niebeld7b29122014-11-18 15:11:42 +0100175#define EXT_CSD_PARTITION_SETTING 155 /* R/W */
Oliver Metz1937e5a2013-10-01 20:32:07 +0200176#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100177#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
Lei Wen0560db12011-10-03 20:35:10 +0000178#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
Tom Rini33ace362014-02-07 14:15:20 -0500179#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100180#define EXT_CSD_WR_REL_PARAM 166 /* R */
181#define EXT_CSD_WR_REL_SET 167 /* R/W */
Stephen Warrenf866a462013-06-11 15:14:01 -0600182#define EXT_CSD_RPMB_MULT 168 /* RO */
Lei Wen0560db12011-10-03 20:35:10 +0000183#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
Amar3690d6d2013-04-27 11:42:58 +0530184#define EXT_CSD_BOOT_BUS_WIDTH 177
Lei Wen0560db12011-10-03 20:35:10 +0000185#define EXT_CSD_PART_CONF 179 /* R/W */
186#define EXT_CSD_BUS_WIDTH 183 /* R/W */
187#define EXT_CSD_HS_TIMING 185 /* R/W */
188#define EXT_CSD_REV 192 /* RO */
189#define EXT_CSD_CARD_TYPE 196 /* RO */
190#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
Stephen Warrenf866a462013-06-11 15:14:01 -0600191#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
Lei Wen0560db12011-10-03 20:35:10 +0000192#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
Stephen Warren8948ea82012-07-30 10:55:43 +0000193#define EXT_CSD_BOOT_MULT 226 /* RO */
Andy Fleming272cc702008-10-30 16:41:01 -0500194
195/*
196 * EXT_CSD field definitions
197 */
198
Thomas Chouabe2c932011-04-19 03:48:31 +0000199#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
200#define EXT_CSD_CMD_SET_SECURE (1 << 1)
201#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
Andy Fleming272cc702008-10-30 16:41:01 -0500202
Thomas Chouabe2c932011-04-19 03:48:31 +0000203#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
204#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900205#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
206#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
207#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
208 | EXT_CSD_CARD_TYPE_DDR_1_2V)
Andy Fleming272cc702008-10-30 16:41:01 -0500209
210#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
211#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
212#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900213#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
214#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200215
Amar3690d6d2013-04-27 11:42:58 +0530216#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
217#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
218#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
219#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
220
221#define EXT_CSD_BOOT_ACK(x) (x << 6)
222#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
223#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
224
Tom Rini5a99b9d2014-02-05 10:24:22 -0500225#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
226#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
227#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
Amar3690d6d2013-04-27 11:42:58 +0530228
Markus Niebeld7b29122014-11-18 15:11:42 +0100229#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
230
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100231#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
232#define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
233
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100234#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
235
236#define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
237#define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
238
Andy Fleming1de97f92008-10-30 16:31:39 -0500239#define R1_ILLEGAL_COMMAND (1 << 22)
240#define R1_APP_CMD (1 << 5)
241
Andy Fleming272cc702008-10-30 16:41:01 -0500242#define MMC_RSP_PRESENT (1 << 0)
Thomas Chouabe2c932011-04-19 03:48:31 +0000243#define MMC_RSP_136 (1 << 1) /* 136 bit response */
244#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
245#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
246#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
Andy Fleming272cc702008-10-30 16:41:01 -0500247
Thomas Chouabe2c932011-04-19 03:48:31 +0000248#define MMC_RSP_NONE (0)
249#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500250#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
251 MMC_RSP_BUSY)
Thomas Chouabe2c932011-04-19 03:48:31 +0000252#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
253#define MMC_RSP_R3 (MMC_RSP_PRESENT)
254#define MMC_RSP_R4 (MMC_RSP_PRESENT)
255#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
256#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
257#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500258
Lei Wenbc897b12011-05-02 16:26:26 +0000259#define MMCPART_NOAVAILABLE (0xff)
260#define PART_ACCESS_MASK (0x7)
261#define PART_SUPPORT (0x1)
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100262#define ENHNCD_SUPPORT (0x2)
Oliver Metz1937e5a2013-10-01 20:32:07 +0200263#define PART_ENH_ATTRIB (0x1f)
wdenk71f95112003-06-15 22:40:42 +0000264
Simon Glass8bfa1952013-04-03 08:54:30 +0000265/* Maximum block size for MMC */
266#define MMC_MAX_BLOCK_LEN 512
267
Amar3690d6d2013-04-27 11:42:58 +0530268/* The number of MMC physical partitions. These consist of:
269 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
270 */
271#define MMC_NUM_BOOT_PARTITION 2
Pierre Aubert91fdabc2014-04-24 10:30:06 +0200272#define MMC_PART_RPMB 3 /* RPMB partition number */
Amar3690d6d2013-04-27 11:42:58 +0530273
Simon Glasse7ecf7c2015-06-23 15:38:48 -0600274/* Driver model support */
275
276/**
277 * struct mmc_uclass_priv - Holds information about a device used by the uclass
278 */
279struct mmc_uclass_priv {
280 struct mmc *mmc;
281};
282
283/**
284 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
285 *
286 * Provided that the device is already probed and ready for use, this value
287 * will be available.
288 *
289 * @dev: Device
290 * @return associated mmc struct pointer if available, else NULL
291 */
292struct mmc *mmc_get_mmc_dev(struct udevice *dev);
293
294/* End of driver model support */
295
Andy Fleming1de97f92008-10-30 16:31:39 -0500296struct mmc_cid {
297 unsigned long psn;
298 unsigned short oid;
299 unsigned char mid;
300 unsigned char prv;
301 unsigned char mdt;
302 char pnm[7];
303};
304
Andy Fleming272cc702008-10-30 16:41:01 -0500305struct mmc_cmd {
306 ushort cmdidx;
307 uint resp_type;
308 uint cmdarg;
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530309 uint response[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500310};
311
312struct mmc_data {
313 union {
314 char *dest;
315 const char *src; /* src buffers don't get written to */
316 };
317 uint flags;
318 uint blocks;
319 uint blocksize;
320};
321
Pantelis Antoniouab769f22014-02-26 19:28:45 +0200322/* forward decl. */
323struct mmc;
324
325struct mmc_ops {
326 int (*send_cmd)(struct mmc *mmc,
327 struct mmc_cmd *cmd, struct mmc_data *data);
328 void (*set_ios)(struct mmc *mmc);
329 int (*init)(struct mmc *mmc);
330 int (*getcd)(struct mmc *mmc);
331 int (*getwp)(struct mmc *mmc);
332};
333
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200334struct mmc_config {
335 const char *name;
336 const struct mmc_ops *ops;
337 uint host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -0500338 uint voltages;
Andy Fleming272cc702008-10-30 16:41:01 -0500339 uint f_min;
340 uint f_max;
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200341 uint b_max;
342 unsigned char part_type;
343};
344
345/* TODO struct mmc should be in mmc_private but it's hard to fix right now */
346struct mmc {
347 struct list_head link;
348 const struct mmc_config *cfg; /* provided configuration */
349 uint version;
350 void *priv;
351 uint has_init;
Andy Fleming272cc702008-10-30 16:41:01 -0500352 int high_capacity;
353 uint bus_width;
354 uint clock;
355 uint card_caps;
Andy Fleming272cc702008-10-30 16:41:01 -0500356 uint ocr;
Markus Niebelab711882013-12-16 13:40:46 +0100357 uint dsr;
358 uint dsr_imp;
Andy Fleming272cc702008-10-30 16:41:01 -0500359 uint scr[2];
360 uint csd[4];
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530361 uint cid[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500362 ushort rca;
Diego Santa Cruzc3dbb4f2014-12-23 10:50:17 +0100363 u8 part_support;
364 u8 part_attr;
Diego Santa Cruz9e41a002014-12-23 10:50:33 +0100365 u8 wr_rel_set;
Lei Wenbc897b12011-05-02 16:26:26 +0000366 char part_config;
Andy Fleming272cc702008-10-30 16:41:01 -0500367 uint tran_speed;
368 uint read_bl_len;
369 uint write_bl_len;
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +0100370 uint erase_grp_size; /* in 512-byte sectors */
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +0100371 uint hc_wp_grp_size; /* in 512-byte sectors */
Andy Fleming272cc702008-10-30 16:41:01 -0500372 u64 capacity;
Stephen Warrenf866a462013-06-11 15:14:01 -0600373 u64 capacity_user;
374 u64 capacity_boot;
375 u64 capacity_rpmb;
376 u64 capacity_gp[4];
Diego Santa Cruza7f852b2014-12-23 10:50:22 +0100377 u64 enh_user_start;
378 u64 enh_user_size;
Andy Fleming272cc702008-10-30 16:41:01 -0500379 block_dev_desc_t block_dev;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000380 char op_cond_pending; /* 1 if we are waiting on an op_cond command */
381 char init_in_progress; /* 1 if we have done mmc_start_init() */
382 char preinit; /* start init as early as possible */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600383 int ddr_mode;
Andy Fleming272cc702008-10-30 16:41:01 -0500384};
385
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100386struct mmc_hwpart_conf {
387 struct {
388 uint enh_start; /* in 512-byte sectors */
389 uint enh_size; /* in 512-byte sectors, if 0 no enh area */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100390 unsigned wr_rel_change : 1;
391 unsigned wr_rel_set : 1;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100392 } user;
393 struct {
394 uint size; /* in 512-byte sectors */
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100395 unsigned enhanced : 1;
396 unsigned wr_rel_change : 1;
397 unsigned wr_rel_set : 1;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100398 } gp_part[4];
399};
400
401enum mmc_hwpart_conf_mode {
402 MMC_HWPART_CONF_CHECK,
403 MMC_HWPART_CONF_SET,
404 MMC_HWPART_CONF_COMPLETE,
405};
406
Andy Fleming272cc702008-10-30 16:41:01 -0500407int mmc_register(struct mmc *mmc);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200408struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
409void mmc_destroy(struct mmc *mmc);
Andy Fleming272cc702008-10-30 16:41:01 -0500410int mmc_initialize(bd_t *bis);
411int mmc_init(struct mmc *mmc);
412int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
Jerry Huang4a6ee172010-11-25 17:06:07 +0000413void mmc_set_clock(struct mmc *mmc, uint clock);
Andy Fleming272cc702008-10-30 16:41:01 -0500414struct mmc *find_mmc_device(int dev_num);
Steve Sakoman89716962010-07-01 12:12:42 -0700415int mmc_set_dev(int dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500416void print_mmc_devices(char separator);
Lei Wenea6ebe22011-05-02 16:26:25 +0000417int get_mmc_num(void);
Lei Wenbc897b12011-05-02 16:26:26 +0000418int mmc_switch_part(int dev_num, unsigned int part_num);
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100419int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
420 enum mmc_hwpart_conf_mode mode);
Thierry Reding48972d92012-01-02 01:15:37 +0000421int mmc_getcd(struct mmc *mmc);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200422int board_mmc_getcd(struct mmc *mmc);
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +0000423int mmc_getwp(struct mmc *mmc);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200424int board_mmc_getwp(struct mmc *mmc);
Markus Niebelab711882013-12-16 13:40:46 +0100425int mmc_set_dsr(struct mmc *mmc, u16 val);
Amar3690d6d2013-04-27 11:42:58 +0530426/* Function to change the size of boot partition and rpmb partitions */
427int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
428 unsigned long rpmbsize);
Tom Rini792970b2014-02-05 10:24:21 -0500429/* Function to modify the PARTITION_CONFIG field of EXT_CSD */
430int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
Tom Rini5a99b9d2014-02-05 10:24:22 -0500431/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
432int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
Tom Rini33ace362014-02-07 14:15:20 -0500433/* Function to modify the RST_n_FUNCTION field of EXT_CSD */
434int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
Pierre Aubert91fdabc2014-04-24 10:30:06 +0200435/* Functions to read / write the RPMB partition */
436int mmc_rpmb_set_key(struct mmc *mmc, void *key);
437int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
438int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
439 unsigned short cnt, unsigned char *key);
440int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
441 unsigned short cnt, unsigned char *key);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000442/**
443 * Start device initialization and return immediately; it does not block on
444 * polling OCR (operation condition register) status. Then you should call
445 * mmc_init, which would block on polling OCR status and complete the device
446 * initializatin.
447 *
448 * @param mmc Pointer to a MMC device struct
449 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
450 */
451int mmc_start_init(struct mmc *mmc);
452
453/**
454 * Set preinit flag of mmc device.
455 *
456 * This will cause the device to be pre-inited during mmc_initialize(),
457 * which may save boot time if the device is not accessed until later.
458 * Some eMMC devices take 200-300ms to init, but unfortunately they
459 * must be sent a series of commands to even get them to start preparing
460 * for operation.
461 *
462 * @param mmc Pointer to a MMC device struct
463 * @param preinit preinit flag value
464 */
465void mmc_set_preinit(struct mmc *mmc, int preinit);
466
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200467#ifdef CONFIG_GENERIC_MMC
Paul Burton8687d5c2013-09-04 16:12:26 +0100468#ifdef CONFIG_MMC_SPI
Tom Rini0b2da7e2014-03-28 16:55:29 -0400469#define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
Paul Burton8687d5c2013-09-04 16:12:26 +0100470#else
471#define mmc_host_is_spi(mmc) 0
472#endif
Thomas Choud52ebf12010-12-24 13:12:21 +0000473struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200474#else
Andy Fleming272cc702008-10-30 16:41:01 -0500475int mmc_legacy_init(int verbose);
476#endif
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200477
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +0100478void board_mmc_power_init(void);
Fabio Estevam3c7ca962014-02-15 14:51:59 -0200479int board_mmc_init(bd_t *bis);
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200480int cpu_mmc_init(bd_t *bis);
Jeroen Hofsteeaeb80552014-10-08 22:58:05 +0200481int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
Clemens Gruberaa844fe2016-01-26 16:20:38 +0100482int mmc_get_env_dev(void);
Fabio Estevam3c7ca962014-02-15 14:51:59 -0200483
Simon Glass91785f72015-01-27 22:13:39 -0700484struct pci_device_id;
485
486/**
487 * pci_mmc_init() - set up PCI MMC devices
488 *
489 * This finds all the matching PCI IDs and sets them up as MMC devices.
490 *
491 * @name: Name to use for devices
Simon Glass4abe8e42015-11-29 13:18:08 -0700492 * @mmc_supported: PCI IDs to search for, terminated by {0, 0}
Simon Glass91785f72015-01-27 22:13:39 -0700493 */
Simon Glass4abe8e42015-11-29 13:18:08 -0700494int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
Simon Glass91785f72015-01-27 22:13:39 -0700495
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200496/* Set block count limit because of 16 bit register limit on some hardware*/
497#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
498#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
499#endif
500
wdenk71f95112003-06-15 22:40:42 +0000501#endif /* _MMC_H_ */