Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> |
| 5 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <asm/arch/clock.h> |
| 10 | #include <asm/arch/iomux.h> |
| 11 | #include <asm/arch/imx-regs.h> |
| 12 | #include <asm/arch/mx6-pins.h> |
| 13 | #include <asm/arch/sys_proto.h> |
| 14 | #include <asm/gpio.h> |
| 15 | #include <asm/imx-common/iomux-v3.h> |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 16 | #include <asm/imx-common/mxc_i2c.h> |
Eric Nelson | 3acb011 | 2014-09-30 15:40:03 -0700 | [diff] [blame] | 17 | #include <asm/imx-common/spi.h> |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 18 | #include <asm/io.h> |
Alexey Brodkin | 1ace402 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 19 | #include <linux/sizes.h> |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 20 | #include <common.h> |
| 21 | #include <fsl_esdhc.h> |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 22 | #include <i2c.h> |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 23 | #include <mmc.h> |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 24 | #include <netdev.h> |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 25 | #include <power/pmic.h> |
| 26 | #include <power/pfuze100_pmic.h> |
| 27 | #include "../common/pfuze.h" |
Peng Fan | 3b9c1a5 | 2014-11-10 08:50:41 +0800 | [diff] [blame] | 28 | #include <usb.h> |
| 29 | #include <usb/ehci-fsl.h> |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 30 | |
| 31 | DECLARE_GLOBAL_DATA_PTR; |
| 32 | |
Benoît Thébaudeau | 7e2173c | 2013-04-26 01:34:47 +0000 | [diff] [blame] | 33 | #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 34 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ |
| 35 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 36 | |
Benoît Thébaudeau | 7e2173c | 2013-04-26 01:34:47 +0000 | [diff] [blame] | 37 | #define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \ |
| 38 | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ |
| 39 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 40 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 41 | #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 42 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 43 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 44 | |
Fabio Estevam | 694c3bc | 2014-04-11 08:39:43 -0300 | [diff] [blame] | 45 | #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ |
| 46 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) |
| 47 | |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 48 | #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 49 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 50 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ |
| 51 | PAD_CTL_ODE | PAD_CTL_SRE_FAST) |
| 52 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 53 | #define ETH_PHY_RESET IMX_GPIO_NR(4, 21) |
| 54 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 55 | int dram_init(void) |
| 56 | { |
| 57 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | static iomux_v3_cfg_t const uart1_pads[] = { |
| 63 | MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 64 | MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 65 | }; |
| 66 | |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 67 | static iomux_v3_cfg_t const usdhc1_pads[] = { |
| 68 | /* 8 bit SD */ |
| 69 | MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 70 | MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 71 | MX6_PAD_SD1_DAT0__USDHC1_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 72 | MX6_PAD_SD1_DAT1__USDHC1_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 73 | MX6_PAD_SD1_DAT2__USDHC1_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 74 | MX6_PAD_SD1_DAT3__USDHC1_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 75 | MX6_PAD_SD1_DAT4__USDHC1_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 76 | MX6_PAD_SD1_DAT5__USDHC1_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 77 | MX6_PAD_SD1_DAT6__USDHC1_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 78 | MX6_PAD_SD1_DAT7__USDHC1_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 79 | |
| 80 | /*CD pin*/ |
| 81 | MX6_PAD_KEY_ROW7__GPIO_4_7 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 82 | }; |
| 83 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 84 | static iomux_v3_cfg_t const usdhc2_pads[] = { |
| 85 | MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 86 | MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 87 | MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 88 | MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 89 | MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 90 | MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 91 | |
| 92 | /*CD pin*/ |
| 93 | MX6_PAD_SD2_DAT7__GPIO_5_0 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 94 | }; |
| 95 | |
| 96 | static iomux_v3_cfg_t const usdhc3_pads[] = { |
| 97 | MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 98 | MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 99 | MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 100 | MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 101 | MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 102 | MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 103 | |
| 104 | /*CD pin*/ |
| 105 | MX6_PAD_REF_CLK_32K__GPIO_3_22 | MUX_PAD_CTRL(NO_PAD_CTRL), |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 106 | }; |
| 107 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 108 | static iomux_v3_cfg_t const fec_pads[] = { |
| 109 | MX6_PAD_FEC_MDC__FEC_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 110 | MX6_PAD_FEC_MDIO__FEC_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 111 | MX6_PAD_FEC_CRS_DV__FEC_RX_DV | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 112 | MX6_PAD_FEC_RXD0__FEC_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 113 | MX6_PAD_FEC_RXD1__FEC_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 114 | MX6_PAD_FEC_TX_EN__FEC_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 115 | MX6_PAD_FEC_TXD0__FEC_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 116 | MX6_PAD_FEC_TXD1__FEC_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 117 | MX6_PAD_FEC_REF_CLK__FEC_REF_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 118 | MX6_PAD_FEC_RX_ER__GPIO_4_19 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 119 | MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 120 | }; |
| 121 | |
Fabio Estevam | 694c3bc | 2014-04-11 08:39:43 -0300 | [diff] [blame] | 122 | #ifdef CONFIG_MXC_SPI |
| 123 | static iomux_v3_cfg_t ecspi1_pads[] = { |
| 124 | MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 125 | MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 126 | MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 127 | MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 128 | }; |
| 129 | |
Nikita Kiryanov | 155fa9a | 2014-08-20 15:08:50 +0300 | [diff] [blame] | 130 | int board_spi_cs_gpio(unsigned bus, unsigned cs) |
| 131 | { |
| 132 | return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 11)) : -1; |
| 133 | } |
| 134 | |
Fabio Estevam | 694c3bc | 2014-04-11 08:39:43 -0300 | [diff] [blame] | 135 | static void setup_spi(void) |
| 136 | { |
| 137 | imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); |
| 138 | } |
| 139 | #endif |
| 140 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 141 | static void setup_iomux_uart(void) |
| 142 | { |
| 143 | imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
| 144 | } |
| 145 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 146 | static void setup_iomux_fec(void) |
| 147 | { |
| 148 | imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); |
| 149 | |
| 150 | /* Reset LAN8720 PHY */ |
| 151 | gpio_direction_output(ETH_PHY_RESET , 0); |
| 152 | udelay(1000); |
| 153 | gpio_set_value(ETH_PHY_RESET, 1); |
| 154 | } |
| 155 | |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 156 | #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7) |
| 157 | #define USDHC2_CD_GPIO IMX_GPIO_NR(5, 0) |
| 158 | #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 22) |
| 159 | |
| 160 | static struct fsl_esdhc_cfg usdhc_cfg[3] = { |
| 161 | {USDHC1_BASE_ADDR}, |
| 162 | {USDHC2_BASE_ADDR, 0, 4}, |
| 163 | {USDHC3_BASE_ADDR, 0, 4}, |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 164 | }; |
| 165 | |
| 166 | int board_mmc_getcd(struct mmc *mmc) |
| 167 | { |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 168 | struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; |
| 169 | int ret = 0; |
| 170 | |
| 171 | switch (cfg->esdhc_base) { |
| 172 | case USDHC1_BASE_ADDR: |
| 173 | ret = !gpio_get_value(USDHC1_CD_GPIO); |
| 174 | break; |
| 175 | case USDHC2_BASE_ADDR: |
| 176 | ret = !gpio_get_value(USDHC2_CD_GPIO); |
| 177 | break; |
| 178 | case USDHC3_BASE_ADDR: |
| 179 | ret = !gpio_get_value(USDHC3_CD_GPIO); |
| 180 | break; |
| 181 | } |
| 182 | |
| 183 | return ret; |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | int board_mmc_init(bd_t *bis) |
| 187 | { |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 188 | int i, ret; |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 189 | |
Ye.Li | 36255d6 | 2014-10-30 18:30:54 +0800 | [diff] [blame] | 190 | /* |
| 191 | * According to the board_mmc_init() the following map is done: |
| 192 | * (U-boot device node) (Physical Port) |
| 193 | * mmc0 USDHC1 |
| 194 | * mmc1 USDHC2 |
| 195 | * mmc2 USDHC3 |
| 196 | */ |
| 197 | for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { |
| 198 | switch (i) { |
| 199 | case 0: |
| 200 | imx_iomux_v3_setup_multiple_pads( |
| 201 | usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); |
| 202 | gpio_direction_input(USDHC1_CD_GPIO); |
| 203 | usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); |
| 204 | break; |
| 205 | case 1: |
| 206 | imx_iomux_v3_setup_multiple_pads( |
| 207 | usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); |
| 208 | gpio_direction_input(USDHC2_CD_GPIO); |
| 209 | usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
| 210 | break; |
| 211 | case 2: |
| 212 | imx_iomux_v3_setup_multiple_pads( |
| 213 | usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); |
| 214 | gpio_direction_input(USDHC3_CD_GPIO); |
| 215 | usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
| 216 | break; |
| 217 | default: |
| 218 | printf("Warning: you configured more USDHC controllers" |
| 219 | "(%d) than supported by the board\n", i + 1); |
| 220 | return -EINVAL; |
| 221 | } |
| 222 | |
| 223 | ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); |
| 224 | if (ret) { |
| 225 | printf("Warning: failed to initialize " |
| 226 | "mmc dev %d\n", i); |
| 227 | return ret; |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | return 0; |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 232 | } |
| 233 | |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 234 | #ifdef CONFIG_SYS_I2C_MXC |
| 235 | #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) |
| 236 | /* I2C1 for PMIC */ |
| 237 | struct i2c_pads_info i2c_pad_info1 = { |
| 238 | .sda = { |
| 239 | .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC, |
| 240 | .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC, |
| 241 | .gp = IMX_GPIO_NR(3, 13), |
| 242 | }, |
| 243 | .scl = { |
| 244 | .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC, |
| 245 | .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC, |
| 246 | .gp = IMX_GPIO_NR(3, 12), |
| 247 | }, |
| 248 | }; |
| 249 | |
| 250 | int power_init_board(void) |
| 251 | { |
| 252 | struct pmic *p; |
| 253 | |
| 254 | p = pfuze_common_init(I2C_PMIC); |
| 255 | if (!p) |
| 256 | return -ENODEV; |
| 257 | |
| 258 | return pfuze_mode_init(p, APS_PFM); |
| 259 | } |
| 260 | #endif |
| 261 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 262 | #ifdef CONFIG_FEC_MXC |
| 263 | int board_eth_init(bd_t *bis) |
| 264 | { |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 265 | setup_iomux_fec(); |
| 266 | |
Fabio Estevam | 12c20c0 | 2014-01-04 17:36:33 -0200 | [diff] [blame] | 267 | return cpu_eth_init(bis); |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | static int setup_fec(void) |
| 271 | { |
Fabio Estevam | 0a11d6f | 2014-07-09 17:59:54 -0300 | [diff] [blame] | 272 | struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 273 | |
| 274 | /* clear gpr1[14], gpr1[18:17] to select anatop clock */ |
| 275 | clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); |
| 276 | |
Stefan Roese | 7731745 | 2014-11-27 13:46:43 +0100 | [diff] [blame] | 277 | return enable_fec_anatop_clock(ENET_50MHZ); |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 278 | } |
| 279 | #endif |
| 280 | |
Peng Fan | 3b9c1a5 | 2014-11-10 08:50:41 +0800 | [diff] [blame] | 281 | #ifdef CONFIG_USB_EHCI_MX6 |
| 282 | #define USB_OTHERREGS_OFFSET 0x800 |
| 283 | #define UCTRL_PWR_POL (1 << 9) |
| 284 | |
| 285 | static iomux_v3_cfg_t const usb_otg_pads[] = { |
| 286 | /* OTG1 */ |
| 287 | MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 288 | MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 289 | /* OTG2 */ |
| 290 | MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL) |
| 291 | }; |
| 292 | |
| 293 | static void setup_usb(void) |
| 294 | { |
| 295 | imx_iomux_v3_setup_multiple_pads(usb_otg_pads, |
| 296 | ARRAY_SIZE(usb_otg_pads)); |
| 297 | } |
| 298 | |
| 299 | int board_usb_phy_mode(int port) |
| 300 | { |
| 301 | if (port == 1) |
| 302 | return USB_INIT_HOST; |
| 303 | else |
| 304 | return usb_phy_mode(port); |
| 305 | } |
| 306 | |
| 307 | int board_ehci_hcd_init(int port) |
| 308 | { |
| 309 | u32 *usbnc_usb_ctrl; |
| 310 | |
| 311 | if (port > 1) |
| 312 | return -EINVAL; |
| 313 | |
| 314 | usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + |
| 315 | port * 4); |
| 316 | |
| 317 | /* Set Power polarity */ |
| 318 | setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); |
| 319 | |
| 320 | return 0; |
| 321 | } |
| 322 | #endif |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 323 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 324 | int board_early_init_f(void) |
| 325 | { |
| 326 | setup_iomux_uart(); |
Fabio Estevam | 694c3bc | 2014-04-11 08:39:43 -0300 | [diff] [blame] | 327 | #ifdef CONFIG_MXC_SPI |
| 328 | setup_spi(); |
| 329 | #endif |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | int board_init(void) |
| 334 | { |
| 335 | /* address of boot parameters */ |
| 336 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| 337 | |
Peng Fan | af38bf6 | 2015-02-12 09:36:29 +0800 | [diff] [blame^] | 338 | #ifdef CONFIG_SYS_I2C_MXC |
| 339 | setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); |
| 340 | #endif |
| 341 | |
Fabio Estevam | 31f0796 | 2013-09-13 00:36:28 -0300 | [diff] [blame] | 342 | #ifdef CONFIG_FEC_MXC |
| 343 | setup_fec(); |
| 344 | #endif |
Peng Fan | 3b9c1a5 | 2014-11-10 08:50:41 +0800 | [diff] [blame] | 345 | |
| 346 | #ifdef CONFIG_USB_EHCI_MX6 |
| 347 | setup_usb(); |
| 348 | #endif |
| 349 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 350 | return 0; |
| 351 | } |
| 352 | |
Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame] | 353 | int checkboard(void) |
| 354 | { |
| 355 | puts("Board: MX6SLEVK\n"); |
| 356 | |
| 357 | return 0; |
| 358 | } |