Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 3 | config ROCKCHIP_PX30 |
| 4 | bool "Support Rockchip PX30" |
| 5 | select ARM64 |
| 6 | select SUPPORT_SPL |
| 7 | select SUPPORT_TPL |
| 8 | select SPL |
| 9 | select TPL |
| 10 | select TPL_TINY_FRAMEWORK if TPL |
| 11 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 12 | select TPL_NEEDS_SEPARATE_STACK if TPL |
| 13 | imply SPL_SEPARATE_BSS |
| 14 | select SPL_SERIAL_SUPPORT |
| 15 | select TPL_SERIAL_SUPPORT |
| 16 | select DEBUG_UART_BOARD_INIT |
| 17 | imply ROCKCHIP_COMMON_BOARD |
| 18 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 19 | help |
| 20 | The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 |
| 21 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 22 | and video codec support. Peripherals include Gigabit Ethernet, |
| 23 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 24 | |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 25 | config ROCKCHIP_RK3036 |
| 26 | bool "Support Rockchip RK3036" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 27 | select CPU_V7A |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 28 | select SUPPORT_SPL |
| 29 | select SPL |
Eddie Cai | 451dcf5 | 2018-01-17 09:51:41 +0800 | [diff] [blame] | 30 | imply USB_FUNCTION_ROCKUSB |
| 31 | imply CMD_ROCKUSB |
Kever Yang | c0c2a2e | 2019-07-22 20:02:04 +0800 | [diff] [blame] | 32 | imply ROCKCHIP_COMMON_BOARD |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 33 | help |
| 34 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 35 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 36 | and video codec support. Peripherals include Gigabit Ethernet, |
| 37 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 38 | |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 39 | config ROCKCHIP_RK3128 |
| 40 | bool "Support Rockchip RK3128" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 41 | select CPU_V7A |
Kever Yang | 7e719d9 | 2019-07-22 20:02:05 +0800 | [diff] [blame] | 42 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 43 | help |
| 44 | The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 |
| 45 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 46 | and video codec support. Peripherals include Gigabit Ethernet, |
| 47 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 48 | |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 49 | config ROCKCHIP_RK3188 |
| 50 | bool "Support Rockchip RK3188" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 51 | select CPU_V7A |
Ley Foon Tan | 0680f1b | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 52 | select SPL_BOARD_INIT if SPL |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 53 | select SUPPORT_SPL |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 54 | select SPL |
Philipp Tomsich | 4bbb05b | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 55 | select SPL_CLK |
Philipp Tomsich | 4bbb05b | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 56 | select SPL_REGMAP |
| 57 | select SPL_SYSCON |
| 58 | select SPL_RAM |
| 59 | select SPL_DRIVERS_MISC_SUPPORT |
Philipp Tomsich | 4d9253f | 2017-10-10 16:21:15 +0200 | [diff] [blame] | 60 | select SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 61 | select SPL_ROCKCHIP_BACK_TO_BROM |
Heiko Stübner | 008a610 | 2017-04-06 00:19:36 +0200 | [diff] [blame] | 62 | select BOARD_LATE_INIT |
Kever Yang | a97b65a | 2019-07-22 20:02:09 +0800 | [diff] [blame] | 63 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 4eb5063 | 2019-07-22 19:59:18 +0800 | [diff] [blame] | 64 | imply SPL_ROCKCHIP_COMMON_BOARD |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 65 | help |
| 66 | The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 |
| 67 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two |
| 68 | video interfaces, several memory options and video codec support. |
| 69 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, |
| 70 | UART, SPI, I2C and PWMs. |
| 71 | |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 72 | config ROCKCHIP_RK322X |
| 73 | bool "Support Rockchip RK3228/RK3229" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 74 | select CPU_V7A |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 75 | select SUPPORT_SPL |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 76 | select SUPPORT_TPL |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 77 | select SPL |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 78 | select SPL_DM |
| 79 | select SPL_OF_LIBFDT |
| 80 | select TPL |
| 81 | select TPL_DM |
| 82 | select TPL_OF_LIBFDT |
| 83 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 84 | select TPL_NEEDS_SEPARATE_STACK if TPL |
| 85 | select SPL_DRIVERS_MISC_SUPPORT |
Kever Yang | cca3b09 | 2019-07-22 20:02:07 +0800 | [diff] [blame] | 86 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 87 | imply SPL_SERIAL_SUPPORT |
Kever Yang | 0cd65e4 | 2019-07-22 19:59:20 +0800 | [diff] [blame] | 88 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 89 | imply TPL_SERIAL_SUPPORT |
Kever Yang | 6ae28a3 | 2019-07-09 22:05:56 +0800 | [diff] [blame] | 90 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 91 | select TPL_LIBCOMMON_SUPPORT |
| 92 | select TPL_LIBGENERIC_SUPPORT |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 93 | help |
| 94 | The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 |
| 95 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 96 | and video codec support. Peripherals include Gigabit Ethernet, |
| 97 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 98 | |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 99 | config ROCKCHIP_RK3288 |
| 100 | bool "Support Rockchip RK3288" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 101 | select CPU_V7A |
Jagan Teki | eab5c50 | 2020-07-21 12:16:38 +0530 | [diff] [blame] | 102 | select OF_BOARD_SETUP |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 103 | select SUPPORT_SPL |
| 104 | select SPL |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 105 | select SUPPORT_TPL |
Jagan Teki | 3807017 | 2020-01-23 19:42:19 +0530 | [diff] [blame] | 106 | imply PRE_CONSOLE_BUFFER |
Kever Yang | de57a9f | 2019-07-22 20:02:15 +0800 | [diff] [blame] | 107 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 60b13c8 | 2019-07-22 19:59:27 +0800 | [diff] [blame] | 108 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 109 | imply TPL_CLK |
| 110 | imply TPL_DM |
| 111 | imply TPL_DRIVERS_MISC_SUPPORT |
| 112 | imply TPL_LIBCOMMON_SUPPORT |
| 113 | imply TPL_LIBGENERIC_SUPPORT |
| 114 | imply TPL_NEEDS_SEPARATE_TEXT_BASE |
Kever Yang | 4529084 | 2019-07-02 11:43:06 +0800 | [diff] [blame] | 115 | imply TPL_NEEDS_SEPARATE_STACK |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 116 | imply TPL_OF_CONTROL |
| 117 | imply TPL_OF_PLATDATA |
| 118 | imply TPL_RAM |
| 119 | imply TPL_REGMAP |
Kever Yang | 3338f54 | 2019-07-09 22:05:57 +0800 | [diff] [blame] | 120 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 121 | imply TPL_SERIAL_SUPPORT |
| 122 | imply TPL_SYSCON |
Eddie Cai | c3d098e | 2017-12-15 08:17:13 +0800 | [diff] [blame] | 123 | imply USB_FUNCTION_ROCKUSB |
| 124 | imply CMD_ROCKUSB |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 125 | help |
| 126 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 127 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 128 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 129 | and video codec support. Peripherals include Gigabit Ethernet, |
Andreas Färber | ef904bf | 2016-11-02 18:03:01 +0100 | [diff] [blame] | 130 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 131 | |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 132 | config ROCKCHIP_RK3308 |
| 133 | bool "Support Rockchip RK3308" |
| 134 | select ARM64 |
| 135 | select DEBUG_UART_BOARD_INIT |
| 136 | select SUPPORT_SPL |
| 137 | select SUPPORT_TPL |
| 138 | select SPL |
| 139 | select SPL_ATF |
| 140 | select SPL_ATF_NO_PLATFORM_PARAM |
| 141 | select SPL_LOAD_FIT |
| 142 | imply ROCKCHIP_COMMON_BOARD |
| 143 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 144 | imply SPL_CLK |
| 145 | imply SPL_REGMAP |
| 146 | imply SPL_SYSCON |
| 147 | imply SPL_RAM |
| 148 | imply SPL_SERIAL_SUPPORT |
| 149 | imply TPL_SERIAL_SUPPORT |
| 150 | imply SPL_SEPARATE_BSS |
| 151 | help |
| 152 | The Rockchip RK3308 is a ARM-based Soc which embedded with quad |
| 153 | Cortex-A35 and highly integrated audio interfaces. |
| 154 | |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 155 | config ROCKCHIP_RK3328 |
| 156 | bool "Support Rockchip RK3328" |
| 157 | select ARM64 |
Kever Yang | c009aeb | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 158 | select SUPPORT_SPL |
| 159 | select SPL |
Kever Yang | 3f47db0 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 160 | select SUPPORT_TPL |
| 161 | select TPL |
| 162 | select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL |
| 163 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 38ed267 | 2019-07-22 20:02:16 +0800 | [diff] [blame] | 164 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | ca93e32 | 2019-11-15 11:04:44 +0800 | [diff] [blame] | 165 | imply ROCKCHIP_SDRAM_COMMON |
Kever Yang | 9cc6704 | 2019-07-22 19:59:32 +0800 | [diff] [blame] | 166 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | c009aeb | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 167 | imply SPL_SERIAL_SUPPORT |
Kever Yang | 3f47db0 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 168 | imply TPL_SERIAL_SUPPORT |
Kever Yang | c009aeb | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 169 | imply SPL_SEPARATE_BSS |
| 170 | select ENABLE_ARM_SOC_BOOT0_HOOK |
| 171 | select DEBUG_UART_BOARD_INIT |
| 172 | select SYS_NS16550 |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 173 | help |
| 174 | The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. |
| 175 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 176 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 177 | and video codec support. Peripherals include Gigabit Ethernet, |
| 178 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 179 | |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 180 | config ROCKCHIP_RK3368 |
| 181 | bool "Support Rockchip RK3368" |
| 182 | select ARM64 |
Philipp Tomsich | 5071457 | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 183 | select SUPPORT_SPL |
| 184 | select SUPPORT_TPL |
Philipp Tomsich | 4cf4378 | 2017-07-28 20:03:07 +0200 | [diff] [blame] | 185 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 186 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | edaf8db | 2019-07-22 20:02:17 +0800 | [diff] [blame] | 187 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 30d7109 | 2019-07-22 19:59:34 +0800 | [diff] [blame] | 188 | imply SPL_ROCKCHIP_COMMON_BOARD |
Philipp Tomsich | 5071457 | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 189 | imply SPL_SEPARATE_BSS |
| 190 | imply SPL_SERIAL_SUPPORT |
| 191 | imply TPL_SERIAL_SUPPORT |
Kever Yang | 82560cb | 2019-07-09 22:05:58 +0800 | [diff] [blame] | 192 | imply TPL_ROCKCHIP_COMMON_BOARD |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 193 | help |
Philipp Tomsich | 9a8f009 | 2017-06-10 00:47:53 +0200 | [diff] [blame] | 194 | The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised |
| 195 | into a big and little cluster with 4 cores each) Cortex-A53 including |
| 196 | AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache |
| 197 | (for the little cluster), PowerVR G6110 based graphics, one video |
| 198 | output processor supporting LVDS/HDMI/eDP, several DDR3 options and |
| 199 | video codec support. |
| 200 | |
| 201 | On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, |
| 202 | I2S, UARTs, SPI, I2C and PWMs. |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 203 | |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 204 | config ROCKCHIP_RK3399 |
| 205 | bool "Support Rockchip RK3399" |
| 206 | select ARM64 |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 207 | select SUPPORT_SPL |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 208 | select SUPPORT_TPL |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 209 | select SPL |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 210 | select SPL_ATF |
Jagan Teki | adde32d | 2019-06-21 00:25:03 +0530 | [diff] [blame] | 211 | select SPL_BOARD_INIT if SPL |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 212 | select SPL_LOAD_FIT |
| 213 | select SPL_CLK if SPL |
| 214 | select SPL_PINCTRL if SPL |
| 215 | select SPL_RAM if SPL |
| 216 | select SPL_REGMAP if SPL |
| 217 | select SPL_SYSCON if SPL |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 218 | select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL |
| 219 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 220 | select SPL_SEPARATE_BSS |
Philipp Tomsich | c0508e4 | 2017-07-26 12:29:01 +0200 | [diff] [blame] | 221 | select SPL_SERIAL_SUPPORT |
| 222 | select SPL_DRIVERS_MISC_SUPPORT |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 223 | select CLK |
| 224 | select FIT |
| 225 | select PINCTRL |
| 226 | select RAM |
| 227 | select REGMAP |
| 228 | select SYSCON |
| 229 | select DM_PMIC |
| 230 | select DM_REGULATOR_FIXED |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 231 | select BOARD_LATE_INIT |
Jagan Teki | 61853a7 | 2020-04-02 17:11:23 +0530 | [diff] [blame] | 232 | imply PRE_CONSOLE_BUFFER |
Kever Yang | 920b013 | 2019-07-22 20:02:19 +0800 | [diff] [blame] | 233 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | a922d0d | 2019-11-15 11:04:45 +0800 | [diff] [blame] | 234 | imply ROCKCHIP_SDRAM_COMMON |
Hugh Cole-Baker | 46a8606 | 2020-06-16 00:30:47 +0100 | [diff] [blame] | 235 | imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF |
Kever Yang | b7abef2 | 2019-07-22 19:59:42 +0800 | [diff] [blame] | 236 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 237 | imply TPL_SERIAL_SUPPORT |
| 238 | imply TPL_LIBCOMMON_SUPPORT |
| 239 | imply TPL_LIBGENERIC_SUPPORT |
| 240 | imply TPL_SYS_MALLOC_SIMPLE |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 241 | imply TPL_DRIVERS_MISC_SUPPORT |
| 242 | imply TPL_OF_CONTROL |
| 243 | imply TPL_DM |
| 244 | imply TPL_REGMAP |
| 245 | imply TPL_SYSCON |
| 246 | imply TPL_RAM |
| 247 | imply TPL_CLK |
| 248 | imply TPL_TINY_MEMSET |
Kever Yang | 2738181 | 2019-07-09 22:06:01 +0800 | [diff] [blame] | 249 | imply TPL_ROCKCHIP_COMMON_BOARD |
Jagan Teki | efebc8e | 2020-01-09 14:22:19 +0530 | [diff] [blame] | 250 | imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT |
| 251 | imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 252 | help |
| 253 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 |
| 254 | and quad-core Cortex-A53. |
| 255 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 256 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 257 | and video codec support. Peripherals include Gigabit Ethernet, |
| 258 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 259 | |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 260 | config ROCKCHIP_RV1108 |
| 261 | bool "Support Rockchip RV1108" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 262 | select CPU_V7A |
Kever Yang | 26008cd | 2019-07-22 20:02:21 +0800 | [diff] [blame] | 263 | imply ROCKCHIP_COMMON_BOARD |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 264 | help |
| 265 | The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 |
| 266 | and a DSP. |
| 267 | |
Heiko Stuebner | 5b5ca4c | 2018-10-08 13:01:56 +0200 | [diff] [blame] | 268 | config ROCKCHIP_USB_UART |
| 269 | bool "Route uart output to usb pins" |
| 270 | help |
| 271 | Rockchip SoCs have the ability to route the signals of the debug |
| 272 | uart through the d+ and d- pins of a specific usb phy to enable |
| 273 | some form of closed-case debugging. With this option supported |
| 274 | SoCs will enable this routing as a debug measure. |
| 275 | |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 276 | config SPL_ROCKCHIP_BACK_TO_BROM |
Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 277 | bool "SPL returns to bootrom" |
| 278 | default y if ROCKCHIP_RK3036 |
Heiko Stübner | 1d84594 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 279 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 280 | select SPL_BOOTROM_SUPPORT |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 281 | depends on SPL |
| 282 | help |
| 283 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 284 | SPL will return to the boot rom, which will then load the U-Boot |
| 285 | binary to keep going on. |
| 286 | |
| 287 | config TPL_ROCKCHIP_BACK_TO_BROM |
| 288 | bool "TPL returns to bootrom" |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 289 | default y |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 290 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 291 | select TPL_BOOTROM_SUPPORT |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 292 | depends on TPL |
Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 293 | help |
| 294 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 295 | SPL will return to the boot rom, which will then load the U-Boot |
| 296 | binary to keep going on. |
| 297 | |
Kever Yang | 54f17fa | 2019-07-22 20:02:01 +0800 | [diff] [blame] | 298 | config ROCKCHIP_COMMON_BOARD |
| 299 | bool "Rockchip common board file" |
| 300 | help |
| 301 | Rockchip SoCs have similar boot process, Common board file is mainly |
| 302 | in charge of common process of board_init() and board_late_init() for |
| 303 | U-Boot proper. |
| 304 | |
Kever Yang | 49105fb | 2019-07-22 19:59:12 +0800 | [diff] [blame] | 305 | config SPL_ROCKCHIP_COMMON_BOARD |
| 306 | bool "Rockchip SPL common board file" |
| 307 | depends on SPL |
| 308 | help |
| 309 | Rockchip SoCs have similar boot process, SPL is mainly in charge of |
| 310 | load and boot Trust ATF/U-Boot firmware, and DRAM init if there is |
| 311 | no TPL for the board. |
| 312 | |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 313 | config TPL_ROCKCHIP_COMMON_BOARD |
Thomas Hebb | d4e4187 | 2019-12-20 18:05:22 -0800 | [diff] [blame] | 314 | bool "Rockchip TPL common board file" |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 315 | depends on TPL |
| 316 | help |
| 317 | Rockchip SoCs have similar boot process, prefer to use TPL for DRAM |
| 318 | init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL |
| 319 | common board is a basic TPL board init which can be shared for most |
Thomas Hebb | 32f2ca2 | 2019-11-13 18:18:03 -0800 | [diff] [blame] | 320 | of SoCs to avoid copy-paste for different SoCs. |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 321 | |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 322 | config ROCKCHIP_BOOT_MODE_REG |
| 323 | hex "Rockchip boot mode flag register address" |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 324 | help |
Kever Yang | 15f09a1 | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 325 | The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 326 | according to the value from this register. |
| 327 | |
Kever Yang | fa1392a | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 328 | config ROCKCHIP_SPL_RESERVE_IRAM |
| 329 | hex "Size of IRAM reserved in SPL" |
Kever Yang | 8a8106f | 2017-12-18 15:13:19 +0800 | [diff] [blame] | 330 | default 0 |
Kever Yang | fa1392a | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 331 | help |
| 332 | SPL may need reserve memory for firmware loaded by SPL, whose load |
| 333 | address is in IRAM and may overlay with SPL text area if not |
| 334 | reserved. |
| 335 | |
Heiko Stübner | 1d84594 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 336 | config ROCKCHIP_BROM_HELPER |
| 337 | bool |
| 338 | |
Philipp Tomsich | b377d22 | 2017-10-10 16:21:10 +0200 | [diff] [blame] | 339 | config SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 340 | bool "SPL requires early-return (for RK3188-style BROM) to BROM" |
| 341 | depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 342 | help |
| 343 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 344 | first stage in segments and enter multiple times. E.g. on |
| 345 | the RK3188, the first 1KB of the first stage are loaded |
| 346 | first and entered; after returning to the BROM, the |
| 347 | remainder of the first stage is loaded, but the BROM |
| 348 | re-enters at the same address/to the same code as previously. |
| 349 | |
| 350 | This enables support code in the BOOT0 hook for the SPL stage |
| 351 | to allow multiple entries. |
| 352 | |
| 353 | config TPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 354 | bool "TPL requires early-return (for RK3188-style BROM) to BROM" |
| 355 | depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 356 | help |
| 357 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 358 | first stage in segments and enter multiple times. E.g. on |
| 359 | the RK3188, the first 1KB of the first stage are loaded |
| 360 | first and entered; after returning to the BROM, the |
| 361 | remainder of the first stage is loaded, but the BROM |
| 362 | re-enters at the same address/to the same code as previously. |
| 363 | |
| 364 | This enables support code in the BOOT0 hook for the TPL stage |
| 365 | to allow multiple entries. |
| 366 | |
Sandy Patterson | 230e0e0 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 367 | config SPL_MMC_SUPPORT |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 368 | default y if !SPL_ROCKCHIP_BACK_TO_BROM |
Sandy Patterson | 230e0e0 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 369 | |
Simon Glass | 9b312e2 | 2020-07-19 13:55:57 -0600 | [diff] [blame] | 370 | config ROCKCHIP_SPI_IMAGE |
| 371 | bool "Build a SPI image for rockchip" |
| 372 | depends on HAS_ROM |
| 373 | help |
| 374 | Some Rockchip SoCs support booting from SPI flash. Enable this |
| 375 | option to produce a 4MB SPI-flash image (called u-boot.rom) |
| 376 | containing U-Boot. The image is built by binman. U-Boot sits near |
| 377 | the start of the image. |
| 378 | |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 379 | source "arch/arm/mach-rockchip/px30/Kconfig" |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 380 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 381 | source "arch/arm/mach-rockchip/rk3128/Kconfig" |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 382 | source "arch/arm/mach-rockchip/rk3188/Kconfig" |
Kever Yang | b24a8ec | 2017-06-23 17:17:54 +0800 | [diff] [blame] | 383 | source "arch/arm/mach-rockchip/rk322x/Kconfig" |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 384 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 385 | source "arch/arm/mach-rockchip/rk3308/Kconfig" |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 386 | source "arch/arm/mach-rockchip/rk3328/Kconfig" |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 387 | source "arch/arm/mach-rockchip/rk3368/Kconfig" |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 388 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 389 | source "arch/arm/mach-rockchip/rv1108/Kconfig" |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 390 | endif |