blob: 407bf3fbeae2c4f5a03706b35184583279b658eb [file] [log] [blame]
Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
11 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
12 select TPL_NEEDS_SEPARATE_STACK if TPL
13 imply SPL_SEPARATE_BSS
14 select SPL_SERIAL_SUPPORT
15 select TPL_SERIAL_SUPPORT
16 select DEBUG_UART_BOARD_INIT
17 imply ROCKCHIP_COMMON_BOARD
18 imply SPL_ROCKCHIP_COMMON_BOARD
19 help
20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner041cdb52016-07-16 00:17:15 +020025config ROCKCHIP_RK3036
26 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053027 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080028 select SUPPORT_SPL
29 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +080030 imply USB_FUNCTION_ROCKUSB
31 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080032 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020033 help
34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
35 including NEON and GPU, Mali-400 graphics, several DDR3 options
36 and video codec support. Peripherals include Gigabit Ethernet,
37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
38
Kever Yangdaeed1d2017-11-28 16:04:16 +080039config ROCKCHIP_RK3128
40 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053041 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080042 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080043 help
44 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
45 including NEON and GPU, Mali-400 graphics, several DDR3 options
46 and video codec support. Peripherals include Gigabit Ethernet,
47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
48
Heiko Stübner0a2be692017-02-18 19:46:36 +010049config ROCKCHIP_RK3188
50 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053051 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080052 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010053 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010054 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020055 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020056 select SPL_REGMAP
57 select SPL_SYSCON
58 select SPL_RAM
59 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020060 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080061 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020062 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080064 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010065 help
66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
68 video interfaces, several memory options and video codec support.
69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
70 UART, SPI, I2C and PWMs.
71
Kever Yang168eef72017-06-23 17:17:52 +080072config ROCKCHIP_RK322X
73 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053074 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080075 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080076 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080077 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080078 select SPL_DM
79 select SPL_OF_LIBFDT
80 select TPL
81 select TPL_DM
82 select TPL_OF_LIBFDT
83 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
84 select TPL_NEEDS_SEPARATE_STACK if TPL
85 select SPL_DRIVERS_MISC_SUPPORT
Kever Yangcca3b092019-07-22 20:02:07 +080086 imply ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080087 imply SPL_SERIAL_SUPPORT
Kever Yang0cd65e42019-07-22 19:59:20 +080088 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080089 imply TPL_SERIAL_SUPPORT
Kever Yang6ae28a32019-07-09 22:05:56 +080090 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +080091 select TPL_LIBCOMMON_SUPPORT
92 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080093 help
94 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
95 including NEON and GPU, Mali-400 graphics, several DDR3 options
96 and video codec support. Peripherals include Gigabit Ethernet,
97 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
98
Simon Glass2444dae2015-08-30 16:55:38 -060099config ROCKCHIP_RK3288
100 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530101 select CPU_V7A
Jagan Tekieab5c502020-07-21 12:16:38 +0530102 select OF_BOARD_SETUP
Kever Yanga381bcf2016-07-19 21:16:59 +0800103 select SUPPORT_SPL
104 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +0800105 select SUPPORT_TPL
Jagan Teki38070172020-01-23 19:42:19 +0530106 imply PRE_CONSOLE_BUFFER
Kever Yangde57a9f2019-07-22 20:02:15 +0800107 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +0800108 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800109 imply TPL_CLK
110 imply TPL_DM
111 imply TPL_DRIVERS_MISC_SUPPORT
112 imply TPL_LIBCOMMON_SUPPORT
113 imply TPL_LIBGENERIC_SUPPORT
114 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +0800115 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +0800116 imply TPL_OF_CONTROL
117 imply TPL_OF_PLATDATA
118 imply TPL_RAM
119 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +0800120 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800121 imply TPL_SERIAL_SUPPORT
122 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +0800123 imply USB_FUNCTION_ROCKUSB
124 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600125 help
126 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
127 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
128 video interfaces supporting HDMI and eDP, several DDR3 options
129 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100130 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600131
Andy Yanf1a22522019-11-14 11:21:12 +0800132config ROCKCHIP_RK3308
133 bool "Support Rockchip RK3308"
134 select ARM64
135 select DEBUG_UART_BOARD_INIT
136 select SUPPORT_SPL
137 select SUPPORT_TPL
138 select SPL
139 select SPL_ATF
140 select SPL_ATF_NO_PLATFORM_PARAM
141 select SPL_LOAD_FIT
142 imply ROCKCHIP_COMMON_BOARD
143 imply SPL_ROCKCHIP_COMMON_BOARD
144 imply SPL_CLK
145 imply SPL_REGMAP
146 imply SPL_SYSCON
147 imply SPL_RAM
148 imply SPL_SERIAL_SUPPORT
149 imply TPL_SERIAL_SUPPORT
150 imply SPL_SEPARATE_BSS
151 help
152 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
153 Cortex-A35 and highly integrated audio interfaces.
154
Kever Yang85a3cfb2017-02-23 15:37:51 +0800155config ROCKCHIP_RK3328
156 bool "Support Rockchip RK3328"
157 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300158 select SUPPORT_SPL
159 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300160 select SUPPORT_TPL
161 select TPL
162 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
163 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800164 imply ROCKCHIP_COMMON_BOARD
YouMin Chenca93e322019-11-15 11:04:44 +0800165 imply ROCKCHIP_SDRAM_COMMON
Kever Yang9cc67042019-07-22 19:59:32 +0800166 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangc009aeb2019-06-09 00:27:15 +0300167 imply SPL_SERIAL_SUPPORT
Kever Yang3f47db02019-08-02 10:40:01 +0300168 imply TPL_SERIAL_SUPPORT
Kever Yangc009aeb2019-06-09 00:27:15 +0300169 imply SPL_SEPARATE_BSS
170 select ENABLE_ARM_SOC_BOOT0_HOOK
171 select DEBUG_UART_BOARD_INIT
172 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800173 help
174 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
175 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
176 video interfaces supporting HDMI and eDP, several DDR3 options
177 and video codec support. Peripherals include Gigabit Ethernet,
178 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
179
Andreas Färber37a0c602017-05-15 17:51:18 +0800180config ROCKCHIP_RK3368
181 bool "Support Rockchip RK3368"
182 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200183 select SUPPORT_SPL
184 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200185 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
186 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800187 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800188 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200189 imply SPL_SEPARATE_BSS
190 imply SPL_SERIAL_SUPPORT
191 imply TPL_SERIAL_SUPPORT
Kever Yang82560cb2019-07-09 22:05:58 +0800192 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800193 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200194 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
195 into a big and little cluster with 4 cores each) Cortex-A53 including
196 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
197 (for the little cluster), PowerVR G6110 based graphics, one video
198 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
199 video codec support.
200
201 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
202 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800203
Kever Yanga381bcf2016-07-19 21:16:59 +0800204config ROCKCHIP_RK3399
205 bool "Support Rockchip RK3399"
206 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800207 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800208 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800209 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530210 select SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530211 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530212 select SPL_LOAD_FIT
213 select SPL_CLK if SPL
214 select SPL_PINCTRL if SPL
215 select SPL_RAM if SPL
216 select SPL_REGMAP if SPL
217 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800218 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
219 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800220 select SPL_SEPARATE_BSS
Philipp Tomsichc0508e42017-07-26 12:29:01 +0200221 select SPL_SERIAL_SUPPORT
222 select SPL_DRIVERS_MISC_SUPPORT
Jagan Teki2666bd42019-05-08 11:11:43 +0530223 select CLK
224 select FIT
225 select PINCTRL
226 select RAM
227 select REGMAP
228 select SYSCON
229 select DM_PMIC
230 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800231 select BOARD_LATE_INIT
Jagan Teki61853a72020-04-02 17:11:23 +0530232 imply PRE_CONSOLE_BUFFER
Kever Yang920b0132019-07-22 20:02:19 +0800233 imply ROCKCHIP_COMMON_BOARD
YouMin Chena922d0d2019-11-15 11:04:45 +0800234 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Baker46a86062020-06-16 00:30:47 +0100235 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangb7abef22019-07-22 19:59:42 +0800236 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang6bbf5e12018-11-09 11:18:15 +0800237 imply TPL_SERIAL_SUPPORT
238 imply TPL_LIBCOMMON_SUPPORT
239 imply TPL_LIBGENERIC_SUPPORT
240 imply TPL_SYS_MALLOC_SIMPLE
Kever Yang6bbf5e12018-11-09 11:18:15 +0800241 imply TPL_DRIVERS_MISC_SUPPORT
242 imply TPL_OF_CONTROL
243 imply TPL_DM
244 imply TPL_REGMAP
245 imply TPL_SYSCON
246 imply TPL_RAM
247 imply TPL_CLK
248 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800249 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekiefebc8e2020-01-09 14:22:19 +0530250 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
251 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yanga381bcf2016-07-19 21:16:59 +0800252 help
253 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
254 and quad-core Cortex-A53.
255 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
256 video interfaces supporting HDMI and eDP, several DDR3 options
257 and video codec support. Peripherals include Gigabit Ethernet,
258 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
259
Andy Yan2c1e11d2017-06-01 18:00:55 +0800260config ROCKCHIP_RV1108
261 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530262 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800263 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800264 help
265 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
266 and a DSP.
267
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200268config ROCKCHIP_USB_UART
269 bool "Route uart output to usb pins"
270 help
271 Rockchip SoCs have the ability to route the signals of the debug
272 uart through the d+ and d- pins of a specific usb phy to enable
273 some form of closed-case debugging. With this option supported
274 SoCs will enable this routing as a debug measure.
275
Philipp Tomsichee14d292017-06-29 11:21:15 +0200276config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800277 bool "SPL returns to bootrom"
278 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100279 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800280 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200281 depends on SPL
282 help
283 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
284 SPL will return to the boot rom, which will then load the U-Boot
285 binary to keep going on.
286
287config TPL_ROCKCHIP_BACK_TO_BROM
288 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800289 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200290 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800291 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200292 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800293 help
294 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
295 SPL will return to the boot rom, which will then load the U-Boot
296 binary to keep going on.
297
Kever Yang54f17fa2019-07-22 20:02:01 +0800298config ROCKCHIP_COMMON_BOARD
299 bool "Rockchip common board file"
300 help
301 Rockchip SoCs have similar boot process, Common board file is mainly
302 in charge of common process of board_init() and board_late_init() for
303 U-Boot proper.
304
Kever Yang49105fb2019-07-22 19:59:12 +0800305config SPL_ROCKCHIP_COMMON_BOARD
306 bool "Rockchip SPL common board file"
307 depends on SPL
308 help
309 Rockchip SoCs have similar boot process, SPL is mainly in charge of
310 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
311 no TPL for the board.
312
Kever Yang18f85082019-07-09 22:05:55 +0800313config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbd4e41872019-12-20 18:05:22 -0800314 bool "Rockchip TPL common board file"
Kever Yang18f85082019-07-09 22:05:55 +0800315 depends on TPL
316 help
317 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
318 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
319 common board is a basic TPL board init which can be shared for most
Thomas Hebb32f2ca22019-11-13 18:18:03 -0800320 of SoCs to avoid copy-paste for different SoCs.
Kever Yang18f85082019-07-09 22:05:55 +0800321
Andy Yane3067792017-10-11 15:00:16 +0800322config ROCKCHIP_BOOT_MODE_REG
323 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800324 help
Kever Yang15f09a12019-03-28 11:01:23 +0800325 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800326 according to the value from this register.
327
Kever Yangfa1392a2017-04-20 17:03:46 +0800328config ROCKCHIP_SPL_RESERVE_IRAM
329 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800330 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800331 help
332 SPL may need reserve memory for firmware loaded by SPL, whose load
333 address is in IRAM and may overlay with SPL text area if not
334 reserved.
335
Heiko Stübner1d845942017-02-18 19:46:25 +0100336config ROCKCHIP_BROM_HELPER
337 bool
338
Philipp Tomsichb377d222017-10-10 16:21:10 +0200339config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
340 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
341 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
342 help
343 Some Rockchip BROM variants (e.g. on the RK3188) load the
344 first stage in segments and enter multiple times. E.g. on
345 the RK3188, the first 1KB of the first stage are loaded
346 first and entered; after returning to the BROM, the
347 remainder of the first stage is loaded, but the BROM
348 re-enters at the same address/to the same code as previously.
349
350 This enables support code in the BOOT0 hook for the SPL stage
351 to allow multiple entries.
352
353config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
354 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
355 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
356 help
357 Some Rockchip BROM variants (e.g. on the RK3188) load the
358 first stage in segments and enter multiple times. E.g. on
359 the RK3188, the first 1KB of the first stage are loaded
360 first and entered; after returning to the BROM, the
361 remainder of the first stage is loaded, but the BROM
362 re-enters at the same address/to the same code as previously.
363
364 This enables support code in the BOOT0 hook for the TPL stage
365 to allow multiple entries.
366
Sandy Patterson230e0e02016-08-29 07:31:16 -0400367config SPL_MMC_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200368 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400369
Simon Glass9b312e22020-07-19 13:55:57 -0600370config ROCKCHIP_SPI_IMAGE
371 bool "Build a SPI image for rockchip"
372 depends on HAS_ROM
373 help
374 Some Rockchip SoCs support booting from SPI flash. Enable this
375 option to produce a 4MB SPI-flash image (called u-boot.rom)
376 containing U-Boot. The image is built by binman. U-Boot sits near
377 the start of the image.
378
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +0200379source "arch/arm/mach-rockchip/px30/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +0800380source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800381source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100382source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800383source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200384source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanf1a22522019-11-14 11:21:12 +0800385source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800386source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800387source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800388source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800389source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600390endif