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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
wdenk028ab6b2004-02-23 23:54:43 +000042
wdenk5653fc32004-02-08 22:55:38 +000043/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010044 * This file implements a Common Flash Interface (CFI) driver for
45 * U-Boot.
46 *
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000050 *
51 * References
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010056 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000059 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010061 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000062 */
63
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#ifndef CONFIG_SYS_FLASH_BANKS_LIST
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkbf9e3b32004-02-12 00:47:09 +000066#endif
67
wdenk5653fc32004-02-08 22:55:38 +000068#define FLASH_CMD_CFI 0x98
69#define FLASH_CMD_READ_ID 0x90
70#define FLASH_CMD_RESET 0xff
71#define FLASH_CMD_BLOCK_ERASE 0x20
72#define FLASH_CMD_ERASE_CONFIRM 0xD0
73#define FLASH_CMD_WRITE 0x40
74#define FLASH_CMD_PROTECT 0x60
75#define FLASH_CMD_PROTECT_SET 0x01
76#define FLASH_CMD_PROTECT_CLEAR 0xD0
77#define FLASH_CMD_CLEAR_STATUS 0x50
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040078#define FLASH_CMD_READ_STATUS 0x70
wdenkbf9e3b32004-02-12 00:47:09 +000079#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040080#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
wdenkbf9e3b32004-02-12 00:47:09 +000081#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk5653fc32004-02-08 22:55:38 +000082
83#define FLASH_STATUS_DONE 0x80
84#define FLASH_STATUS_ESS 0x40
85#define FLASH_STATUS_ECLBS 0x20
86#define FLASH_STATUS_PSLBS 0x10
87#define FLASH_STATUS_VPENS 0x08
88#define FLASH_STATUS_PSS 0x04
89#define FLASH_STATUS_DPS 0x02
90#define FLASH_STATUS_R 0x01
91#define FLASH_STATUS_PROTECT 0x01
92
93#define AMD_CMD_RESET 0xF0
94#define AMD_CMD_WRITE 0xA0
95#define AMD_CMD_ERASE_START 0x80
96#define AMD_CMD_ERASE_SECTOR 0x30
wdenk855a4962004-03-14 18:23:55 +000097#define AMD_CMD_UNLOCK_START 0xAA
98#define AMD_CMD_UNLOCK_ACK 0x55
Stefan Roese79b4cda2006-02-28 15:29:58 +010099#define AMD_CMD_WRITE_TO_BUFFER 0x25
100#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
wdenk5653fc32004-02-08 22:55:38 +0000101
102#define AMD_STATUS_TOGGLE 0x40
103#define AMD_STATUS_ERROR 0x20
Stefan Roese79b4cda2006-02-28 15:29:58 +0100104
Rafael Camposbc9019e2008-07-31 10:22:20 +0200105#define ATM_CMD_UNLOCK_SECT 0x70
106#define ATM_CMD_SOFTLOCK_START 0x80
107#define ATM_CMD_LOCK_SECT 0x40
108
Stefan Roese260421a2006-11-13 13:55:24 +0100109#define FLASH_OFFSET_MANUFACTURER_ID 0x00
110#define FLASH_OFFSET_DEVICE_ID 0x01
111#define FLASH_OFFSET_DEVICE_ID2 0x0E
112#define FLASH_OFFSET_DEVICE_ID3 0x0F
wdenk5653fc32004-02-08 22:55:38 +0000113#define FLASH_OFFSET_CFI 0x55
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100114#define FLASH_OFFSET_CFI_ALT 0x555
wdenk5653fc32004-02-08 22:55:38 +0000115#define FLASH_OFFSET_CFI_RESP 0x10
wdenkbf9e3b32004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100117/* extended query table primary address */
118#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
wdenk5653fc32004-02-08 22:55:38 +0000119#define FLASH_OFFSET_WTOUT 0x1F
wdenkbf9e3b32004-02-12 00:47:09 +0000120#define FLASH_OFFSET_WBTOUT 0x20
wdenk5653fc32004-02-08 22:55:38 +0000121#define FLASH_OFFSET_ETOUT 0x21
wdenkbf9e3b32004-02-12 00:47:09 +0000122#define FLASH_OFFSET_CETOUT 0x22
wdenk5653fc32004-02-08 22:55:38 +0000123#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenkbf9e3b32004-02-12 00:47:09 +0000124#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk5653fc32004-02-08 22:55:38 +0000125#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenkbf9e3b32004-02-12 00:47:09 +0000126#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk5653fc32004-02-08 22:55:38 +0000127#define FLASH_OFFSET_SIZE 0x27
wdenkbf9e3b32004-02-12 00:47:09 +0000128#define FLASH_OFFSET_INTERFACE 0x28
129#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk5653fc32004-02-08 22:55:38 +0000130#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131#define FLASH_OFFSET_ERASE_REGIONS 0x2D
132#define FLASH_OFFSET_PROTECT 0x02
wdenkbf9e3b32004-02-12 00:47:09 +0000133#define FLASH_OFFSET_USER_PROTECTION 0x85
134#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk5653fc32004-02-08 22:55:38 +0000135
Stefan Roese260421a2006-11-13 13:55:24 +0100136#define CFI_CMDSET_NONE 0
137#define CFI_CMDSET_INTEL_EXTENDED 1
138#define CFI_CMDSET_AMD_STANDARD 2
139#define CFI_CMDSET_INTEL_STANDARD 3
140#define CFI_CMDSET_AMD_EXTENDED 4
141#define CFI_CMDSET_MITSU_STANDARD 256
142#define CFI_CMDSET_MITSU_EXTENDED 257
143#define CFI_CMDSET_SST 258
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400144#define CFI_CMDSET_INTEL_PROG_REGIONS 512
wdenk5653fc32004-02-08 22:55:38 +0000145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
wdenkf7d15722004-12-18 22:35:43 +0000147# undef FLASH_CMD_RESET
Stefan Roese260421a2006-11-13 13:55:24 +0100148# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
wdenkf7d15722004-12-18 22:35:43 +0000149#endif
150
wdenk5653fc32004-02-08 22:55:38 +0000151typedef union {
152 unsigned char c;
153 unsigned short w;
154 unsigned long l;
155 unsigned long long ll;
156} cfiword_t;
157
Stefan Roese260421a2006-11-13 13:55:24 +0100158#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
wdenk5653fc32004-02-08 22:55:38 +0000159
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100160static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Piotr Ziecik6ea808e2008-11-17 15:49:32 +0100161static uint flash_verbose = 1;
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
164#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
165# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200166#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200168#endif
wdenk5653fc32004-02-08 22:55:38 +0000169
Wolfgang Denk2a112b22008-08-08 16:39:54 +0200170flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
171
Stefan Roese79b4cda2006-02-28 15:29:58 +0100172/*
173 * Check if chip width is defined. If not, start detecting with 8bit.
174 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
176#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +0100177#endif
178
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100179/* CFI standard query structure */
180struct cfi_qry {
181 u8 qry[3];
182 u16 p_id;
183 u16 p_adr;
184 u16 a_id;
185 u16 a_adr;
186 u8 vcc_min;
187 u8 vcc_max;
188 u8 vpp_min;
189 u8 vpp_max;
190 u8 word_write_timeout_typ;
191 u8 buf_write_timeout_typ;
192 u8 block_erase_timeout_typ;
193 u8 chip_erase_timeout_typ;
194 u8 word_write_timeout_max;
195 u8 buf_write_timeout_max;
196 u8 block_erase_timeout_max;
197 u8 chip_erase_timeout_max;
198 u8 dev_size;
199 u16 interface_desc;
200 u16 max_buf_write_size;
201 u8 num_erase_regions;
202 u32 erase_region_info[NUM_ERASE_REGIONS];
203} __attribute__((packed));
204
205struct cfi_pri_hdr {
206 u8 pri[3];
207 u8 major_version;
208 u8 minor_version;
209} __attribute__((packed));
210
Stefan Roese45aa5a72008-11-17 14:45:22 +0100211static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100212{
213 __raw_writeb(value, addr);
214}
215
Stefan Roese45aa5a72008-11-17 14:45:22 +0100216static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100217{
218 __raw_writew(value, addr);
219}
220
Stefan Roese45aa5a72008-11-17 14:45:22 +0100221static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100222{
223 __raw_writel(value, addr);
224}
225
Stefan Roese45aa5a72008-11-17 14:45:22 +0100226static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100227{
228 /* No architectures currently implement __raw_writeq() */
229 *(volatile u64 *)addr = value;
230}
231
Stefan Roese45aa5a72008-11-17 14:45:22 +0100232static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100233{
234 return __raw_readb(addr);
235}
236
Stefan Roese45aa5a72008-11-17 14:45:22 +0100237static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100238{
239 return __raw_readw(addr);
240}
241
Stefan Roese45aa5a72008-11-17 14:45:22 +0100242static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100243{
244 return __raw_readl(addr);
245}
246
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100247static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100248{
249 /* No architectures currently implement __raw_readq() */
250 return *(volatile u64 *)addr;
251}
252
Stefan Roese45aa5a72008-11-17 14:45:22 +0100253#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
254void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
255void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
256void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
257void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
258u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
259u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
260u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100261u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100262#else
263#define flash_write8 __flash_write8
264#define flash_write16 __flash_write16
265#define flash_write32 __flash_write32
266#define flash_write64 __flash_write64
267#define flash_read8 __flash_read8
268#define flash_read16 __flash_read16
269#define flash_read32 __flash_read32
270#define flash_read64 __flash_read64
271#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100272
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200273/*-----------------------------------------------------------------------
274 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200275#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100276flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200277{
278 int i;
279 flash_info_t * info = 0;
280
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200282 info = & flash_info[i];
283 if (info->size && info->start[0] <= base &&
284 base <= info->start[0] + info->size - 1)
285 break;
286 }
287
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200289}
wdenk5653fc32004-02-08 22:55:38 +0000290#endif
291
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
293{
294 if (sect != (info->sector_count - 1))
295 return info->start[sect + 1] - info->start[sect];
296 else
297 return info->start[0] + info->size - info->start[sect];
298}
299
wdenk5653fc32004-02-08 22:55:38 +0000300/*-----------------------------------------------------------------------
301 * create an address based on the offset and the port width
302 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100303static inline void *
304flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000305{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100306 unsigned int byte_offset = offset * info->portwidth;
307
Becky Bruce09ce9922009-02-02 16:34:51 -0600308 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100309}
310
311static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
312 unsigned int offset, void *addr)
313{
wdenk5653fc32004-02-08 22:55:38 +0000314}
wdenkbf9e3b32004-02-12 00:47:09 +0000315
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200316/*-----------------------------------------------------------------------
317 * make a proper sized command based on the port and chip widths
318 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200319static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200320{
321 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400322 int cword_offset;
323 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200324#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200325 u32 cmd_le = cpu_to_le32(cmd);
326#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400327 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200328 uchar *cp = (uchar *) cmdbuf;
329
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400330 for (i = info->portwidth; i > 0; i--){
331 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200332#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400333 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200334 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200335#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400336 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200337 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200338#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200339 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400340 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200341}
342
wdenkbf9e3b32004-02-12 00:47:09 +0000343#ifdef DEBUG
344/*-----------------------------------------------------------------------
345 * Debug support
346 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100347static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000348{
349 int i;
350 char *cp;
351
Wolfgang Denk657f2062009-02-04 09:42:20 +0100352 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000353 for (i = 0; i < 8; i++)
354 sprintf (&str[i * 2], "%2.2x", *cp++);
355}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100357static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000358{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100359 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000360 int x, y;
361
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100362 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
363 debug("%02x : ", x);
364 for (y = 0; y < 16; y++)
365 debug("%2.2x ", p[x + y]);
366 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000367 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100368 unsigned char c = p[x + y];
369 if (c >= 0x20 && c <= 0x7e)
370 debug("%c", c);
371 else
372 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000373 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100374 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000375 }
376}
wdenkbf9e3b32004-02-12 00:47:09 +0000377#endif
378
379
wdenk5653fc32004-02-08 22:55:38 +0000380/*-----------------------------------------------------------------------
381 * read a character at a port width address
382 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100383static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000384{
385 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100386 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000387
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100388 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100390 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000391#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100392 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000393#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100394 flash_unmap (info, 0, offset, cp);
395 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000396}
397
398/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100399 * read a word at a port width address, assume 16bit bus
400 */
401static inline ushort flash_read_word (flash_info_t * info, uint offset)
402{
403 ushort *addr, retval;
404
405 addr = flash_map (info, 0, offset);
406 retval = flash_read16 (addr);
407 flash_unmap (info, 0, offset, addr);
408 return retval;
409}
410
411
412/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100413 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000414 * port size word. Swap for ppc format.
415 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100416static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
417 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000418{
wdenkbf9e3b32004-02-12 00:47:09 +0000419 uchar *addr;
420 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000421
wdenkbf9e3b32004-02-12 00:47:09 +0000422#ifdef DEBUG
423 int x;
424#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100425 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000426
427#ifdef DEBUG
428 debug ("long addr is at %p info->portwidth = %d\n", addr,
429 info->portwidth);
430 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100431 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000432 }
433#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200434#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100435 retval = ((flash_read8(addr) << 16) |
436 (flash_read8(addr + info->portwidth) << 24) |
437 (flash_read8(addr + 2 * info->portwidth)) |
438 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000439#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100440 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
441 (flash_read8(addr + info->portwidth - 1) << 16) |
442 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
443 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000444#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100445 flash_unmap(info, sect, offset, addr);
446
wdenkbf9e3b32004-02-12 00:47:09 +0000447 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000448}
449
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200450/*
451 * Write a proper sized command to the correct address
452 */
453static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
Sebastian Siewior7288f972008-07-15 13:35:23 +0200454 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200455{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100456
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100457 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200458 cfiword_t cword;
459
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100460 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200461 flash_make_cmd (info, cmd, &cword);
462 switch (info->portwidth) {
463 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100464 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200465 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100466 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200467 break;
468 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100469 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200470 cmd, cword.w,
471 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100472 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200473 break;
474 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100475 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 cmd, cword.l,
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100478 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_64BIT:
481#ifdef DEBUG
482 {
483 char str[20];
484
485 print_longlong (str, cword.ll);
486
487 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100488 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200489 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
490 }
491#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100492 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200493 break;
494 }
495
496 /* Ensure all the instructions are fully finished */
497 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100498
499 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200500}
501
502static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
503{
504 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
505 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
506}
507
508/*-----------------------------------------------------------------------
509 */
510static int flash_isequal (flash_info_t * info, flash_sect_t sect,
511 uint offset, uchar cmd)
512{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100513 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200514 cfiword_t cword;
515 int retval;
516
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100517 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200518 flash_make_cmd (info, cmd, &cword);
519
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100520 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200521 switch (info->portwidth) {
522 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100523 debug ("is= %x %x\n", flash_read8(addr), cword.c);
524 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200525 break;
526 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100527 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
528 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200529 break;
530 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700531 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100532 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200533 break;
534 case FLASH_CFI_64BIT:
535#ifdef DEBUG
536 {
537 char str1[20];
538 char str2[20];
539
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100540 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 print_longlong (str2, cword.ll);
542 debug ("is= %s %s\n", str1, str2);
543 }
544#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100545 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200546 break;
547 default:
548 retval = 0;
549 break;
550 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100551 flash_unmap(info, sect, offset, addr);
552
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200553 return retval;
554}
555
556/*-----------------------------------------------------------------------
557 */
558static int flash_isset (flash_info_t * info, flash_sect_t sect,
559 uint offset, uchar cmd)
560{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100561 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200562 cfiword_t cword;
563 int retval;
564
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100565 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200566 flash_make_cmd (info, cmd, &cword);
567 switch (info->portwidth) {
568 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100569 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200570 break;
571 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100572 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200573 break;
574 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100575 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200576 break;
577 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100578 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200579 break;
580 default:
581 retval = 0;
582 break;
583 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100584 flash_unmap(info, sect, offset, addr);
585
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200586 return retval;
587}
588
589/*-----------------------------------------------------------------------
590 */
591static int flash_toggle (flash_info_t * info, flash_sect_t sect,
592 uint offset, uchar cmd)
593{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100594 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200595 cfiword_t cword;
596 int retval;
597
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100598 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200599 flash_make_cmd (info, cmd, &cword);
600 switch (info->portwidth) {
601 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200602 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200603 break;
604 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200605 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200606 break;
607 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200608 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200609 break;
610 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100611 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
612 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200613 break;
614 default:
615 retval = 0;
616 break;
617 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100618 flash_unmap(info, sect, offset, addr);
619
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200620 return retval;
621}
622
623/*
624 * flash_is_busy - check to see if the flash is busy
625 *
626 * This routine checks the status of the chip and returns true if the
627 * chip is busy.
628 */
629static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
630{
631 int retval;
632
633 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400634 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200635 case CFI_CMDSET_INTEL_STANDARD:
636 case CFI_CMDSET_INTEL_EXTENDED:
637 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
638 break;
639 case CFI_CMDSET_AMD_STANDARD:
640 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100641#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200642 case CFI_CMDSET_AMD_LEGACY:
643#endif
644 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
645 break;
646 default:
647 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100648 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200649 debug ("flash_is_busy: %d\n", retval);
650 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100651}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200652
653/*-----------------------------------------------------------------------
654 * wait for XSR.7 to be set. Time out with an error if it does not.
655 * This routine does not set the flash to read-array mode.
656 */
657static int flash_status_check (flash_info_t * info, flash_sect_t sector,
658 ulong tout, char *prompt)
659{
660 ulong start;
661
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200662#if CONFIG_SYS_HZ != 1000
663 tout *= CONFIG_SYS_HZ/1000;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200664#endif
665
666 /* Wait for command completion */
667 start = get_timer (0);
668 while (flash_is_busy (info, sector)) {
669 if (get_timer (start) > tout) {
670 printf ("Flash %s timeout at address %lx data %lx\n",
671 prompt, info->start[sector],
672 flash_read_long (info, sector, 0));
673 flash_write_cmd (info, sector, 0, info->cmd_reset);
674 return ERR_TIMOUT;
675 }
676 udelay (1); /* also triggers watchdog */
677 }
678 return ERR_OK;
679}
680
681/*-----------------------------------------------------------------------
682 * Wait for XSR.7 to be set, if it times out print an error, otherwise
683 * do a full status check.
684 *
685 * This routine sets the flash to read-array mode.
686 */
687static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
688 ulong tout, char *prompt)
689{
690 int retcode;
691
692 retcode = flash_status_check (info, sector, tout, prompt);
693 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400694 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200695 case CFI_CMDSET_INTEL_EXTENDED:
696 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500697 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200698 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
699 retcode = ERR_INVAL;
700 printf ("Flash %s error at address %lx\n", prompt,
701 info->start[sector]);
702 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
703 FLASH_STATUS_PSLBS)) {
704 puts ("Command Sequence Error.\n");
705 } else if (flash_isset (info, sector, 0,
706 FLASH_STATUS_ECLBS)) {
707 puts ("Block Erase Error.\n");
708 retcode = ERR_NOT_ERASED;
709 } else if (flash_isset (info, sector, 0,
710 FLASH_STATUS_PSLBS)) {
711 puts ("Locking Error\n");
712 }
713 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
714 puts ("Block locked.\n");
715 retcode = ERR_PROTECTED;
716 }
717 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
718 puts ("Vpp Low Error.\n");
719 }
720 flash_write_cmd (info, sector, 0, info->cmd_reset);
721 break;
722 default:
723 break;
724 }
725 return retcode;
726}
727
728/*-----------------------------------------------------------------------
729 */
730static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
731{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200732#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200733 unsigned short w;
734 unsigned int l;
735 unsigned long long ll;
736#endif
737
738 switch (info->portwidth) {
739 case FLASH_CFI_8BIT:
740 cword->c = c;
741 break;
742 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200743#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200744 w = c;
745 w <<= 8;
746 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100747#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200748 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100749#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200750 break;
751 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200752#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200753 l = c;
754 l <<= 24;
755 cword->l = (cword->l >> 8) | l;
756#else
757 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200758#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200759 break;
760 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200761#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200762 ll = c;
763 ll <<= 56;
764 cword->ll = (cword->ll >> 8) | ll;
765#else
766 cword->ll = (cword->ll << 8) | c;
767#endif
768 break;
wdenk5653fc32004-02-08 22:55:38 +0000769 }
wdenk5653fc32004-02-08 22:55:38 +0000770}
771
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100772/*
773 * Loop through the sector table starting from the previously found sector.
774 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000775 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200776static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000777{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100778 static flash_sect_t saved_sector = 0; /* previously found sector */
779 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000780
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100781 while ((info->start[sector] < addr)
782 && (sector < info->sector_count - 1))
783 sector++;
784 while ((info->start[sector] > addr) && (sector > 0))
785 /*
786 * also decrements the sector in case of an overshot
787 * in the first loop
788 */
789 sector--;
790
791 saved_sector = sector;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200792 return sector;
wdenk7680c142005-05-16 15:23:22 +0000793}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200794
795/*-----------------------------------------------------------------------
796 */
797static int flash_write_cfiword (flash_info_t * info, ulong dest,
798 cfiword_t cword)
799{
Becky Bruce09ce9922009-02-02 16:34:51 -0600800 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200801 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100802 flash_sect_t sect = 0;
803 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200804
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200805 /* Check if Flash is (sufficiently) erased */
806 switch (info->portwidth) {
807 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100808 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200809 break;
810 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100811 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200812 break;
813 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100814 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200815 break;
816 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100817 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200818 break;
819 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100820 flag = 0;
821 break;
822 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600823 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100824 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200825
826 /* Disable interrupts which might cause a timeout here */
827 flag = disable_interrupts ();
828
829 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400830 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200831 case CFI_CMDSET_INTEL_EXTENDED:
832 case CFI_CMDSET_INTEL_STANDARD:
833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
835 break;
836 case CFI_CMDSET_AMD_EXTENDED:
837 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500838 sect = find_sector(info, dest);
839 flash_unlock_seq (info, sect);
840 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100841 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200842 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800843#ifdef CONFIG_FLASH_CFI_LEGACY
844 case CFI_CMDSET_AMD_LEGACY:
845 sect = find_sector(info, dest);
846 flash_unlock_seq (info, 0);
847 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
848 sect_found = 1;
849 break;
850#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200851 }
852
853 switch (info->portwidth) {
854 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100855 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200856 break;
857 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100858 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200859 break;
860 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100861 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200862 break;
863 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100864 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200865 break;
866 }
867
868 /* re-enable interrupts if necessary */
869 if (flag)
870 enable_interrupts ();
871
Jens Gehrleina7292872008-12-16 17:25:54 +0100872 if (!sect_found)
873 sect = find_sector (info, dest);
874
875 return flash_full_status_check (info, sect, info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200876}
877
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200878#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200879
880static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
881 int len)
882{
883 flash_sect_t sector;
884 int cnt;
885 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100886 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100887 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100888 void *dst2 = dst;
889 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200890 uint offset = 0;
891 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400892 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100893
Stefan Roese0dc80e22007-12-27 07:50:54 +0100894 switch (info->portwidth) {
895 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200896 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100897 break;
898 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200899 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100900 break;
901 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200902 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100903 break;
904 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200905 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100906 break;
907 default:
908 retcode = ERR_INVAL;
909 goto out_unmap;
910 }
911
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200912 cnt = len >> shift;
913
Stefan Roese0dc80e22007-12-27 07:50:54 +0100914 while ((cnt-- > 0) && (flag == 0)) {
915 switch (info->portwidth) {
916 case FLASH_CFI_8BIT:
917 flag = ((flash_read8(dst2) & flash_read8(src)) ==
918 flash_read8(src));
919 src += 1, dst2 += 1;
920 break;
921 case FLASH_CFI_16BIT:
922 flag = ((flash_read16(dst2) & flash_read16(src)) ==
923 flash_read16(src));
924 src += 2, dst2 += 2;
925 break;
926 case FLASH_CFI_32BIT:
927 flag = ((flash_read32(dst2) & flash_read32(src)) ==
928 flash_read32(src));
929 src += 4, dst2 += 4;
930 break;
931 case FLASH_CFI_64BIT:
932 flag = ((flash_read64(dst2) & flash_read64(src)) ==
933 flash_read64(src));
934 src += 8, dst2 += 8;
935 break;
936 }
937 }
938 if (!flag) {
939 retcode = ERR_NOT_ERASED;
940 goto out_unmap;
941 }
942
943 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100944 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200945
946 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400947 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200948 case CFI_CMDSET_INTEL_STANDARD:
949 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400950 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
951 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200952 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400953 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
954 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200955 retcode = flash_status_check (info, sector,
956 info->buffer_write_tout,
957 "write to buffer");
958 if (retcode == ERR_OK) {
959 /* reduce the number of loops by the width of
960 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200961 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400962 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200963 while (cnt-- > 0) {
964 switch (info->portwidth) {
965 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100966 flash_write8(flash_read8(src), dst);
967 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200968 break;
969 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100970 flash_write16(flash_read16(src), dst);
971 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200972 break;
973 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100974 flash_write32(flash_read32(src), dst);
975 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200976 break;
977 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100978 flash_write64(flash_read64(src), dst);
979 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200980 break;
981 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100982 retcode = ERR_INVAL;
983 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200984 }
985 }
986 flash_write_cmd (info, sector, 0,
987 FLASH_CMD_WRITE_BUFFER_CONFIRM);
988 retcode = flash_full_status_check (
989 info, sector, info->buffer_write_tout,
990 "buffer write");
991 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100992
993 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200994
995 case CFI_CMDSET_AMD_STANDARD:
996 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200997 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200998
999#ifdef CONFIG_FLASH_SPANSION_S29WS_N
1000 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1001#endif
1002 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1003 cnt = len >> shift;
1004 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001005
1006 switch (info->portwidth) {
1007 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001008 while (cnt-- > 0) {
1009 flash_write8(flash_read8(src), dst);
1010 src += 1, dst += 1;
1011 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001012 break;
1013 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001014 while (cnt-- > 0) {
1015 flash_write16(flash_read16(src), dst);
1016 src += 2, dst += 2;
1017 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001018 break;
1019 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001020 while (cnt-- > 0) {
1021 flash_write32(flash_read32(src), dst);
1022 src += 4, dst += 4;
1023 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001024 break;
1025 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001026 while (cnt-- > 0) {
1027 flash_write64(flash_read64(src), dst);
1028 src += 8, dst += 8;
1029 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001030 break;
1031 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001032 retcode = ERR_INVAL;
1033 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001034 }
1035
1036 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1037 retcode = flash_full_status_check (info, sector,
1038 info->buffer_write_tout,
1039 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001040 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001041
1042 default:
1043 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001044 retcode = ERR_INVAL;
1045 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001046 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001047
1048out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001049 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001050}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001051#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001052
wdenk7680c142005-05-16 15:23:22 +00001053
1054/*-----------------------------------------------------------------------
1055 */
wdenkbf9e3b32004-02-12 00:47:09 +00001056int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001057{
1058 int rcode = 0;
1059 int prot;
1060 flash_sect_t sect;
1061
wdenkbf9e3b32004-02-12 00:47:09 +00001062 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001063 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001064 return 1;
1065 }
1066 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001067 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001068 return 1;
1069 }
1070
1071 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001072 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001073 if (info->protect[sect]) {
1074 prot++;
1075 }
1076 }
1077 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001078 printf ("- Warning: %d protected sectors will not be erased!\n",
1079 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001080 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001081 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001082 }
1083
1084
wdenkbf9e3b32004-02-12 00:47:09 +00001085 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001086 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001087 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001088 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001089 case CFI_CMDSET_INTEL_STANDARD:
1090 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001091 flash_write_cmd (info, sect, 0,
1092 FLASH_CMD_CLEAR_STATUS);
1093 flash_write_cmd (info, sect, 0,
1094 FLASH_CMD_BLOCK_ERASE);
1095 flash_write_cmd (info, sect, 0,
1096 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001097 break;
1098 case CFI_CMDSET_AMD_STANDARD:
1099 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001100 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001101 flash_write_cmd (info, sect,
1102 info->addr_unlock1,
1103 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001104 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001105 flash_write_cmd (info, sect, 0,
1106 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001107 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001108#ifdef CONFIG_FLASH_CFI_LEGACY
1109 case CFI_CMDSET_AMD_LEGACY:
1110 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001111 flash_write_cmd (info, 0, info->addr_unlock1,
1112 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001113 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001114 flash_write_cmd (info, sect, 0,
1115 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001116 break;
1117#endif
wdenk5653fc32004-02-08 22:55:38 +00001118 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001119 debug ("Unkown flash vendor %d\n",
1120 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001121 break;
1122 }
1123
wdenkbf9e3b32004-02-12 00:47:09 +00001124 if (flash_full_status_check
1125 (info, sect, info->erase_blk_tout, "erase")) {
wdenk5653fc32004-02-08 22:55:38 +00001126 rcode = 1;
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001127 } else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001128 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001129 }
1130 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001131
1132 if (flash_verbose)
1133 puts (" done\n");
1134
wdenk5653fc32004-02-08 22:55:38 +00001135 return rcode;
1136}
1137
1138/*-----------------------------------------------------------------------
1139 */
wdenkbf9e3b32004-02-12 00:47:09 +00001140void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001141{
1142 int i;
1143
1144 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001145 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001146 return;
1147 }
1148
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001149 printf ("%s FLASH (%d x %d)",
1150 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001151 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001152 if (info->size < 1024*1024)
1153 printf (" Size: %ld kB in %d Sectors\n",
1154 info->size >> 10, info->sector_count);
1155 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001156 printf (" Size: %ld MB in %d Sectors\n",
1157 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001158 printf (" ");
1159 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001160 case CFI_CMDSET_INTEL_PROG_REGIONS:
1161 printf ("Intel Prog Regions");
1162 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001163 case CFI_CMDSET_INTEL_STANDARD:
1164 printf ("Intel Standard");
1165 break;
1166 case CFI_CMDSET_INTEL_EXTENDED:
1167 printf ("Intel Extended");
1168 break;
1169 case CFI_CMDSET_AMD_STANDARD:
1170 printf ("AMD Standard");
1171 break;
1172 case CFI_CMDSET_AMD_EXTENDED:
1173 printf ("AMD Extended");
1174 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001175#ifdef CONFIG_FLASH_CFI_LEGACY
1176 case CFI_CMDSET_AMD_LEGACY:
1177 printf ("AMD Legacy");
1178 break;
1179#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001180 default:
1181 printf ("Unknown (%d)", info->vendor);
1182 break;
1183 }
1184 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1185 info->manufacturer_id, info->device_id);
1186 if (info->device_id == 0x7E) {
1187 printf("%04X", info->device_id2);
1188 }
1189 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001190 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001191 info->write_tout);
1192 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001193 printf (" Buffer write timeout: %ld ms, "
1194 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001195 info->buffer_write_tout,
1196 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001197 }
wdenk5653fc32004-02-08 22:55:38 +00001198
Stefan Roese260421a2006-11-13 13:55:24 +01001199 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001200 for (i = 0; i < info->sector_count; ++i) {
Stefan Roese260421a2006-11-13 13:55:24 +01001201 if ((i % 5) == 0)
1202 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001203#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001204 int k;
1205 int size;
1206 int erased;
1207 volatile unsigned long *flash;
1208
1209 /*
1210 * Check if whole sector is erased
1211 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001212 size = flash_sector_size(info, i);
wdenk5653fc32004-02-08 22:55:38 +00001213 erased = 1;
wdenkbf9e3b32004-02-12 00:47:09 +00001214 flash = (volatile unsigned long *) info->start[i];
1215 size = size >> 2; /* divide by 4 for longword access */
1216 for (k = 0; k < size; k++) {
1217 if (*flash++ != 0xffffffff) {
1218 erased = 0;
1219 break;
1220 }
1221 }
wdenk5653fc32004-02-08 22:55:38 +00001222
wdenk5653fc32004-02-08 22:55:38 +00001223 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001224 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001225 info->start[i],
Stefan Roese260421a2006-11-13 13:55:24 +01001226 erased ? 'E' : ' ',
1227 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001228#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001229 printf (" %08lX %s ",
1230 info->start[i],
1231 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001232#endif
1233 }
wdenk4b9206e2004-03-23 22:14:11 +00001234 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001235 return;
1236}
1237
1238/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001239 * This is used in a few places in write_buf() to show programming
1240 * progress. Making it a function is nasty because it needs to do side
1241 * effect updates to digit and dots. Repeated code is nasty too, so
1242 * we define it once here.
1243 */
Stefan Roesef0105722008-03-19 07:09:26 +01001244#ifdef CONFIG_FLASH_SHOW_PROGRESS
1245#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001246 if (flash_verbose) { \
1247 dots -= dots_sub; \
1248 if ((scale > 0) && (dots <= 0)) { \
1249 if ((digit % 5) == 0) \
1250 printf ("%d", digit / 5); \
1251 else \
1252 putc ('.'); \
1253 digit--; \
1254 dots += scale; \
1255 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001256 }
Stefan Roesef0105722008-03-19 07:09:26 +01001257#else
1258#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1259#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001260
1261/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001262 * Copy memory to flash, returns:
1263 * 0 - OK
1264 * 1 - write timeout
1265 * 2 - Flash not erased
1266 */
wdenkbf9e3b32004-02-12 00:47:09 +00001267int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001268{
1269 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001270 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001271 int aln;
1272 cfiword_t cword;
1273 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001274#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001275 int buffered_size;
1276#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001277#ifdef CONFIG_FLASH_SHOW_PROGRESS
1278 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1279 int scale = 0;
1280 int dots = 0;
1281
1282 /*
1283 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1284 */
1285 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1286 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1287 CONFIG_FLASH_SHOW_PROGRESS);
1288 }
1289#endif
1290
wdenkbf9e3b32004-02-12 00:47:09 +00001291 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001292 wp = (addr & ~(info->portwidth - 1));
1293
1294 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001295 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001296 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001297 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001298 for (i = 0; i < aln; ++i)
1299 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001300
wdenkbf9e3b32004-02-12 00:47:09 +00001301 for (; (i < info->portwidth) && (cnt > 0); i++) {
1302 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001303 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001304 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001305 for (; (cnt == 0) && (i < info->portwidth); ++i)
1306 flash_add_byte (info, &cword, flash_read8(p + i));
1307
1308 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001309 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001310 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001311
1312 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001313 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001314 }
1315
wdenkbf9e3b32004-02-12 00:47:09 +00001316 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001317#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001318 buffered_size = (info->portwidth / info->chipwidth);
1319 buffered_size *= info->buffer_size;
1320 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001321 /* prohibit buffer write when buffer_size is 1 */
1322 if (info->buffer_size == 1) {
1323 cword.l = 0;
1324 for (i = 0; i < info->portwidth; i++)
1325 flash_add_byte (info, &cword, *src++);
1326 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1327 return rc;
1328 wp += info->portwidth;
1329 cnt -= info->portwidth;
1330 continue;
1331 }
1332
1333 /* write buffer until next buffered_size aligned boundary */
1334 i = buffered_size - (wp % buffered_size);
1335 if (i > cnt)
1336 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001337 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001338 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001339 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001340 wp += i;
1341 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001342 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001343 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001344 }
1345#else
wdenkbf9e3b32004-02-12 00:47:09 +00001346 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001347 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001348 for (i = 0; i < info->portwidth; i++) {
1349 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001350 }
wdenkbf9e3b32004-02-12 00:47:09 +00001351 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001352 return rc;
1353 wp += info->portwidth;
1354 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001355 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001356 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001357#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001358
wdenk5653fc32004-02-08 22:55:38 +00001359 if (cnt == 0) {
1360 return (0);
1361 }
1362
1363 /*
1364 * handle unaligned tail bytes
1365 */
1366 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001367 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001368 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001369 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001370 --cnt;
1371 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001372 for (; i < info->portwidth; ++i)
1373 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001374
wdenkbf9e3b32004-02-12 00:47:09 +00001375 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001376}
1377
1378/*-----------------------------------------------------------------------
1379 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001380#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001381
wdenkbf9e3b32004-02-12 00:47:09 +00001382int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001383{
1384 int retcode = 0;
1385
Rafael Camposbc9019e2008-07-31 10:22:20 +02001386 switch (info->vendor) {
1387 case CFI_CMDSET_INTEL_PROG_REGIONS:
1388 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001389 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001390 flash_write_cmd (info, sector, 0,
1391 FLASH_CMD_CLEAR_STATUS);
1392 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1393 if (prot)
1394 flash_write_cmd (info, sector, 0,
1395 FLASH_CMD_PROTECT_SET);
1396 else
1397 flash_write_cmd (info, sector, 0,
1398 FLASH_CMD_PROTECT_CLEAR);
1399 break;
1400 case CFI_CMDSET_AMD_EXTENDED:
1401 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001402 /* U-Boot only checks the first byte */
1403 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1404 if (prot) {
1405 flash_unlock_seq (info, 0);
1406 flash_write_cmd (info, 0,
1407 info->addr_unlock1,
1408 ATM_CMD_SOFTLOCK_START);
1409 flash_unlock_seq (info, 0);
1410 flash_write_cmd (info, sector, 0,
1411 ATM_CMD_LOCK_SECT);
1412 } else {
1413 flash_write_cmd (info, 0,
1414 info->addr_unlock1,
1415 AMD_CMD_UNLOCK_START);
1416 if (info->device_id == ATM_ID_BV6416)
1417 flash_write_cmd (info, sector,
1418 0, ATM_CMD_UNLOCK_SECT);
1419 }
1420 }
1421 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001422#ifdef CONFIG_FLASH_CFI_LEGACY
1423 case CFI_CMDSET_AMD_LEGACY:
1424 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1425 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1426 if (prot)
1427 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1428 else
1429 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1430#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001431 };
wdenk5653fc32004-02-08 22:55:38 +00001432
wdenkbf9e3b32004-02-12 00:47:09 +00001433 if ((retcode =
1434 flash_full_status_check (info, sector, info->erase_blk_tout,
1435 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001436
1437 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001438
1439 /*
1440 * On some of Intel's flash chips (marked via legacy_unlock)
1441 * unprotect unprotects all locking.
1442 */
1443 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001444 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001445
1446 for (i = 0; i < info->sector_count; i++) {
1447 if (info->protect[i])
1448 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001449 }
1450 }
1451 }
wdenk5653fc32004-02-08 22:55:38 +00001452 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001453}
1454
wdenk5653fc32004-02-08 22:55:38 +00001455/*-----------------------------------------------------------------------
1456 * flash_read_user_serial - read the OneTimeProgramming cells
1457 */
wdenkbf9e3b32004-02-12 00:47:09 +00001458void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1459 int len)
wdenk5653fc32004-02-08 22:55:38 +00001460{
wdenkbf9e3b32004-02-12 00:47:09 +00001461 uchar *src;
1462 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001463
1464 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001465 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001466 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1467 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001468 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001469 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001470}
wdenkbf9e3b32004-02-12 00:47:09 +00001471
wdenk5653fc32004-02-08 22:55:38 +00001472/*
1473 * flash_read_factory_serial - read the device Id from the protection area
1474 */
wdenkbf9e3b32004-02-12 00:47:09 +00001475void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1476 int len)
wdenk5653fc32004-02-08 22:55:38 +00001477{
wdenkbf9e3b32004-02-12 00:47:09 +00001478 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001479
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001480 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001481 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1482 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001483 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001484 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001485}
1486
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001487#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001488
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001489/*-----------------------------------------------------------------------
1490 * Reverse the order of the erase regions in the CFI QRY structure.
1491 * This is needed for chips that are either a) correctly detected as
1492 * top-boot, or b) buggy.
1493 */
1494static void cfi_reverse_geometry(struct cfi_qry *qry)
1495{
1496 unsigned int i, j;
1497 u32 tmp;
1498
1499 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1500 tmp = qry->erase_region_info[i];
1501 qry->erase_region_info[i] = qry->erase_region_info[j];
1502 qry->erase_region_info[j] = tmp;
1503 }
1504}
wdenk5653fc32004-02-08 22:55:38 +00001505
1506/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001507 * read jedec ids from device and set corresponding fields in info struct
1508 *
1509 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1510 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001511 */
1512static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1513{
1514 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1515 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1516 udelay(1000); /* some flash are slow to respond */
1517 info->manufacturer_id = flash_read_uchar (info,
1518 FLASH_OFFSET_MANUFACTURER_ID);
1519 info->device_id = flash_read_uchar (info,
1520 FLASH_OFFSET_DEVICE_ID);
1521 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1522}
1523
1524static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1525{
1526 info->cmd_reset = FLASH_CMD_RESET;
1527
1528 cmdset_intel_read_jedec_ids(info);
1529 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1530
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001531#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001532 /* read legacy lock/unlock bit from intel flash */
1533 if (info->ext_addr) {
1534 info->legacy_unlock = flash_read_uchar (info,
1535 info->ext_addr + 5) & 0x08;
1536 }
1537#endif
1538
1539 return 0;
1540}
1541
1542static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1543{
1544 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1545 flash_unlock_seq(info, 0);
1546 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1547 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001548
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001549 info->manufacturer_id = flash_read_uchar (info,
1550 FLASH_OFFSET_MANUFACTURER_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001551
1552 switch (info->chipwidth){
1553 case FLASH_CFI_8BIT:
1554 info->device_id = flash_read_uchar (info,
1555 FLASH_OFFSET_DEVICE_ID);
1556 if (info->device_id == 0x7E) {
1557 /* AMD 3-byte (expanded) device ids */
1558 info->device_id2 = flash_read_uchar (info,
1559 FLASH_OFFSET_DEVICE_ID2);
1560 info->device_id2 <<= 8;
1561 info->device_id2 |= flash_read_uchar (info,
1562 FLASH_OFFSET_DEVICE_ID3);
1563 }
1564 break;
1565 case FLASH_CFI_16BIT:
1566 info->device_id = flash_read_word (info,
1567 FLASH_OFFSET_DEVICE_ID);
1568 break;
1569 default:
1570 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001571 }
1572 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1573}
1574
1575static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1576{
1577 info->cmd_reset = AMD_CMD_RESET;
1578
1579 cmdset_amd_read_jedec_ids(info);
1580 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1581
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001582 return 0;
1583}
1584
1585#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001586static void flash_read_jedec_ids (flash_info_t * info)
1587{
1588 info->manufacturer_id = 0;
1589 info->device_id = 0;
1590 info->device_id2 = 0;
1591
1592 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001593 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001594 case CFI_CMDSET_INTEL_STANDARD:
1595 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001596 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001597 break;
1598 case CFI_CMDSET_AMD_STANDARD:
1599 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001600 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001601 break;
1602 default:
1603 break;
1604 }
1605}
1606
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001607/*-----------------------------------------------------------------------
1608 * Call board code to request info about non-CFI flash.
1609 * board_flash_get_legacy needs to fill in at least:
1610 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1611 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001612static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001613{
1614 flash_info_t *info = &flash_info[banknum];
1615
1616 if (board_flash_get_legacy(base, banknum, info)) {
1617 /* board code may have filled info completely. If not, we
1618 use JEDEC ID probing. */
1619 if (!info->vendor) {
1620 int modes[] = {
1621 CFI_CMDSET_AMD_STANDARD,
1622 CFI_CMDSET_INTEL_STANDARD
1623 };
1624 int i;
1625
1626 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1627 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001628 info->start[0] =
1629 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001630 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001631 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001632 if (info->portwidth == FLASH_CFI_8BIT
1633 && info->interface == FLASH_CFI_X8X16) {
1634 info->addr_unlock1 = 0x2AAA;
1635 info->addr_unlock2 = 0x5555;
1636 } else {
1637 info->addr_unlock1 = 0x5555;
1638 info->addr_unlock2 = 0x2AAA;
1639 }
1640 flash_read_jedec_ids(info);
1641 debug("JEDEC PROBE: ID %x %x %x\n",
1642 info->manufacturer_id,
1643 info->device_id,
1644 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001645 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001646 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001647 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001648 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001649 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001650 }
1651 }
1652
1653 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001654 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001655 case CFI_CMDSET_INTEL_STANDARD:
1656 case CFI_CMDSET_INTEL_EXTENDED:
1657 info->cmd_reset = FLASH_CMD_RESET;
1658 break;
1659 case CFI_CMDSET_AMD_STANDARD:
1660 case CFI_CMDSET_AMD_EXTENDED:
1661 case CFI_CMDSET_AMD_LEGACY:
1662 info->cmd_reset = AMD_CMD_RESET;
1663 break;
1664 }
1665 info->flash_id = FLASH_MAN_CFI;
1666 return 1;
1667 }
1668 return 0; /* use CFI */
1669}
1670#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001671static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001672{
1673 return 0; /* use CFI */
1674}
1675#endif
1676
Stefan Roese260421a2006-11-13 13:55:24 +01001677/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001678 * detect if flash is compatible with the Common Flash Interface (CFI)
1679 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001680 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001681static void flash_read_cfi (flash_info_t *info, void *buf,
1682 unsigned int start, size_t len)
1683{
1684 u8 *p = buf;
1685 unsigned int i;
1686
1687 for (i = 0; i < len; i++)
1688 p[i] = flash_read_uchar(info, start + i);
1689}
1690
1691static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001692{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001693 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001694
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001695 /* We do not yet know what kind of commandset to use, so we issue
1696 the reset command in both Intel and AMD variants, in the hope
1697 that AMD flash roms ignore the Intel command. */
1698 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1699 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1700
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001701 for (cfi_offset=0;
1702 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1703 cfi_offset++) {
1704 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1705 FLASH_CMD_CFI);
1706 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1707 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1708 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001709 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1710 sizeof(struct cfi_qry));
1711 info->interface = le16_to_cpu(qry->interface_desc);
1712
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001713 info->cfi_offset = flash_offset_cfi[cfi_offset];
1714 debug ("device interface is %d\n",
1715 info->interface);
1716 debug ("found port %d chip %d ",
1717 info->portwidth, info->chipwidth);
1718 debug ("port %d bits chip %d bits\n",
1719 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1720 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1721
1722 /* calculate command offsets as in the Linux driver */
1723 info->addr_unlock1 = 0x555;
1724 info->addr_unlock2 = 0x2aa;
1725
1726 /*
1727 * modify the unlock address if we are
1728 * in compatibility mode
1729 */
1730 if ( /* x8/x16 in x8 mode */
1731 ((info->chipwidth == FLASH_CFI_BY8) &&
1732 (info->interface == FLASH_CFI_X8X16)) ||
1733 /* x16/x32 in x16 mode */
1734 ((info->chipwidth == FLASH_CFI_BY16) &&
1735 (info->interface == FLASH_CFI_X16X32)))
1736 {
1737 info->addr_unlock1 = 0xaaa;
1738 info->addr_unlock2 = 0x555;
1739 }
1740
1741 info->name = "CFI conformant";
1742 return 1;
1743 }
1744 }
1745
1746 return 0;
1747}
1748
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001749static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001750{
wdenkbf9e3b32004-02-12 00:47:09 +00001751 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001752
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001753 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001754 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1755 for (info->chipwidth = FLASH_CFI_BY8;
1756 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001757 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001758 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001759 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001760 }
wdenkbf9e3b32004-02-12 00:47:09 +00001761 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001762 return 0;
1763}
wdenkbf9e3b32004-02-12 00:47:09 +00001764
wdenk5653fc32004-02-08 22:55:38 +00001765/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001766 * Manufacturer-specific quirks. Add workarounds for geometry
1767 * reversal, etc. here.
1768 */
1769static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1770{
1771 /* check if flash geometry needs reversal */
1772 if (qry->num_erase_regions > 1) {
1773 /* reverse geometry if top boot part */
1774 if (info->cfi_version < 0x3131) {
1775 /* CFI < 1.1, try to guess from device id */
1776 if ((info->device_id & 0x80) != 0)
1777 cfi_reverse_geometry(qry);
1778 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1779 /* CFI >= 1.1, deduct from top/bottom flag */
1780 /* note: ext_addr is valid since cfi_version > 0 */
1781 cfi_reverse_geometry(qry);
1782 }
1783 }
1784}
1785
1786static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1787{
1788 int reverse_geometry = 0;
1789
1790 /* Check the "top boot" bit in the PRI */
1791 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1792 reverse_geometry = 1;
1793
1794 /* AT49BV6416(T) list the erase regions in the wrong order.
1795 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001796 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001797 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001798 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1799 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001800
1801 if (reverse_geometry)
1802 cfi_reverse_geometry(qry);
1803}
1804
Richard Retanubune8eac432009-01-14 08:44:26 -05001805static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1806{
1807 /* check if flash geometry needs reversal */
1808 if (qry->num_erase_regions > 1) {
1809 /* reverse geometry if top boot part */
1810 if (info->cfi_version < 0x3131) {
Richard Retanubun7a886012009-03-06 10:09:37 -05001811 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1812 if (info->device_id == 0x22CA ||
1813 info->device_id == 0x2256) {
Richard Retanubune8eac432009-01-14 08:44:26 -05001814 cfi_reverse_geometry(qry);
1815 }
1816 }
1817 }
1818}
1819
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001820/*
wdenk5653fc32004-02-08 22:55:38 +00001821 * The following code cannot be run from FLASH!
1822 *
1823 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001824ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001825{
wdenkbf9e3b32004-02-12 00:47:09 +00001826 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001827 int i, j;
1828 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001829 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001830 unsigned long tmp;
1831 int size_ratio;
1832 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001833 int erase_region_size;
1834 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001835 struct cfi_qry qry;
Stefan Roese260421a2006-11-13 13:55:24 +01001836
Kumar Galaf9796902008-05-15 15:13:08 -05001837 memset(&qry, 0, sizeof(qry));
1838
Stefan Roese260421a2006-11-13 13:55:24 +01001839 info->ext_addr = 0;
1840 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001841#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001842 info->legacy_unlock = 0;
1843#endif
wdenk5653fc32004-02-08 22:55:38 +00001844
Becky Bruce09ce9922009-02-02 16:34:51 -06001845 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001846
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001847 if (flash_detect_cfi (info, &qry)) {
1848 info->vendor = le16_to_cpu(qry.p_id);
1849 info->ext_addr = le16_to_cpu(qry.p_adr);
1850 num_erase_regions = qry.num_erase_regions;
1851
Stefan Roese260421a2006-11-13 13:55:24 +01001852 if (info->ext_addr) {
1853 info->cfi_version = (ushort) flash_read_uchar (info,
1854 info->ext_addr + 3) << 8;
1855 info->cfi_version |= (ushort) flash_read_uchar (info,
1856 info->ext_addr + 4);
1857 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001858
wdenkbf9e3b32004-02-12 00:47:09 +00001859#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001860 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001861#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001862
wdenkbf9e3b32004-02-12 00:47:09 +00001863 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001864 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001865 case CFI_CMDSET_INTEL_STANDARD:
1866 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001867 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001868 break;
1869 case CFI_CMDSET_AMD_STANDARD:
1870 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001871 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001872 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001873 default:
1874 printf("CFI: Unknown command set 0x%x\n",
1875 info->vendor);
1876 /*
1877 * Unfortunately, this means we don't know how
1878 * to get the chip back to Read mode. Might
1879 * as well try an Intel-style reset...
1880 */
1881 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1882 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001883 }
wdenkcd37d9e2004-02-10 00:03:41 +00001884
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001885 /* Do manufacturer-specific fixups */
1886 switch (info->manufacturer_id) {
1887 case 0x0001:
1888 flash_fixup_amd(info, &qry);
1889 break;
1890 case 0x001f:
1891 flash_fixup_atmel(info, &qry);
1892 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001893 case 0x0020:
1894 flash_fixup_stm(info, &qry);
1895 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001896 }
1897
wdenkbf9e3b32004-02-12 00:47:09 +00001898 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001899 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1900 debug ("device id is 0x%x\n", info->device_id);
1901 debug ("device id2 is 0x%x\n", info->device_id2);
1902 debug ("cfi version is 0x%04x\n", info->cfi_version);
1903
wdenk5653fc32004-02-08 22:55:38 +00001904 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001905 /* if the chip is x8/x16 reduce the ratio by half */
1906 if ((info->interface == FLASH_CFI_X8X16)
1907 && (info->chipwidth == FLASH_CFI_BY8)) {
1908 size_ratio >>= 1;
1909 }
wdenkbf9e3b32004-02-12 00:47:09 +00001910 debug ("size_ratio %d port %d bits chip %d bits\n",
1911 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1912 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1913 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001914 sect_cnt = 0;
1915 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001916 for (i = 0; i < num_erase_regions; i++) {
1917 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001918 printf ("%d erase regions found, only %d used\n",
1919 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001920 break;
1921 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001922
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001923 tmp = le32_to_cpu(qry.erase_region_info[i]);
1924 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001925
1926 erase_region_count = (tmp & 0xffff) + 1;
1927 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001928 erase_region_size =
1929 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001930 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001931 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001932 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001933 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001934 printf("ERROR: too many flash sectors\n");
1935 break;
1936 }
Becky Bruce09ce9922009-02-02 16:34:51 -06001937 info->start[sect_cnt] =
1938 (ulong)map_physmem(sector,
1939 info->portwidth,
1940 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001941 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001942
1943 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001944 * Only read protection status from
1945 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001946 */
1947 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001948 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001949 case CFI_CMDSET_INTEL_EXTENDED:
1950 case CFI_CMDSET_INTEL_STANDARD:
1951 info->protect[sect_cnt] =
1952 flash_isset (info, sect_cnt,
1953 FLASH_OFFSET_PROTECT,
1954 FLASH_STATUS_PROTECT);
1955 break;
1956 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001957 /* default: not protected */
1958 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00001959 }
1960
wdenk5653fc32004-02-08 22:55:38 +00001961 sect_cnt++;
1962 }
1963 }
1964
1965 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001966 info->size = 1 << qry.dev_size;
wdenk5653fc32004-02-08 22:55:38 +00001967 /* multiply the size by the number of chips */
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001968 info->size *= size_ratio;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001969 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1970 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001971 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001972 (1 << qry.block_erase_timeout_max);
1973 tmp = (1 << qry.buf_write_timeout_typ) *
1974 (1 << qry.buf_write_timeout_max);
1975
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001976 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001977 info->buffer_write_tout = (tmp + 999) / 1000;
1978 tmp = (1 << qry.word_write_timeout_typ) *
1979 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001980 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001981 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00001982 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001983 if ((info->interface == FLASH_CFI_X8X16) &&
1984 (info->chipwidth == FLASH_CFI_BY8)) {
1985 /* XXX - Need to test on x8/x16 in parallel. */
1986 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00001987 }
Mike Frysinger22159872008-10-02 01:55:38 -04001988
1989 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00001990 }
1991
wdenkbf9e3b32004-02-12 00:47:09 +00001992 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00001993}
1994
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001995void flash_set_verbose(uint v)
1996{
1997 flash_verbose = v;
1998}
1999
wdenk5653fc32004-02-08 22:55:38 +00002000/*-----------------------------------------------------------------------
2001 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002002unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00002003{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002004 unsigned long size = 0;
2005 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002006#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002007 struct apl_s {
2008 ulong start;
2009 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002010 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002011#endif
wdenk5653fc32004-02-08 22:55:38 +00002012
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002013#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002014 /* read environment from EEPROM */
2015 char s[64];
2016 getenv_r ("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002017#endif
wdenk5653fc32004-02-08 22:55:38 +00002018
Becky Bruce09ce9922009-02-02 16:34:51 -06002019#define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002020
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002021 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002022 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002023 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002024
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002025 if (!flash_detect_legacy (BANK_BASE(i), i))
2026 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002027 size += flash_info[i].size;
2028 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002029#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002030 printf ("## Unknown FLASH on Bank %d "
2031 "- Size = 0x%08lx = %ld MB\n",
2032 i+1, flash_info[i].size,
2033 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002034#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002035 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002036#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002037 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2038 /*
2039 * Only the U-Boot image and it's environment
2040 * is protected, all other sectors are
2041 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002042 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002043 * and the environment variable "unlock" is
2044 * set to "yes".
2045 */
2046 if (flash_info[i].legacy_unlock) {
2047 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002048
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002049 /*
2050 * Disable legacy_unlock temporarily,
2051 * since flash_real_protect would
2052 * relock all other sectors again
2053 * otherwise.
2054 */
2055 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002056
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002057 /*
2058 * Legacy unlocking (e.g. Intel J3) ->
2059 * unlock only one sector. This will
2060 * unlock all sectors.
2061 */
2062 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002063
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002064 flash_info[i].legacy_unlock = 1;
2065
2066 /*
2067 * Manually mark other sectors as
2068 * unlocked (unprotected)
2069 */
2070 for (k = 1; k < flash_info[i].sector_count; k++)
2071 flash_info[i].protect[k] = 0;
2072 } else {
2073 /*
2074 * No legancy unlocking -> unlock all sectors
2075 */
2076 flash_protect (FLAG_PROTECT_CLEAR,
2077 flash_info[i].start[0],
2078 flash_info[i].start[0]
2079 + flash_info[i].size - 1,
2080 &flash_info[i]);
2081 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002082 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002083#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002084 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002085
2086 /* Monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002087#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002088 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002089 CONFIG_SYS_MONITOR_BASE,
2090 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2091 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002092#endif
2093
2094 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002095#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002096 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002097 CONFIG_ENV_ADDR,
2098 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2099 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002100#endif
2101
2102 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002103#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002104 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002105 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +02002106 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002107 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002108#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002109
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002110#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002111 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2112 debug("autoprotecting from %08x to %08x\n",
2113 apl[i].start, apl[i].start + apl[i].size - 1);
2114 flash_protect (FLAG_PROTECT_SET,
2115 apl[i].start,
2116 apl[i].start + apl[i].size - 1,
2117 flash_get_info(apl[i].start));
2118 }
2119#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002120
2121#ifdef CONFIG_FLASH_CFI_MTD
2122 cfi_mtd_init();
2123#endif
2124
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002125 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002126}