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Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunaya6743132018-07-09 15:17:19 +02008#include "stm32mp157c.dtsi"
Patrick Delaunayfe915332019-07-30 19:16:12 +02009#include "stm32mp157xaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010010#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010011#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012
13/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020014 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010015 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
16
17 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010018 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010019 };
20
Patrick Delaunaya6743132018-07-09 15:17:19 +020021 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020022 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010023 reg = <0xC0000000 0x40000000>;
24 };
Patrice Chotard21299d32018-04-26 17:13:11 +020025
Patrick Delaunayfe915332019-07-30 19:16:12 +020026 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 ranges;
30
Patrick Delaunay62d620c2019-11-06 16:16:33 +010031 mcuram2: mcuram2@10000000 {
32 compatible = "shared-dma-pool";
33 reg = <0x10000000 0x40000>;
34 no-map;
35 };
36
37 vdev0vring0: vdev0vring0@10040000 {
38 compatible = "shared-dma-pool";
39 reg = <0x10040000 0x1000>;
40 no-map;
41 };
42
43 vdev0vring1: vdev0vring1@10041000 {
44 compatible = "shared-dma-pool";
45 reg = <0x10041000 0x1000>;
46 no-map;
47 };
48
49 vdev0buffer: vdev0buffer@10042000 {
50 compatible = "shared-dma-pool";
51 reg = <0x10042000 0x4000>;
52 no-map;
53 };
54
55 mcuram: mcuram@30000000 {
56 compatible = "shared-dma-pool";
57 reg = <0x30000000 0x40000>;
58 no-map;
59 };
60
61 retram: retram@38000000 {
62 compatible = "shared-dma-pool";
63 reg = <0x38000000 0x10000>;
64 no-map;
65 };
66
Patrick Delaunayfe915332019-07-30 19:16:12 +020067 gpu_reserved: gpu@e8000000 {
68 reg = <0xe8000000 0x8000000>;
69 no-map;
70 };
71 };
72
Patrice Chotard23661602019-02-12 16:50:38 +010073 aliases {
74 serial0 = &uart4;
75 };
76
Patrice Chotard21299d32018-04-26 17:13:11 +020077 sd_switch: regulator-sd_switch {
78 compatible = "regulator-gpio";
79 regulator-name = "sd_switch";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <2900000>;
82 regulator-type = "voltage";
83 regulator-always-on;
84
85 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
86 gpios-states = <0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +010087 states = <1800000 0x1>,
88 <2900000 0x0>;
89 };
90};
91
92&dac {
93 pinctrl-names = "default";
94 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
95 vref-supply = <&vdda>;
96 status = "disabled";
97 dac1: dac@1 {
98 status = "okay";
99 };
100 dac2: dac@2 {
101 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200102 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100103};
104
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200105&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100106 status = "okay";
107};
108
Patrick Delaunayfe915332019-07-30 19:16:12 +0200109&gpu {
110 contiguous-area = <&gpu_reserved>;
111 status = "okay";
112};
113
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100114&i2c4 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&i2c4_pins_a>;
117 i2c-scl-rising-time-ns = <185>;
118 i2c-scl-falling-time-ns = <20>;
119 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200120 /* spare dmas for other usage */
121 /delete-property/dmas;
122 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100123
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200124 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100125 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100126 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200127 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100128 interrupt-controller;
129 #interrupt-cells = <2>;
130 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200131
Patrice Chotard21299d32018-04-26 17:13:11 +0200132 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100133 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200134 ldo1-supply = <&v3v3>;
135 ldo2-supply = <&v3v3>;
136 ldo3-supply = <&vdd_ddr>;
137 ldo5-supply = <&v3v3>;
138 ldo6-supply = <&v3v3>;
139 pwr_sw1-supply = <&bst_out>;
140 pwr_sw2-supply = <&bst_out>;
141
142 vddcore: buck1 {
143 regulator-name = "vddcore";
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100144 regulator-min-microvolt = <1200000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200145 regulator-max-microvolt = <1350000>;
146 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200147 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200148 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200149 };
150
151 vdd_ddr: buck2 {
152 regulator-name = "vdd_ddr";
153 regulator-min-microvolt = <1350000>;
154 regulator-max-microvolt = <1350000>;
155 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200156 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200157 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200158 };
159
160 vdd: buck3 {
161 regulator-name = "vdd";
162 regulator-min-microvolt = <3300000>;
163 regulator-max-microvolt = <3300000>;
164 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200165 st,mask-reset;
166 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200167 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200168 };
169
170 v3v3: buck4 {
171 regulator-name = "v3v3";
172 regulator-min-microvolt = <3300000>;
173 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200174 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200175 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200176 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200177 };
178
179 vdda: ldo1 {
180 regulator-name = "vdda";
181 regulator-min-microvolt = <2900000>;
182 regulator-max-microvolt = <2900000>;
183 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200184 };
185
186 v2v8: ldo2 {
187 regulator-name = "v2v8";
188 regulator-min-microvolt = <2800000>;
189 regulator-max-microvolt = <2800000>;
190 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200191 };
192
193 vtt_ddr: ldo3 {
194 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200195 regulator-min-microvolt = <500000>;
196 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200197 regulator-always-on;
198 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200199 };
200
201 vdd_usb: ldo4 {
202 regulator-name = "vdd_usb";
203 regulator-min-microvolt = <3300000>;
204 regulator-max-microvolt = <3300000>;
205 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200206 };
207
208 vdd_sd: ldo5 {
209 regulator-name = "vdd_sd";
210 regulator-min-microvolt = <2900000>;
211 regulator-max-microvolt = <2900000>;
212 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200213 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200214 };
215
216 v1v8: ldo6 {
217 regulator-name = "v1v8";
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <1800000>;
220 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200221 };
222
223 vref_ddr: vref_ddr {
224 regulator-name = "vref_ddr";
225 regulator-always-on;
226 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200227 };
228
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100229 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200230 regulator-name = "bst_out";
231 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100232 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200233
234 vbus_otg: pwr_sw1 {
235 regulator-name = "vbus_otg";
236 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200237 };
238
239 vbus_sw: pwr_sw2 {
240 regulator-name = "vbus_sw";
241 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100242 regulator-active-discharge = <1>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200243 };
244 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200245
246 onkey {
247 compatible = "st,stpmic1-onkey";
248 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
249 interrupt-names = "onkey-falling", "onkey-rising";
250 power-off-time-sec = <10>;
251 status = "okay";
252 };
253
254 watchdog {
255 compatible = "st,stpmic1-wdt";
256 status = "disabled";
257 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100258 };
259};
260
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200261&ipcc {
262 status = "okay";
263};
264
Patrice Chotard23661602019-02-12 16:50:38 +0100265&iwdg2 {
266 timeout-sec = <32>;
267 status = "okay";
268};
269
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200270&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100271 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
272 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200273 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
274 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100275 interrupt-parent = <&exti>;
276 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200277 status = "okay";
278};
279
Patrick Delaunay7915b992020-01-28 10:10:59 +0100280&pwr_regulators {
281 vdd-supply = <&vdd>;
282 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200283};
284
Patrice Chotard23661602019-02-12 16:50:38 +0100285&rng1 {
286 status = "okay";
287};
288
289&rtc {
290 status = "okay";
291};
292
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100293&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200294 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100295 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200296 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
297 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100298 broken-cd;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100299 st,sig-dir;
300 st,neg-edge;
301 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100302 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200303 vmmc-supply = <&vdd_sd>;
304 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100305 status = "okay";
306};
307
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100308&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100309 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100310 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100311 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
312 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100313 non-removable;
314 no-sd;
315 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100316 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100317 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200318 vmmc-supply = <&v3v3>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100319 vqmmc-supply = <&v3v3>;
320 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100321 status = "okay";
322};
323
Patrice Chotard23661602019-02-12 16:50:38 +0100324&timers6 {
325 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200326 /* spare dmas for other usage */
327 /delete-property/dmas;
328 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100329 timer@5 {
330 status = "okay";
331 };
332};
333
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100334&uart4 {
335 pinctrl-names = "default";
336 pinctrl-0 = <&uart4_pins_a>;
337 status = "okay";
338};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200339
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200340&usbotg_hs {
341 vbus-supply = <&vbus_otg>;
342};
343
Patrick Delaunaya6743132018-07-09 15:17:19 +0200344&usbphyc_port0 {
345 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200346};
347
348&usbphyc_port1 {
349 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200350};