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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk5653fc32004-02-08 22:55:38 +00002/*
wdenkbf9e3b32004-02-12 00:47:09 +00003 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00004 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 *
6 * Copyright (C) 2003 Arabella Software Ltd.
7 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00008 *
wdenkbf9e3b32004-02-12 00:47:09 +00009 * Copyright (C) 2004
10 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010011 *
12 * Copyright (C) 2006
13 * Tolunay Orkun <listmember@orkun.us>
wdenk5653fc32004-02-08 22:55:38 +000014 */
15
16/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000017/* #define DEBUG */
18
wdenk5653fc32004-02-08 22:55:38 +000019#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070020#include <console.h>
Thomas Chouf1056912015-11-07 14:31:08 +080021#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060022#include <env.h>
Thomas Chouf1056912015-11-07 14:31:08 +080023#include <errno.h>
24#include <fdt_support.h>
Simon Glassb79fdc72020-05-10 11:39:54 -060025#include <flash.h>
Simon Glass691d7192020-05-10 11:40:02 -060026#include <init.h>
Simon Glassc30b7ad2019-11-14 12:57:41 -070027#include <irq_func.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060028#include <log.h>
Simon Glass401d1c42020-10-30 21:38:53 -060029#include <asm/global_data.h>
wdenk5653fc32004-02-08 22:55:38 +000030#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010031#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000032#include <asm/byteorder.h>
Andrew Gabbasovaedadf12013-05-14 12:27:52 -050033#include <asm/unaligned.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060034#include <env_internal.h>
Simon Glassc05ed002020-05-10 11:40:11 -060035#include <linux/delay.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010036#include <mtd/cfi_flash.h>
Jens Scharsig (BuS Elektronik)a9f5fab2012-01-27 09:29:53 +010037#include <watchdog.h>
wdenk028ab6b2004-02-23 23:54:43 +000038
wdenk5653fc32004-02-08 22:55:38 +000039/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010040 * This file implements a Common Flash Interface (CFI) driver for
41 * U-Boot.
42 *
43 * The width of the port and the width of the chips are determined at
44 * initialization. These widths are used to calculate the address for
45 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000046 *
47 * References
48 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
49 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
50 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
51 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010052 * AMD CFI Specification, Release 2.0 December 1, 2001
53 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
54 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000055 *
Tom Rini65cc0e22022-11-16 13:10:41 -050056 * Define CFG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010057 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000058 */
59
Thomas Chouf1056912015-11-07 14:31:08 +080060DECLARE_GLOBAL_DATA_PTR;
61
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010062static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysinger4ffeab22010-12-22 09:41:13 -050063#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010064static uint flash_verbose = 1;
Mike Frysinger4ffeab22010-12-22 09:41:13 -050065#else
66#define flash_verbose 1
67#endif
Wolfgang Denk92eb7292006-12-27 01:26:13 +010068
Wolfgang Denk2a112b22008-08-08 16:39:54 +020069flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
70
Jeroen Hofstee00dcb072014-10-08 22:57:23 +020071#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
72#define __maybe_weak __weak
73#else
74#define __maybe_weak static
75#endif
76
Stefan Roese6f726f92010-10-25 18:31:48 +020077/*
78 * 0xffff is an undefined value for the configuration register. When
79 * this value is returned, the configuration register shall not be
80 * written at all (default mode).
81 */
82static u16 cfi_flash_config_reg(int i)
83{
84#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
85 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
86#else
87 return 0xffff;
88#endif
89}
90
Stefan Roeseca5def32010-08-31 10:00:10 +020091#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
Patrick Delaunay144fef82022-01-04 14:23:59 +010092int cfi_flash_num_flash_banks = CFI_MAX_FLASH_BANKS;
Mario Sixd9a35692018-01-26 14:43:56 +010093#else
94int cfi_flash_num_flash_banks;
Stefan Roeseca5def32010-08-31 10:00:10 +020095#endif
96
Thomas Chouf1056912015-11-07 14:31:08 +080097#ifdef CONFIG_CFI_FLASH /* for driver model */
98static void cfi_flash_init_dm(void)
99{
100 struct udevice *dev;
101
102 cfi_flash_num_flash_banks = 0;
103 /*
104 * The uclass_first_device() will probe the first device and
105 * uclass_next_device() will probe the rest if they exist. So
106 * that cfi_flash_probe() will get called assigning the base
107 * addresses that are available.
108 */
109 for (uclass_first_device(UCLASS_MTD, &dev);
110 dev;
111 uclass_next_device(&dev)) {
112 }
113}
114
Thomas Chouf1056912015-11-07 14:31:08 +0800115phys_addr_t cfi_flash_bank_addr(int i)
116{
Marek Vasut1ec0a372017-09-12 19:09:08 +0200117 return flash_info[i].base;
Thomas Chouf1056912015-11-07 14:31:08 +0800118}
119#else
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200120__weak phys_addr_t cfi_flash_bank_addr(int i)
Stefan Roeseb00e19c2010-08-30 10:11:51 +0200121{
Tom Rini65cc0e22022-11-16 13:10:41 -0500122 return ((phys_addr_t [])CFG_SYS_FLASH_BANKS_LIST)[i];
Stefan Roeseb00e19c2010-08-30 10:11:51 +0200123}
Thomas Chouf1056912015-11-07 14:31:08 +0800124#endif
Stefan Roeseb00e19c2010-08-30 10:11:51 +0200125
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200126__weak unsigned long cfi_flash_bank_size(int i)
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200127{
Tom Rini65cc0e22022-11-16 13:10:41 -0500128#ifdef CFG_SYS_FLASH_BANKS_SIZES
129 return ((unsigned long [])CFG_SYS_FLASH_BANKS_SIZES)[i];
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200130#else
131 return 0;
132#endif
133}
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200134
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200135__maybe_weak void flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100136{
137 __raw_writeb(value, addr);
138}
139
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200140__maybe_weak void flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100141{
142 __raw_writew(value, addr);
143}
144
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200145__maybe_weak void flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100146{
147 __raw_writel(value, addr);
148}
149
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200150__maybe_weak void flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100151{
152 /* No architectures currently implement __raw_writeq() */
153 *(volatile u64 *)addr = value;
154}
155
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200156__maybe_weak u8 flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100157{
158 return __raw_readb(addr);
159}
160
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200161__maybe_weak u16 flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100162{
163 return __raw_readw(addr);
164}
165
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200166__maybe_weak u32 flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100167{
168 return __raw_readl(addr);
169}
170
Jeroen Hofstee00dcb072014-10-08 22:57:23 +0200171__maybe_weak u64 flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100172{
173 /* No architectures currently implement __raw_readq() */
174 return *(volatile u64 *)addr;
175}
176
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200177/*-----------------------------------------------------------------------
178 */
Mario Sixddcf0542018-01-26 14:43:54 +0100179#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
Vignesh Raghavendrad75eacf2019-10-23 13:30:00 +0530180 (defined(CONFIG_SYS_MONITOR_BASE) && \
Tom Rini65cc0e22022-11-16 13:10:41 -0500181 (CONFIG_SYS_MONITOR_BASE >= CFG_SYS_FLASH_BASE))
Marek Vasut236c49a2017-08-20 17:20:00 +0200182static flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200183{
184 int i;
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900185 flash_info_t *info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200186
Patrick Delaunay98150e72022-01-04 14:23:58 +0100187 for (i = 0; i < CFI_FLASH_BANKS; i++) {
Masahiro Yamadae2e273a2013-05-17 14:50:36 +0900188 info = &flash_info[i];
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200189 if (info->size && info->start[0] <= base &&
190 base <= info->start[0] + info->size - 1)
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900191 return info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200192 }
193
Masahiro Yamada24c185c2013-05-17 14:50:37 +0900194 return NULL;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200195}
wdenk5653fc32004-02-08 22:55:38 +0000196#endif
197
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100198unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
199{
200 if (sect != (info->sector_count - 1))
201 return info->start[sect + 1] - info->start[sect];
202 else
203 return info->start[0] + info->size - info->start[sect];
204}
205
wdenk5653fc32004-02-08 22:55:38 +0000206/*-----------------------------------------------------------------------
207 * create an address based on the offset and the port width
208 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100209static inline void *
Mario Sixca2b07a2018-01-26 14:43:32 +0100210flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000211{
Stefan Roesee303be22013-04-12 19:04:54 +0200212 unsigned int byte_offset = offset * info->portwidth;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100213
Jagannadha Sutradharudu Teki53879b12021-02-26 08:51:49 +0100214 return (void *)(info->start[sect] + (byte_offset << info->chip_lsb));
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100215}
216
217static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
Mario Sixc0350fb2018-01-26 14:43:55 +0100218 unsigned int offset, void *addr)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100219{
wdenk5653fc32004-02-08 22:55:38 +0000220}
wdenkbf9e3b32004-02-12 00:47:09 +0000221
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200222/*-----------------------------------------------------------------------
223 * make a proper sized command based on the port and chip widths
224 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200225static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200226{
227 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400228 int cword_offset;
229 int cp_offset;
Tom Rini65cc0e22022-11-16 13:10:41 -0500230#if defined(__LITTLE_ENDIAN) || defined(CFG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200231 u32 cmd_le = cpu_to_le32(cmd);
232#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400233 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200234 uchar *cp = (uchar *) cmdbuf;
235
Mario Sixb1683862018-01-26 14:43:33 +0100236 for (i = info->portwidth; i > 0; i--) {
Mario Six640f4e32018-01-26 14:43:36 +0100237 cword_offset = (info->portwidth - i) % info->chipwidth;
Tom Rini65cc0e22022-11-16 13:10:41 -0500238#if defined(__LITTLE_ENDIAN) || defined(CFG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400239 cp_offset = info->portwidth - i;
Mario Sixdb91bb22018-01-26 14:43:34 +0100240 val = *((uchar *)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200241#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400242 cp_offset = i - 1;
Mario Sixdb91bb22018-01-26 14:43:34 +0100243 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200244#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200245 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400246 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200247}
248
wdenkbf9e3b32004-02-12 00:47:09 +0000249#ifdef DEBUG
250/*-----------------------------------------------------------------------
251 * Debug support
252 */
Mario Six188a5562018-01-26 14:43:31 +0100253static void print_longlong(char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000254{
255 int i;
256 char *cp;
257
Mario Six640f4e32018-01-26 14:43:36 +0100258 cp = (char *)&data;
wdenkbf9e3b32004-02-12 00:47:09 +0000259 for (i = 0; i < 8; i++)
Mario Six188a5562018-01-26 14:43:31 +0100260 sprintf(&str[i * 2], "%2.2x", *cp++);
wdenkbf9e3b32004-02-12 00:47:09 +0000261}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200262
Mario Six188a5562018-01-26 14:43:31 +0100263static void flash_printqry(struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000264{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100265 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000266 int x, y;
267
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100268 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
269 debug("%02x : ", x);
270 for (y = 0; y < 16; y++)
271 debug("%2.2x ", p[x + y]);
272 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000273 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100274 unsigned char c = p[x + y];
Mario Six7223a8c2018-01-26 14:43:37 +0100275
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100276 if (c >= 0x20 && c <= 0x7e)
277 debug("%c", c);
278 else
279 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000280 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100281 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000282 }
283}
wdenkbf9e3b32004-02-12 00:47:09 +0000284#endif
285
wdenk5653fc32004-02-08 22:55:38 +0000286/*-----------------------------------------------------------------------
287 * read a character at a port width address
288 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100289static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000290{
291 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000293
Mario Six188a5562018-01-26 14:43:31 +0100294 cp = flash_map(info, 0, offset);
Tom Rini65cc0e22022-11-16 13:10:41 -0500295#if defined(__LITTLE_ENDIAN) || defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100296 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000297#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100298 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000299#endif
Mario Six188a5562018-01-26 14:43:31 +0100300 flash_unmap(info, 0, offset, cp);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100301 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000302}
303
304/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100305 * read a word at a port width address, assume 16bit bus
306 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100307static inline ushort flash_read_word(flash_info_t *info, uint offset)
Tor Krill90447ec2008-03-28 11:29:10 +0100308{
309 ushort *addr, retval;
310
Mario Six188a5562018-01-26 14:43:31 +0100311 addr = flash_map(info, 0, offset);
312 retval = flash_read16(addr);
313 flash_unmap(info, 0, offset, addr);
Tor Krill90447ec2008-03-28 11:29:10 +0100314 return retval;
315}
316
Tor Krill90447ec2008-03-28 11:29:10 +0100317/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100318 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000319 * port size word. Swap for ppc format.
320 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100321static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100322 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000323{
wdenkbf9e3b32004-02-12 00:47:09 +0000324 uchar *addr;
325 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000326
wdenkbf9e3b32004-02-12 00:47:09 +0000327#ifdef DEBUG
328 int x;
329#endif
Mario Six188a5562018-01-26 14:43:31 +0100330 addr = flash_map(info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000331
332#ifdef DEBUG
Mario Six188a5562018-01-26 14:43:31 +0100333 debug("long addr is at %p info->portwidth = %d\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100334 info->portwidth);
Mario Six0412e902018-01-26 14:43:38 +0100335 for (x = 0; x < 4 * info->portwidth; x++)
Mario Six188a5562018-01-26 14:43:31 +0100336 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000337#endif
Tom Rini65cc0e22022-11-16 13:10:41 -0500338#if defined(__LITTLE_ENDIAN) || defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100339 retval = ((flash_read8(addr) << 16) |
340 (flash_read8(addr + info->portwidth) << 24) |
341 (flash_read8(addr + 2 * info->portwidth)) |
342 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000343#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100344 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
345 (flash_read8(addr + info->portwidth - 1) << 16) |
346 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
347 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000348#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100349 flash_unmap(info, sect, offset, addr);
350
wdenkbf9e3b32004-02-12 00:47:09 +0000351 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000352}
353
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200354/*
355 * Write a proper sized command to the correct address
356 */
Marek Vasut236c49a2017-08-20 17:20:00 +0200357static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
358 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200359{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100360 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200361 cfiword_t cword;
362
Mario Six188a5562018-01-26 14:43:31 +0100363 addr = flash_map(info, sect, offset);
364 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200365 switch (info->portwidth) {
366 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +0100367 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Mario Sixc0350fb2018-01-26 14:43:55 +0100368 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100369 flash_write8(cword.w8, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200370 break;
371 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +0100372 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100373 cmd, cword.w16,
374 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100375 flash_write16(cword.w16, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200376 break;
377 case FLASH_CFI_32BIT:
Mario Six188a5562018-01-26 14:43:31 +0100378 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
Mario Sixc0350fb2018-01-26 14:43:55 +0100379 cmd, cword.w32,
380 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin622b9522015-10-23 16:50:51 +0100381 flash_write32(cword.w32, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200382 break;
383 case FLASH_CFI_64BIT:
384#ifdef DEBUG
385 {
386 char str[20];
387
Mario Six188a5562018-01-26 14:43:31 +0100388 print_longlong(str, cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200389
Mario Six188a5562018-01-26 14:43:31 +0100390 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Mario Sixc0350fb2018-01-26 14:43:55 +0100391 addr, cmd, str,
392 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200393 }
394#endif
Ryan Harkin622b9522015-10-23 16:50:51 +0100395 flash_write64(cword.w64, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200396 break;
397 }
398
399 /* Ensure all the instructions are fully finished */
400 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100401
402 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200403}
404
Mario Sixca2b07a2018-01-26 14:43:32 +0100405static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200406{
Mario Six188a5562018-01-26 14:43:31 +0100407 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
408 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200409}
410
411/*-----------------------------------------------------------------------
412 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100413static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
414 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200415{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100416 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200417 cfiword_t cword;
418 int retval;
419
Mario Six188a5562018-01-26 14:43:31 +0100420 addr = flash_map(info, sect, offset);
421 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200422
Mario Six188a5562018-01-26 14:43:31 +0100423 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200424 switch (info->portwidth) {
425 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +0100426 debug("is= %x %x\n", flash_read8(addr), cword.w8);
Ryan Harkin622b9522015-10-23 16:50:51 +0100427 retval = (flash_read8(addr) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200428 break;
429 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +0100430 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
Ryan Harkin622b9522015-10-23 16:50:51 +0100431 retval = (flash_read16(addr) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200432 break;
433 case FLASH_CFI_32BIT:
Mario Six188a5562018-01-26 14:43:31 +0100434 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
Ryan Harkin622b9522015-10-23 16:50:51 +0100435 retval = (flash_read32(addr) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200436 break;
437 case FLASH_CFI_64BIT:
438#ifdef DEBUG
439 {
440 char str1[20];
441 char str2[20];
442
Mario Six188a5562018-01-26 14:43:31 +0100443 print_longlong(str1, flash_read64(addr));
444 print_longlong(str2, cword.w64);
445 debug("is= %s %s\n", str1, str2);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200446 }
447#endif
Ryan Harkin622b9522015-10-23 16:50:51 +0100448 retval = (flash_read64(addr) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200449 break;
450 default:
451 retval = 0;
452 break;
453 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100454 flash_unmap(info, sect, offset, addr);
455
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200456 return retval;
457}
458
459/*-----------------------------------------------------------------------
460 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100461static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
462 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200463{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100464 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200465 cfiword_t cword;
466 int retval;
467
Mario Six188a5562018-01-26 14:43:31 +0100468 addr = flash_map(info, sect, offset);
469 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200470 switch (info->portwidth) {
471 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100472 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200473 break;
474 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100475 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 break;
477 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100478 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100481 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200482 break;
483 default:
484 retval = 0;
485 break;
486 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100487 flash_unmap(info, sect, offset, addr);
488
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200489 return retval;
490}
491
492/*-----------------------------------------------------------------------
493 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100494static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
495 uchar cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200496{
Mario Six53128382018-01-26 14:43:49 +0100497 u8 *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200498 cfiword_t cword;
499 int retval;
500
Mario Six188a5562018-01-26 14:43:31 +0100501 addr = flash_map(info, sect, offset);
502 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200503 switch (info->portwidth) {
504 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200505 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200506 break;
507 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200508 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 break;
510 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200511 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 break;
513 case FLASH_CFI_64BIT:
Mario Sixb1683862018-01-26 14:43:33 +0100514 retval = ((flash_read32(addr) != flash_read32(addr)) ||
Mario Six640f4e32018-01-26 14:43:36 +0100515 (flash_read32(addr + 4) != flash_read32(addr + 4)));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200516 break;
517 default:
518 retval = 0;
519 break;
520 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100521 flash_unmap(info, sect, offset, addr);
522
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200523 return retval;
524}
525
526/*
527 * flash_is_busy - check to see if the flash is busy
528 *
529 * This routine checks the status of the chip and returns true if the
530 * chip is busy.
531 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100532static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200533{
534 int retval;
535
536 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400537 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200538 case CFI_CMDSET_INTEL_STANDARD:
539 case CFI_CMDSET_INTEL_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +0100540 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 break;
542 case CFI_CMDSET_AMD_STANDARD:
543 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100544#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200545 case CFI_CMDSET_AMD_LEGACY:
546#endif
Marek Vasut72443c72017-09-12 19:09:31 +0200547 if (info->sr_supported) {
Mario Six188a5562018-01-26 14:43:31 +0100548 flash_write_cmd(info, sect, info->addr_unlock1,
Mario Sixc0350fb2018-01-26 14:43:55 +0100549 FLASH_CMD_READ_STATUS);
Mario Six188a5562018-01-26 14:43:31 +0100550 retval = !flash_isset(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100551 FLASH_STATUS_DONE);
Marek Vasut72443c72017-09-12 19:09:31 +0200552 } else {
Mario Six188a5562018-01-26 14:43:31 +0100553 retval = flash_toggle(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100554 AMD_STATUS_TOGGLE);
Marek Vasut72443c72017-09-12 19:09:31 +0200555 }
556
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200557 break;
558 default:
559 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100560 }
Mario Six38d28312018-01-26 14:43:40 +0100561 debug("%s: %d\n", __func__, retval);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200562 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100563}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200564
565/*-----------------------------------------------------------------------
566 * wait for XSR.7 to be set. Time out with an error if it does not.
567 * This routine does not set the flash to read-array mode.
568 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100569static int flash_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100570 ulong tout, char *prompt)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200571{
572 ulong start;
573
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200574#if CONFIG_SYS_HZ != 1000
Mario Sixddcf0542018-01-26 14:43:54 +0100575 /* Avoid overflow for large HZ */
Renato Andreolac40c94a2010-03-24 23:00:47 +0800576 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixddcf0542018-01-26 14:43:54 +0100577 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Renato Andreolac40c94a2010-03-24 23:00:47 +0800578 else
579 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200580#endif
581
582 /* Wait for command completion */
Tom Rini65cc0e22022-11-16 13:10:41 -0500583#ifdef CFG_SYS_LOW_RES_TIMER
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800584 reset_timer();
Graeme Russe110c4f2011-07-15 02:18:56 +0000585#endif
Mario Six188a5562018-01-26 14:43:31 +0100586 start = get_timer(0);
Stefan Roese29caf932022-09-02 14:10:46 +0200587 schedule();
Mario Six188a5562018-01-26 14:43:31 +0100588 while (flash_is_busy(info, sector)) {
589 if (get_timer(start) > tout) {
590 printf("Flash %s timeout at address %lx data %lx\n",
Mario Sixc0350fb2018-01-26 14:43:55 +0100591 prompt, info->start[sector],
592 flash_read_long(info, sector, 0));
Mario Six188a5562018-01-26 14:43:31 +0100593 flash_write_cmd(info, sector, 0, info->cmd_reset);
Stefan Roesee303be22013-04-12 19:04:54 +0200594 udelay(1);
Mario Six9dbaebc2018-01-26 14:43:52 +0100595 return ERR_TIMEOUT;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200596 }
Mario Six188a5562018-01-26 14:43:31 +0100597 udelay(1); /* also triggers watchdog */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200598 }
599 return ERR_OK;
600}
601
602/*-----------------------------------------------------------------------
603 * Wait for XSR.7 to be set, if it times out print an error, otherwise
604 * do a full status check.
605 *
606 * This routine sets the flash to read-array mode.
607 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100608static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100609 ulong tout, char *prompt)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200610{
611 int retcode;
612
Mario Six188a5562018-01-26 14:43:31 +0100613 retcode = flash_status_check(info, sector, tout, prompt);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200614 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400615 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200616 case CFI_CMDSET_INTEL_EXTENDED:
617 case CFI_CMDSET_INTEL_STANDARD:
Mario Six4f89da42018-01-26 14:43:42 +0100618 if (retcode == ERR_OK &&
Mario Sixc0350fb2018-01-26 14:43:55 +0100619 !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200620 retcode = ERR_INVAL;
Mario Six188a5562018-01-26 14:43:31 +0100621 printf("Flash %s error at address %lx\n", prompt,
Mario Sixc0350fb2018-01-26 14:43:55 +0100622 info->start[sector]);
Mario Six188a5562018-01-26 14:43:31 +0100623 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200624 FLASH_STATUS_PSLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100625 puts("Command Sequence Error.\n");
626 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200627 FLASH_STATUS_ECLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100628 puts("Block Erase Error.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200629 retcode = ERR_NOT_ERASED;
Mario Six188a5562018-01-26 14:43:31 +0100630 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200631 FLASH_STATUS_PSLBS)) {
Mario Six188a5562018-01-26 14:43:31 +0100632 puts("Locking Error\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200633 }
Mario Six188a5562018-01-26 14:43:31 +0100634 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
635 puts("Block locked.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200636 retcode = ERR_PROTECTED;
637 }
Mario Six188a5562018-01-26 14:43:31 +0100638 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
639 puts("Vpp Low Error.\n");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200640 }
Mario Six188a5562018-01-26 14:43:31 +0100641 flash_write_cmd(info, sector, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -0700642 udelay(1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200643 break;
644 default:
645 break;
646 }
647 return retcode;
648}
649
Thomas Choue5720822010-03-26 08:17:00 +0800650static int use_flash_status_poll(flash_info_t *info)
651{
652#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
653 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
654 info->vendor == CFI_CMDSET_AMD_STANDARD)
655 return 1;
656#endif
657 return 0;
658}
659
660static int flash_status_poll(flash_info_t *info, void *src, void *dst,
661 ulong tout, char *prompt)
662{
663#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
664 ulong start;
665 int ready;
666
667#if CONFIG_SYS_HZ != 1000
Mario Sixddcf0542018-01-26 14:43:54 +0100668 /* Avoid overflow for large HZ */
Thomas Choue5720822010-03-26 08:17:00 +0800669 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixddcf0542018-01-26 14:43:54 +0100670 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Thomas Choue5720822010-03-26 08:17:00 +0800671 else
672 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
673#endif
674
675 /* Wait for command completion */
Tom Rini65cc0e22022-11-16 13:10:41 -0500676#ifdef CFG_SYS_LOW_RES_TIMER
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800677 reset_timer();
Graeme Russe110c4f2011-07-15 02:18:56 +0000678#endif
Thomas Choue5720822010-03-26 08:17:00 +0800679 start = get_timer(0);
Stefan Roese29caf932022-09-02 14:10:46 +0200680 schedule();
Thomas Choue5720822010-03-26 08:17:00 +0800681 while (1) {
682 switch (info->portwidth) {
683 case FLASH_CFI_8BIT:
684 ready = flash_read8(dst) == flash_read8(src);
685 break;
686 case FLASH_CFI_16BIT:
687 ready = flash_read16(dst) == flash_read16(src);
688 break;
689 case FLASH_CFI_32BIT:
690 ready = flash_read32(dst) == flash_read32(src);
691 break;
692 case FLASH_CFI_64BIT:
693 ready = flash_read64(dst) == flash_read64(src);
694 break;
695 default:
696 ready = 0;
697 break;
698 }
699 if (ready)
700 break;
701 if (get_timer(start) > tout) {
702 printf("Flash %s timeout at address %lx data %lx\n",
703 prompt, (ulong)dst, (ulong)flash_read8(dst));
Mario Six9dbaebc2018-01-26 14:43:52 +0100704 return ERR_TIMEOUT;
Thomas Choue5720822010-03-26 08:17:00 +0800705 }
706 udelay(1); /* also triggers watchdog */
707 }
708#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
709 return ERR_OK;
710}
711
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200712/*-----------------------------------------------------------------------
713 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100714static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200715{
Tom Rini65cc0e22022-11-16 13:10:41 -0500716#if defined(__LITTLE_ENDIAN) && !defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200717 unsigned short w;
718 unsigned int l;
719 unsigned long long ll;
720#endif
721
722 switch (info->portwidth) {
723 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100724 cword->w8 = c;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200725 break;
726 case FLASH_CFI_16BIT:
Tom Rini65cc0e22022-11-16 13:10:41 -0500727#if defined(__LITTLE_ENDIAN) && !defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200728 w = c;
729 w <<= 8;
Ryan Harkin622b9522015-10-23 16:50:51 +0100730 cword->w16 = (cword->w16 >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100731#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100732 cword->w16 = (cword->w16 << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100733#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200734 break;
735 case FLASH_CFI_32BIT:
Tom Rini65cc0e22022-11-16 13:10:41 -0500736#if defined(__LITTLE_ENDIAN) && !defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200737 l = c;
738 l <<= 24;
Ryan Harkin622b9522015-10-23 16:50:51 +0100739 cword->w32 = (cword->w32 >> 8) | l;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200740#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100741 cword->w32 = (cword->w32 << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200742#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200743 break;
744 case FLASH_CFI_64BIT:
Tom Rini65cc0e22022-11-16 13:10:41 -0500745#if defined(__LITTLE_ENDIAN) && !defined(CFG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200746 ll = c;
747 ll <<= 56;
Ryan Harkin622b9522015-10-23 16:50:51 +0100748 cword->w64 = (cword->w64 >> 8) | ll;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200749#else
Ryan Harkin622b9522015-10-23 16:50:51 +0100750 cword->w64 = (cword->w64 << 8) | c;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200751#endif
752 break;
wdenk5653fc32004-02-08 22:55:38 +0000753 }
wdenk5653fc32004-02-08 22:55:38 +0000754}
755
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100756/*
757 * Loop through the sector table starting from the previously found sector.
758 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000759 */
Mario Sixca2b07a2018-01-26 14:43:32 +0100760static flash_sect_t find_sector(flash_info_t *info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000761{
Kim Phillips11dc4012012-10-29 13:34:45 +0000762 static flash_sect_t saved_sector; /* previously found sector */
Stefan Roesee303be22013-04-12 19:04:54 +0200763 static flash_info_t *saved_info; /* previously used flash bank */
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100764 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000765
Mario Six4f89da42018-01-26 14:43:42 +0100766 if (info != saved_info || sector >= info->sector_count)
Stefan Roesee303be22013-04-12 19:04:54 +0200767 sector = 0;
768
Mario Six5701ba82018-01-26 14:43:53 +0100769 while ((sector < info->sector_count - 1) &&
Mario Sixc0350fb2018-01-26 14:43:55 +0100770 (info->start[sector] < addr))
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100771 sector++;
772 while ((info->start[sector] > addr) && (sector > 0))
773 /*
774 * also decrements the sector in case of an overshot
775 * in the first loop
776 */
777 sector--;
778
779 saved_sector = sector;
Stefan Roesee303be22013-04-12 19:04:54 +0200780 saved_info = info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200781 return sector;
wdenk7680c142005-05-16 15:23:22 +0000782}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200783
784/*-----------------------------------------------------------------------
785 */
Mario Sixc0350fb2018-01-26 14:43:55 +0100786static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200787{
Becky Bruce09ce9922009-02-02 16:34:51 -0600788 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200789 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100790 flash_sect_t sect = 0;
791 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200792
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200793 /* Check if Flash is (sufficiently) erased */
794 switch (info->portwidth) {
795 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100796 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200797 break;
798 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100799 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200800 break;
801 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100802 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200803 break;
804 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100805 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200806 break;
807 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100808 flag = 0;
809 break;
810 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600811 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100812 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200813
814 /* Disable interrupts which might cause a timeout here */
Mario Six188a5562018-01-26 14:43:31 +0100815 flag = disable_interrupts();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200816
817 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400818 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200819 case CFI_CMDSET_INTEL_EXTENDED:
820 case CFI_CMDSET_INTEL_STANDARD:
Mario Six188a5562018-01-26 14:43:31 +0100821 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
822 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200823 break;
824 case CFI_CMDSET_AMD_EXTENDED:
825 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500826 sect = find_sector(info, dest);
Mario Six188a5562018-01-26 14:43:31 +0100827 flash_unlock_seq(info, sect);
828 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100829 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200830 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800831#ifdef CONFIG_FLASH_CFI_LEGACY
832 case CFI_CMDSET_AMD_LEGACY:
833 sect = find_sector(info, dest);
Mario Six188a5562018-01-26 14:43:31 +0100834 flash_unlock_seq(info, 0);
835 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800836 sect_found = 1;
837 break;
838#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200839 }
840
841 switch (info->portwidth) {
842 case FLASH_CFI_8BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100843 flash_write8(cword.w8, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200844 break;
845 case FLASH_CFI_16BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100846 flash_write16(cword.w16, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200847 break;
848 case FLASH_CFI_32BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100849 flash_write32(cword.w32, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200850 break;
851 case FLASH_CFI_64BIT:
Ryan Harkin622b9522015-10-23 16:50:51 +0100852 flash_write64(cword.w64, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200853 break;
854 }
855
856 /* re-enable interrupts if necessary */
857 if (flag)
Mario Six188a5562018-01-26 14:43:31 +0100858 enable_interrupts();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200859
Jens Gehrleina7292872008-12-16 17:25:54 +0100860 if (!sect_found)
Mario Six188a5562018-01-26 14:43:31 +0100861 sect = find_sector(info, dest);
Jens Gehrleina7292872008-12-16 17:25:54 +0100862
Thomas Choue5720822010-03-26 08:17:00 +0800863 if (use_flash_status_poll(info))
864 return flash_status_poll(info, &cword, dstaddr,
865 info->write_tout, "write");
866 else
867 return flash_full_status_check(info, sect,
868 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200869}
870
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200871#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200872
Mario Sixca2b07a2018-01-26 14:43:32 +0100873static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
Mario Sixc0350fb2018-01-26 14:43:55 +0100874 int len)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200875{
876 flash_sect_t sector;
877 int cnt;
878 int retcode;
Mario Six53128382018-01-26 14:43:49 +0100879 u8 *src = cp;
880 u8 *dst = (u8 *)dest;
881 u8 *dst2 = dst;
Tao Hou85c344e2012-03-15 23:33:58 +0800882 int flag = 1;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200883 uint offset = 0;
884 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400885 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100886
Stefan Roese0dc80e22007-12-27 07:50:54 +0100887 switch (info->portwidth) {
888 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200889 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100890 break;
891 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200892 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100893 break;
894 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200895 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100896 break;
897 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200898 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100899 break;
900 default:
901 retcode = ERR_INVAL;
902 goto out_unmap;
903 }
904
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200905 cnt = len >> shift;
906
Tao Hou85c344e2012-03-15 23:33:58 +0800907 while ((cnt-- > 0) && (flag == 1)) {
Stefan Roese0dc80e22007-12-27 07:50:54 +0100908 switch (info->portwidth) {
909 case FLASH_CFI_8BIT:
910 flag = ((flash_read8(dst2) & flash_read8(src)) ==
911 flash_read8(src));
912 src += 1, dst2 += 1;
913 break;
914 case FLASH_CFI_16BIT:
915 flag = ((flash_read16(dst2) & flash_read16(src)) ==
916 flash_read16(src));
917 src += 2, dst2 += 2;
918 break;
919 case FLASH_CFI_32BIT:
920 flag = ((flash_read32(dst2) & flash_read32(src)) ==
921 flash_read32(src));
922 src += 4, dst2 += 4;
923 break;
924 case FLASH_CFI_64BIT:
925 flag = ((flash_read64(dst2) & flash_read64(src)) ==
926 flash_read64(src));
927 src += 8, dst2 += 8;
928 break;
929 }
930 }
931 if (!flag) {
932 retcode = ERR_NOT_ERASED;
933 goto out_unmap;
934 }
935
936 src = cp;
Mario Six188a5562018-01-26 14:43:31 +0100937 sector = find_sector(info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200938
939 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400940 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200941 case CFI_CMDSET_INTEL_STANDARD:
942 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400943 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
Mario Sixddcf0542018-01-26 14:43:54 +0100944 FLASH_CMD_WRITE_BUFFER_PROG :
945 FLASH_CMD_WRITE_TO_BUFFER;
Mario Six188a5562018-01-26 14:43:31 +0100946 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
947 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
948 flash_write_cmd(info, sector, 0, write_cmd);
949 retcode = flash_status_check(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +0100950 info->buffer_write_tout,
951 "write to buffer");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200952 if (retcode == ERR_OK) {
953 /* reduce the number of loops by the width of
Mario Sixa6d18f22018-01-26 14:43:41 +0100954 * the port
955 */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200956 cnt = len >> shift;
Mario Six188a5562018-01-26 14:43:31 +0100957 flash_write_cmd(info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200958 while (cnt-- > 0) {
959 switch (info->portwidth) {
960 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100961 flash_write8(flash_read8(src), dst);
962 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200963 break;
964 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100965 flash_write16(flash_read16(src), dst);
966 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200967 break;
968 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100969 flash_write32(flash_read32(src), dst);
970 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200971 break;
972 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100973 flash_write64(flash_read64(src), dst);
974 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200975 break;
976 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100977 retcode = ERR_INVAL;
978 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200979 }
980 }
Mario Six188a5562018-01-26 14:43:31 +0100981 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +0100982 FLASH_CMD_WRITE_BUFFER_CONFIRM);
Mario Six188a5562018-01-26 14:43:31 +0100983 retcode = flash_full_status_check(
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200984 info, sector, info->buffer_write_tout,
985 "buffer write");
986 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100987
988 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200989
990 case CFI_CMDSET_AMD_STANDARD:
991 case CFI_CMDSET_AMD_EXTENDED:
Rouven Behr7570a0c2016-04-10 13:38:13 +0200992 flash_unlock_seq(info, sector);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200993
994#ifdef CONFIG_FLASH_SPANSION_S29WS_N
995 offset = ((unsigned long)dst - info->start[sector]) >> shift;
996#endif
997 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
998 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -0500999 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001000
1001 switch (info->portwidth) {
1002 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001003 while (cnt-- > 0) {
1004 flash_write8(flash_read8(src), dst);
1005 src += 1, dst += 1;
1006 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001007 break;
1008 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001009 while (cnt-- > 0) {
1010 flash_write16(flash_read16(src), dst);
1011 src += 2, dst += 2;
1012 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001013 break;
1014 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001015 while (cnt-- > 0) {
1016 flash_write32(flash_read32(src), dst);
1017 src += 4, dst += 4;
1018 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001019 break;
1020 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001021 while (cnt-- > 0) {
1022 flash_write64(flash_read64(src), dst);
1023 src += 8, dst += 8;
1024 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001025 break;
1026 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001027 retcode = ERR_INVAL;
1028 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001029 }
1030
Mario Six188a5562018-01-26 14:43:31 +01001031 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +08001032 if (use_flash_status_poll(info))
1033 retcode = flash_status_poll(info, src - (1 << shift),
1034 dst - (1 << shift),
1035 info->buffer_write_tout,
1036 "buffer write");
1037 else
1038 retcode = flash_full_status_check(info, sector,
1039 info->buffer_write_tout,
1040 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001041 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001042
1043 default:
Mario Six188a5562018-01-26 14:43:31 +01001044 debug("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001045 retcode = ERR_INVAL;
1046 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001047 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001048
1049out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001050 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001051}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001052#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001053
wdenk7680c142005-05-16 15:23:22 +00001054/*-----------------------------------------------------------------------
1055 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001056int flash_erase(flash_info_t *info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001057{
1058 int rcode = 0;
1059 int prot;
1060 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001061 int st;
wdenk5653fc32004-02-08 22:55:38 +00001062
wdenkbf9e3b32004-02-12 00:47:09 +00001063 if (info->flash_id != FLASH_MAN_CFI) {
Mario Six188a5562018-01-26 14:43:31 +01001064 puts("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001065 return 1;
1066 }
Mario Six4f89da42018-01-26 14:43:42 +01001067 if (s_first < 0 || s_first > s_last) {
Mario Six188a5562018-01-26 14:43:31 +01001068 puts("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001069 return 1;
1070 }
1071
1072 prot = 0;
Mario Six0412e902018-01-26 14:43:38 +01001073 for (sect = s_first; sect <= s_last; ++sect)
1074 if (info->protect[sect])
wdenk5653fc32004-02-08 22:55:38 +00001075 prot++;
wdenk5653fc32004-02-08 22:55:38 +00001076 if (prot) {
Mario Six188a5562018-01-26 14:43:31 +01001077 printf("- Warning: %d protected sectors will not be erased!\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001078 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001079 } else if (flash_verbose) {
Mario Six188a5562018-01-26 14:43:31 +01001080 putc('\n');
wdenk5653fc32004-02-08 22:55:38 +00001081 }
1082
wdenkbf9e3b32004-02-12 00:47:09 +00001083 for (sect = s_first; sect <= s_last; sect++) {
Joe Hershbergerde15a062012-08-17 15:36:41 -05001084 if (ctrlc()) {
1085 printf("\n");
1086 return 1;
1087 }
1088
wdenk5653fc32004-02-08 22:55:38 +00001089 if (info->protect[sect] == 0) { /* not protected */
Joe Hershberger6822a642012-08-17 15:36:40 -05001090#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1091 int k;
1092 int size;
1093 int erased;
1094 u32 *flash;
1095
1096 /*
1097 * Check if whole sector is erased
1098 */
1099 size = flash_sector_size(info, sect);
1100 erased = 1;
1101 flash = (u32 *)info->start[sect];
1102 /* divide by 4 for longword access */
1103 size = size >> 2;
1104 for (k = 0; k < size; k++) {
1105 if (flash_read32(flash++) != 0xffffffff) {
1106 erased = 0;
1107 break;
1108 }
1109 }
1110 if (erased) {
1111 if (flash_verbose)
1112 putc(',');
1113 continue;
1114 }
1115#endif
wdenkbf9e3b32004-02-12 00:47:09 +00001116 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001117 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001118 case CFI_CMDSET_INTEL_STANDARD:
1119 case CFI_CMDSET_INTEL_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +01001120 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001121 FLASH_CMD_CLEAR_STATUS);
Mario Six188a5562018-01-26 14:43:31 +01001122 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001123 FLASH_CMD_BLOCK_ERASE);
Mario Six188a5562018-01-26 14:43:31 +01001124 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001125 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001126 break;
1127 case CFI_CMDSET_AMD_STANDARD:
1128 case CFI_CMDSET_AMD_EXTENDED:
Mario Six188a5562018-01-26 14:43:31 +01001129 flash_unlock_seq(info, sect);
1130 flash_write_cmd(info, sect,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001131 info->addr_unlock1,
1132 AMD_CMD_ERASE_START);
Mario Six188a5562018-01-26 14:43:31 +01001133 flash_unlock_seq(info, sect);
1134 flash_write_cmd(info, sect, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001135 info->cmd_erase_sector);
wdenk5653fc32004-02-08 22:55:38 +00001136 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001137#ifdef CONFIG_FLASH_CFI_LEGACY
1138 case CFI_CMDSET_AMD_LEGACY:
Mario Six188a5562018-01-26 14:43:31 +01001139 flash_unlock_seq(info, 0);
1140 flash_write_cmd(info, 0, info->addr_unlock1,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001141 AMD_CMD_ERASE_START);
Mario Six188a5562018-01-26 14:43:31 +01001142 flash_unlock_seq(info, 0);
1143 flash_write_cmd(info, sect, 0,
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001144 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001145 break;
1146#endif
wdenk5653fc32004-02-08 22:55:38 +00001147 default:
Mario Six9f720212018-01-26 14:43:44 +01001148 debug("Unknown flash vendor %d\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001149 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001150 break;
1151 }
1152
Thomas Choue5720822010-03-26 08:17:00 +08001153 if (use_flash_status_poll(info)) {
Kim Phillips11dc4012012-10-29 13:34:45 +00001154 cfiword_t cword;
Thomas Choue5720822010-03-26 08:17:00 +08001155 void *dest;
Mario Six7223a8c2018-01-26 14:43:37 +01001156
Ryan Harkin622b9522015-10-23 16:50:51 +01001157 cword.w64 = 0xffffffffffffffffULL;
Thomas Choue5720822010-03-26 08:17:00 +08001158 dest = flash_map(info, sect, 0);
1159 st = flash_status_poll(info, &cword, dest,
Mario Sixddcf0542018-01-26 14:43:54 +01001160 info->erase_blk_tout,
1161 "erase");
Thomas Choue5720822010-03-26 08:17:00 +08001162 flash_unmap(info, sect, 0, dest);
Mario Six12d7fed2018-01-26 14:43:43 +01001163 } else {
Thomas Choue5720822010-03-26 08:17:00 +08001164 st = flash_full_status_check(info, sect,
1165 info->erase_blk_tout,
1166 "erase");
Mario Six12d7fed2018-01-26 14:43:43 +01001167 }
1168
Thomas Choue5720822010-03-26 08:17:00 +08001169 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001170 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001171 else if (flash_verbose)
Mario Six188a5562018-01-26 14:43:31 +01001172 putc('.');
wdenk5653fc32004-02-08 22:55:38 +00001173 }
1174 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001175
1176 if (flash_verbose)
Mario Six188a5562018-01-26 14:43:31 +01001177 puts(" done\n");
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001178
wdenk5653fc32004-02-08 22:55:38 +00001179 return rcode;
1180}
1181
Stefan Roese70084df2010-08-13 09:36:36 +02001182#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1183static int sector_erased(flash_info_t *info, int i)
1184{
1185 int k;
1186 int size;
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001187 u32 *flash;
Stefan Roese70084df2010-08-13 09:36:36 +02001188
1189 /*
1190 * Check if whole sector is erased
1191 */
1192 size = flash_sector_size(info, i);
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001193 flash = (u32 *)info->start[i];
Stefan Roese70084df2010-08-13 09:36:36 +02001194 /* divide by 4 for longword access */
1195 size = size >> 2;
1196
1197 for (k = 0; k < size; k++) {
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001198 if (flash_read32(flash++) != 0xffffffff)
Stefan Roese70084df2010-08-13 09:36:36 +02001199 return 0; /* not erased */
1200 }
1201
1202 return 1; /* erased */
1203}
1204#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1205
Mario Sixca2b07a2018-01-26 14:43:32 +01001206void flash_print_info(flash_info_t *info)
wdenk5653fc32004-02-08 22:55:38 +00001207{
1208 int i;
1209
1210 if (info->flash_id != FLASH_MAN_CFI) {
Mario Six188a5562018-01-26 14:43:31 +01001211 puts("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001212 return;
1213 }
1214
Mario Six188a5562018-01-26 14:43:31 +01001215 printf("%s flash (%d x %d)",
Mario Sixc0350fb2018-01-26 14:43:55 +01001216 info->name,
1217 (info->portwidth << 3), (info->chipwidth << 3));
Mario Six640f4e32018-01-26 14:43:36 +01001218 if (info->size < 1024 * 1024)
Mario Six188a5562018-01-26 14:43:31 +01001219 printf(" Size: %ld kB in %d Sectors\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001220 info->size >> 10, info->sector_count);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001221 else
Mario Six188a5562018-01-26 14:43:31 +01001222 printf(" Size: %ld MB in %d Sectors\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001223 info->size >> 20, info->sector_count);
Mario Six188a5562018-01-26 14:43:31 +01001224 printf(" ");
Stefan Roese260421a2006-11-13 13:55:24 +01001225 switch (info->vendor) {
Mario Sixdde09132018-01-26 14:43:35 +01001226 case CFI_CMDSET_INTEL_PROG_REGIONS:
1227 printf("Intel Prog Regions");
1228 break;
1229 case CFI_CMDSET_INTEL_STANDARD:
1230 printf("Intel Standard");
1231 break;
1232 case CFI_CMDSET_INTEL_EXTENDED:
1233 printf("Intel Extended");
1234 break;
1235 case CFI_CMDSET_AMD_STANDARD:
1236 printf("AMD Standard");
1237 break;
1238 case CFI_CMDSET_AMD_EXTENDED:
1239 printf("AMD Extended");
1240 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001241#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Sixdde09132018-01-26 14:43:35 +01001242 case CFI_CMDSET_AMD_LEGACY:
1243 printf("AMD Legacy");
1244 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001245#endif
Mario Sixdde09132018-01-26 14:43:35 +01001246 default:
1247 printf("Unknown (%d)", info->vendor);
1248 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001249 }
Mario Six188a5562018-01-26 14:43:31 +01001250 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
Mario Sixc0350fb2018-01-26 14:43:55 +01001251 info->manufacturer_id);
Mario Six188a5562018-01-26 14:43:31 +01001252 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixc0350fb2018-01-26 14:43:55 +01001253 info->device_id);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001254 if ((info->device_id & 0xff) == 0x7E) {
1255 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixc0350fb2018-01-26 14:43:55 +01001256 info->device_id2);
Stefan Roese260421a2006-11-13 13:55:24 +01001257 }
Mario Six4f89da42018-01-26 14:43:42 +01001258 if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
Stefan Roesed2af0282012-12-06 15:44:12 +01001259 printf("\n Advanced Sector Protection (PPB) enabled");
Mario Six188a5562018-01-26 14:43:31 +01001260 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001261 info->erase_blk_tout, info->write_tout);
Stefan Roese260421a2006-11-13 13:55:24 +01001262 if (info->buffer_size > 1) {
Mario Six876c52f2018-01-26 14:43:50 +01001263 printf(" Buffer write timeout: %ld ms, ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001264 info->buffer_write_tout);
Mario Six876c52f2018-01-26 14:43:50 +01001265 printf("buffer size: %d bytes\n", info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001266 }
wdenk5653fc32004-02-08 22:55:38 +00001267
Mario Six188a5562018-01-26 14:43:31 +01001268 puts("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001269 for (i = 0; i < info->sector_count; ++i) {
Kim Phillips2e973942010-07-26 18:35:39 -05001270 if (ctrlc())
Stefan Roese70084df2010-08-13 09:36:36 +02001271 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001272 if ((i % 5) == 0)
Stefan Roese70084df2010-08-13 09:36:36 +02001273 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001274#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001275 /* print empty and read-only info */
Mario Six188a5562018-01-26 14:43:31 +01001276 printf(" %08lX %c %s ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001277 info->start[i],
1278 sector_erased(info, i) ? 'E' : ' ',
1279 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001280#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Mario Six188a5562018-01-26 14:43:31 +01001281 printf(" %08lX %s ",
Mario Sixc0350fb2018-01-26 14:43:55 +01001282 info->start[i],
1283 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001284#endif
1285 }
Mario Six188a5562018-01-26 14:43:31 +01001286 putc('\n');
wdenk5653fc32004-02-08 22:55:38 +00001287}
1288
1289/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001290 * This is used in a few places in write_buf() to show programming
1291 * progress. Making it a function is nasty because it needs to do side
1292 * effect updates to digit and dots. Repeated code is nasty too, so
1293 * we define it once here.
1294 */
Tom Rini98fbad62022-12-02 16:42:20 -05001295#if CONFIG_FLASH_SHOW_PROGRESS
Stefan Roesef0105722008-03-19 07:09:26 +01001296#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001297 if (flash_verbose) { \
1298 dots -= dots_sub; \
Mario Six4f89da42018-01-26 14:43:42 +01001299 if (scale > 0 && dots <= 0) { \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001300 if ((digit % 5) == 0) \
Mario Six188a5562018-01-26 14:43:31 +01001301 printf("%d", digit / 5); \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001302 else \
Mario Six188a5562018-01-26 14:43:31 +01001303 putc('.'); \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001304 digit--; \
1305 dots += scale; \
1306 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001307 }
Stefan Roesef0105722008-03-19 07:09:26 +01001308#else
1309#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1310#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001311
1312/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001313 * Copy memory to flash, returns:
1314 * 0 - OK
1315 * 1 - write timeout
1316 * 2 - Flash not erased
1317 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001318int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001319{
1320 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001321 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001322 int aln;
1323 cfiword_t cword;
1324 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001325#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001326 int buffered_size;
1327#endif
Tom Rini98fbad62022-12-02 16:42:20 -05001328#if CONFIG_FLASH_SHOW_PROGRESS
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001329 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1330 int scale = 0;
1331 int dots = 0;
1332
1333 /*
1334 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1335 */
1336 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1337 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1338 CONFIG_FLASH_SHOW_PROGRESS);
1339 }
1340#endif
1341
wdenkbf9e3b32004-02-12 00:47:09 +00001342 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001343 wp = (addr & ~(info->portwidth - 1));
1344
1345 /* handle unaligned start */
Mario Sixd3525b62018-01-26 14:43:48 +01001346 aln = addr - wp;
1347 if (aln != 0) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001348 cword.w32 = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001349 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001350 for (i = 0; i < aln; ++i)
Mario Six188a5562018-01-26 14:43:31 +01001351 flash_add_byte(info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001352
wdenkbf9e3b32004-02-12 00:47:09 +00001353 for (; (i < info->portwidth) && (cnt > 0); i++) {
Mario Six188a5562018-01-26 14:43:31 +01001354 flash_add_byte(info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001355 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001356 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001357 for (; (cnt == 0) && (i < info->portwidth); ++i)
Mario Six188a5562018-01-26 14:43:31 +01001358 flash_add_byte(info, &cword, flash_read8(p + i));
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001359
Mario Six188a5562018-01-26 14:43:31 +01001360 rc = flash_write_cfiword(info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001361 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001362 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001363
1364 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001365 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001366 }
1367
wdenkbf9e3b32004-02-12 00:47:09 +00001368 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001369#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001370 buffered_size = (info->portwidth / info->chipwidth);
1371 buffered_size *= info->buffer_size;
1372 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001373 /* prohibit buffer write when buffer_size is 1 */
1374 if (info->buffer_size == 1) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001375 cword.w32 = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01001376 for (i = 0; i < info->portwidth; i++)
Mario Six188a5562018-01-26 14:43:31 +01001377 flash_add_byte(info, &cword, *src++);
Mario Sixd3525b62018-01-26 14:43:48 +01001378 rc = flash_write_cfiword(info, wp, cword);
1379 if (rc != 0)
Stefan Roese79b4cda2006-02-28 15:29:58 +01001380 return rc;
1381 wp += info->portwidth;
1382 cnt -= info->portwidth;
1383 continue;
1384 }
1385
1386 /* write buffer until next buffered_size aligned boundary */
1387 i = buffered_size - (wp % buffered_size);
1388 if (i > cnt)
1389 i = cnt;
Mario Sixd3525b62018-01-26 14:43:48 +01001390 rc = flash_write_cfibuffer(info, wp, src, i);
1391 if (rc != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001392 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001393 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001394 wp += i;
1395 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001396 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001397 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Joe Hershbergerde15a062012-08-17 15:36:41 -05001398 /* Only check every once in a while */
1399 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1400 return ERR_ABORTED;
wdenk5653fc32004-02-08 22:55:38 +00001401 }
1402#else
wdenkbf9e3b32004-02-12 00:47:09 +00001403 while (cnt >= info->portwidth) {
Ryan Harkin622b9522015-10-23 16:50:51 +01001404 cword.w32 = 0;
Mario Six0412e902018-01-26 14:43:38 +01001405 for (i = 0; i < info->portwidth; i++)
Mario Six188a5562018-01-26 14:43:31 +01001406 flash_add_byte(info, &cword, *src++);
Mario Sixd3525b62018-01-26 14:43:48 +01001407 rc = flash_write_cfiword(info, wp, cword);
1408 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001409 return rc;
1410 wp += info->portwidth;
1411 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001412 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
Joe Hershbergerde15a062012-08-17 15:36:41 -05001413 /* Only check every once in a while */
1414 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1415 return ERR_ABORTED;
wdenk5653fc32004-02-08 22:55:38 +00001416 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001417#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001418
Mario Six0412e902018-01-26 14:43:38 +01001419 if (cnt == 0)
wdenk5653fc32004-02-08 22:55:38 +00001420 return (0);
wdenk5653fc32004-02-08 22:55:38 +00001421
1422 /*
1423 * handle unaligned tail bytes
1424 */
Ryan Harkin622b9522015-10-23 16:50:51 +01001425 cword.w32 = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001426 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001427 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
Mario Six188a5562018-01-26 14:43:31 +01001428 flash_add_byte(info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001429 --cnt;
1430 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001431 for (; i < info->portwidth; ++i)
Mario Six188a5562018-01-26 14:43:31 +01001432 flash_add_byte(info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001433
Mario Six188a5562018-01-26 14:43:31 +01001434 return flash_write_cfiword(info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001435}
1436
Stefan Roese20043a42012-12-06 15:44:09 +01001437static inline int manufact_match(flash_info_t *info, u32 manu)
1438{
1439 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1440}
1441
wdenk5653fc32004-02-08 22:55:38 +00001442/*-----------------------------------------------------------------------
1443 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001444#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001445
Holger Brunck81316a92012-08-09 10:22:41 +02001446static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1447{
Mario Six88ecd8b2018-01-26 14:43:39 +01001448 if (manufact_match(info, INTEL_MANUFACT) &&
Mario Sixc0350fb2018-01-26 14:43:55 +01001449 info->device_id == NUMONYX_256MBIT) {
Holger Brunck81316a92012-08-09 10:22:41 +02001450 /*
1451 * see errata called
1452 * "Numonyx Axcell P33/P30 Specification Update" :)
1453 */
1454 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1455 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1456 prot)) {
1457 /*
1458 * cmd must come before FLASH_CMD_PROTECT + 20us
1459 * Disable interrupts which might cause a timeout here.
1460 */
1461 int flag = disable_interrupts();
1462 unsigned short cmd;
1463
1464 if (prot)
1465 cmd = FLASH_CMD_PROTECT_SET;
1466 else
1467 cmd = FLASH_CMD_PROTECT_CLEAR;
Andre Przywara58eab322016-11-16 00:50:06 +00001468
1469 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
Holger Brunck81316a92012-08-09 10:22:41 +02001470 flash_write_cmd(info, sector, 0, cmd);
1471 /* re-enable interrupts if necessary */
1472 if (flag)
1473 enable_interrupts();
1474 }
1475 return 1;
1476 }
1477 return 0;
1478}
1479
Mario Sixca2b07a2018-01-26 14:43:32 +01001480int flash_real_protect(flash_info_t *info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001481{
1482 int retcode = 0;
1483
Rafael Camposbc9019e2008-07-31 10:22:20 +02001484 switch (info->vendor) {
Mario Sixdde09132018-01-26 14:43:35 +01001485 case CFI_CMDSET_INTEL_PROG_REGIONS:
1486 case CFI_CMDSET_INTEL_STANDARD:
1487 case CFI_CMDSET_INTEL_EXTENDED:
1488 if (!cfi_protect_bugfix(info, sector, prot)) {
1489 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001490 FLASH_CMD_CLEAR_STATUS);
Mario Sixdde09132018-01-26 14:43:35 +01001491 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001492 FLASH_CMD_PROTECT);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001493 if (prot)
Mario Sixdde09132018-01-26 14:43:35 +01001494 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001495 FLASH_CMD_PROTECT_SET);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001496 else
Mario Sixdde09132018-01-26 14:43:35 +01001497 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001498 FLASH_CMD_PROTECT_CLEAR);
Mario Sixdde09132018-01-26 14:43:35 +01001499 }
1500 break;
1501 case CFI_CMDSET_AMD_EXTENDED:
1502 case CFI_CMDSET_AMD_STANDARD:
1503 /* U-Boot only checks the first byte */
1504 if (manufact_match(info, ATM_MANUFACT)) {
1505 if (prot) {
1506 flash_unlock_seq(info, 0);
1507 flash_write_cmd(info, 0,
1508 info->addr_unlock1,
1509 ATM_CMD_SOFTLOCK_START);
1510 flash_unlock_seq(info, 0);
1511 flash_write_cmd(info, sector, 0,
1512 ATM_CMD_LOCK_SECT);
1513 } else {
1514 flash_write_cmd(info, 0,
1515 info->addr_unlock1,
1516 AMD_CMD_UNLOCK_START);
1517 if (info->device_id == ATM_ID_BV6416)
1518 flash_write_cmd(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001519 0, ATM_CMD_UNLOCK_SECT);
Mario Sixdde09132018-01-26 14:43:35 +01001520 }
1521 }
1522 if (info->legacy_unlock) {
1523 int flag = disable_interrupts();
1524 int lock_flag;
1525
1526 flash_unlock_seq(info, 0);
1527 flash_write_cmd(info, 0, info->addr_unlock1,
1528 AMD_CMD_SET_PPB_ENTRY);
1529 lock_flag = flash_isset(info, sector, 0, 0x01);
1530 if (prot) {
1531 if (lock_flag) {
1532 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001533 AMD_CMD_PPB_LOCK_BC1);
Mario Sixdde09132018-01-26 14:43:35 +01001534 flash_write_cmd(info, sector, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001535 AMD_CMD_PPB_LOCK_BC2);
Mario Sixdde09132018-01-26 14:43:35 +01001536 }
1537 debug("sector %ld %slocked\n", sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001538 lock_flag ? "" : "already ");
Mario Sixdde09132018-01-26 14:43:35 +01001539 } else {
1540 if (!lock_flag) {
1541 debug("unlock %ld\n", sector);
1542 flash_write_cmd(info, 0, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001543 AMD_CMD_PPB_UNLOCK_BC1);
Mario Sixdde09132018-01-26 14:43:35 +01001544 flash_write_cmd(info, 0, 0,
Mario Sixc0350fb2018-01-26 14:43:55 +01001545 AMD_CMD_PPB_UNLOCK_BC2);
Mario Sixdde09132018-01-26 14:43:35 +01001546 }
1547 debug("sector %ld %sunlocked\n", sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001548 !lock_flag ? "" : "already ");
Mario Sixdde09132018-01-26 14:43:35 +01001549 }
1550 if (flag)
1551 enable_interrupts();
1552
1553 if (flash_status_check(info, sector,
Mario Sixc0350fb2018-01-26 14:43:55 +01001554 info->erase_blk_tout,
1555 prot ? "protect" : "unprotect"))
Mario Sixdde09132018-01-26 14:43:35 +01001556 printf("status check error\n");
1557
1558 flash_write_cmd(info, 0, 0,
1559 AMD_CMD_SET_PPB_EXIT_BC1);
1560 flash_write_cmd(info, 0, 0,
1561 AMD_CMD_SET_PPB_EXIT_BC2);
1562 }
1563 break;
1564#ifdef CONFIG_FLASH_CFI_LEGACY
1565 case CFI_CMDSET_AMD_LEGACY:
1566 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1567 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1568 if (prot)
Mario Sixddcf0542018-01-26 14:43:54 +01001569 flash_write_cmd(info, sector, 0,
1570 FLASH_CMD_PROTECT_SET);
Mario Sixdde09132018-01-26 14:43:35 +01001571 else
Mario Sixddcf0542018-01-26 14:43:54 +01001572 flash_write_cmd(info, sector, 0,
1573 FLASH_CMD_PROTECT_CLEAR);
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001574#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001575 };
wdenk5653fc32004-02-08 22:55:38 +00001576
Stefan Roesedf4e8132010-10-25 18:31:29 +02001577 /*
1578 * Flash needs to be in status register read mode for
1579 * flash_full_status_check() to work correctly
1580 */
1581 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
Mario Sixd3525b62018-01-26 14:43:48 +01001582 retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
Mario Sixc0350fb2018-01-26 14:43:55 +01001583 prot ? "protect" : "unprotect");
Mario Sixd3525b62018-01-26 14:43:48 +01001584 if (retcode == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001585 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001586
1587 /*
1588 * On some of Intel's flash chips (marked via legacy_unlock)
1589 * unprotect unprotects all locking.
1590 */
Mario Six4f89da42018-01-26 14:43:42 +01001591 if (prot == 0 && info->legacy_unlock) {
wdenk5653fc32004-02-08 22:55:38 +00001592 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001593
1594 for (i = 0; i < info->sector_count; i++) {
1595 if (info->protect[i])
Mario Six188a5562018-01-26 14:43:31 +01001596 flash_real_protect(info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001597 }
1598 }
1599 }
wdenk5653fc32004-02-08 22:55:38 +00001600 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001601}
1602
wdenk5653fc32004-02-08 22:55:38 +00001603/*-----------------------------------------------------------------------
1604 * flash_read_user_serial - read the OneTimeProgramming cells
1605 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001606void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixc0350fb2018-01-26 14:43:55 +01001607 int len)
wdenk5653fc32004-02-08 22:55:38 +00001608{
wdenkbf9e3b32004-02-12 00:47:09 +00001609 uchar *src;
1610 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001611
1612 dst = buffer;
Mario Six188a5562018-01-26 14:43:31 +01001613 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1614 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1615 memcpy(dst, src + offset, len);
1616 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001617 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001618 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001619}
wdenkbf9e3b32004-02-12 00:47:09 +00001620
wdenk5653fc32004-02-08 22:55:38 +00001621/*
1622 * flash_read_factory_serial - read the device Id from the protection area
1623 */
Mario Sixca2b07a2018-01-26 14:43:32 +01001624void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixc0350fb2018-01-26 14:43:55 +01001625 int len)
wdenk5653fc32004-02-08 22:55:38 +00001626{
wdenkbf9e3b32004-02-12 00:47:09 +00001627 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001628
Mario Six188a5562018-01-26 14:43:31 +01001629 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1630 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1631 memcpy(buffer, src + offset, len);
1632 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001633 udelay(1);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001634 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001635}
1636
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001637#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001638
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001639/*-----------------------------------------------------------------------
1640 * Reverse the order of the erase regions in the CFI QRY structure.
1641 * This is needed for chips that are either a) correctly detected as
1642 * top-boot, or b) buggy.
1643 */
1644static void cfi_reverse_geometry(struct cfi_qry *qry)
1645{
1646 unsigned int i, j;
1647 u32 tmp;
1648
1649 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
Mario Six4f89da42018-01-26 14:43:42 +01001650 tmp = get_unaligned(&qry->erase_region_info[i]);
1651 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1652 &qry->erase_region_info[i]);
1653 put_unaligned(tmp, &qry->erase_region_info[j]);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001654 }
1655}
wdenk5653fc32004-02-08 22:55:38 +00001656
1657/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001658 * read jedec ids from device and set corresponding fields in info struct
1659 *
1660 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1661 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001662 */
1663static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1664{
1665 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001666 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001667 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1668 udelay(1000); /* some flash are slow to respond */
Mario Six188a5562018-01-26 14:43:31 +01001669 info->manufacturer_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001670 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001671 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
Mario Six188a5562018-01-26 14:43:31 +01001672 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1673 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001674 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1675}
1676
1677static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1678{
1679 info->cmd_reset = FLASH_CMD_RESET;
1680
1681 cmdset_intel_read_jedec_ids(info);
1682 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1683
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001684#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001685 /* read legacy lock/unlock bit from intel flash */
1686 if (info->ext_addr) {
Mario Sixc0350fb2018-01-26 14:43:55 +01001687 info->legacy_unlock =
1688 flash_read_uchar(info, info->ext_addr + 5) & 0x08;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001689 }
1690#endif
1691
1692 return 0;
1693}
1694
1695static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1696{
Mario Sixc8a9a822018-01-26 14:43:51 +01001697 ushort bank_id = 0;
1698 uchar manu_id;
York Sun2544f472017-11-18 11:09:08 -08001699 uchar feature;
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001700
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001701 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1702 flash_unlock_seq(info, 0);
1703 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1704 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001705
Mario Sixc8a9a822018-01-26 14:43:51 +01001706 manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001707 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
Mario Sixc8a9a822018-01-26 14:43:51 +01001708 while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1709 bank_id += 0x100;
1710 manu_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001711 bank_id | FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001712 }
Mario Sixc8a9a822018-01-26 14:43:51 +01001713 info->manufacturer_id = manu_id;
Tor Krill90447ec2008-03-28 11:29:10 +01001714
York Sun2544f472017-11-18 11:09:08 -08001715 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1716 info->ext_addr, info->cfi_version);
1717 if (info->ext_addr && info->cfi_version >= 0x3134) {
1718 /* read software feature (at 0x53) */
1719 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1720 debug("feature = 0x%x\n", feature);
1721 info->sr_supported = feature & 0x1;
1722 }
Marek Vasut72443c72017-09-12 19:09:31 +02001723
Mario Sixb1683862018-01-26 14:43:33 +01001724 switch (info->chipwidth) {
Tor Krill90447ec2008-03-28 11:29:10 +01001725 case FLASH_CFI_8BIT:
Mario Six188a5562018-01-26 14:43:31 +01001726 info->device_id = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001727 FLASH_OFFSET_DEVICE_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001728 if (info->device_id == 0x7E) {
1729 /* AMD 3-byte (expanded) device ids */
Mario Six188a5562018-01-26 14:43:31 +01001730 info->device_id2 = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001731 FLASH_OFFSET_DEVICE_ID2);
Tor Krill90447ec2008-03-28 11:29:10 +01001732 info->device_id2 <<= 8;
Mario Six188a5562018-01-26 14:43:31 +01001733 info->device_id2 |= flash_read_uchar(info,
Tor Krill90447ec2008-03-28 11:29:10 +01001734 FLASH_OFFSET_DEVICE_ID3);
1735 }
1736 break;
1737 case FLASH_CFI_16BIT:
Mario Six188a5562018-01-26 14:43:31 +01001738 info->device_id = flash_read_word(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001739 FLASH_OFFSET_DEVICE_ID);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001740 if ((info->device_id & 0xff) == 0x7E) {
1741 /* AMD 3-byte (expanded) device ids */
Mario Six188a5562018-01-26 14:43:31 +01001742 info->device_id2 = flash_read_uchar(info,
Mario Sixc0350fb2018-01-26 14:43:55 +01001743 FLASH_OFFSET_DEVICE_ID2);
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001744 info->device_id2 <<= 8;
Mario Six188a5562018-01-26 14:43:31 +01001745 info->device_id2 |= flash_read_uchar(info,
Heiko Schocher5b448ad2011-04-11 14:16:19 +02001746 FLASH_OFFSET_DEVICE_ID3);
1747 }
Tor Krill90447ec2008-03-28 11:29:10 +01001748 break;
1749 default:
1750 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001751 }
1752 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001753 udelay(1);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001754}
1755
1756static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1757{
1758 info->cmd_reset = AMD_CMD_RESET;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01001759 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001760
1761 cmdset_amd_read_jedec_ids(info);
1762 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1763
Anatolij Gustschin66863b02012-08-09 08:18:12 +02001764#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roeseac6b9112012-12-06 15:44:11 +01001765 if (info->ext_addr) {
1766 /* read sector protect/unprotect scheme (at 0x49) */
1767 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
Anatolij Gustschin66863b02012-08-09 08:18:12 +02001768 info->legacy_unlock = 1;
1769 }
1770#endif
1771
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001772 return 0;
1773}
1774
1775#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Sixca2b07a2018-01-26 14:43:32 +01001776static void flash_read_jedec_ids(flash_info_t *info)
Stefan Roese260421a2006-11-13 13:55:24 +01001777{
1778 info->manufacturer_id = 0;
1779 info->device_id = 0;
1780 info->device_id2 = 0;
1781
1782 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001783 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001784 case CFI_CMDSET_INTEL_STANDARD:
1785 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001786 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001787 break;
1788 case CFI_CMDSET_AMD_STANDARD:
1789 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001790 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001791 break;
1792 default:
1793 break;
1794 }
1795}
1796
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001797/*-----------------------------------------------------------------------
1798 * Call board code to request info about non-CFI flash.
1799 * board_flash_get_legacy needs to fill in at least:
1800 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1801 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001802static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001803{
1804 flash_info_t *info = &flash_info[banknum];
1805
1806 if (board_flash_get_legacy(base, banknum, info)) {
1807 /* board code may have filled info completely. If not, we
Mario Sixa6d18f22018-01-26 14:43:41 +01001808 * use JEDEC ID probing.
1809 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001810 if (!info->vendor) {
1811 int modes[] = {
1812 CFI_CMDSET_AMD_STANDARD,
1813 CFI_CMDSET_INTEL_STANDARD
1814 };
1815 int i;
1816
Axel Lin31bf0f52013-06-23 00:56:46 +08001817 for (i = 0; i < ARRAY_SIZE(modes); i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001818 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001819 info->start[0] =
1820 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001821 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001822 MAP_NOCACHE);
Mario Six88ecd8b2018-01-26 14:43:39 +01001823 if (info->portwidth == FLASH_CFI_8BIT &&
Mario Sixc0350fb2018-01-26 14:43:55 +01001824 info->interface == FLASH_CFI_X8X16) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001825 info->addr_unlock1 = 0x2AAA;
1826 info->addr_unlock2 = 0x5555;
1827 } else {
1828 info->addr_unlock1 = 0x5555;
1829 info->addr_unlock2 = 0x2AAA;
1830 }
1831 flash_read_jedec_ids(info);
1832 debug("JEDEC PROBE: ID %x %x %x\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001833 info->manufacturer_id,
1834 info->device_id,
1835 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001836 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001837 break;
Mario Six98601372018-01-26 14:43:45 +01001838
1839 unmap_physmem((void *)info->start[0],
1840 info->portwidth);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001841 }
1842 }
1843
Mario Sixb1683862018-01-26 14:43:33 +01001844 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001845 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001846 case CFI_CMDSET_INTEL_STANDARD:
1847 case CFI_CMDSET_INTEL_EXTENDED:
1848 info->cmd_reset = FLASH_CMD_RESET;
1849 break;
1850 case CFI_CMDSET_AMD_STANDARD:
1851 case CFI_CMDSET_AMD_EXTENDED:
1852 case CFI_CMDSET_AMD_LEGACY:
1853 info->cmd_reset = AMD_CMD_RESET;
1854 break;
1855 }
1856 info->flash_id = FLASH_MAN_CFI;
1857 return 1;
1858 }
1859 return 0; /* use CFI */
1860}
1861#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001862static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001863{
1864 return 0; /* use CFI */
1865}
1866#endif
1867
Stefan Roese260421a2006-11-13 13:55:24 +01001868/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001869 * detect if flash is compatible with the Common Flash Interface (CFI)
1870 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001871 */
Mario Sixc0350fb2018-01-26 14:43:55 +01001872static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1873 size_t len)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001874{
1875 u8 *p = buf;
1876 unsigned int i;
1877
1878 for (i = 0; i < len; i++)
Stefan Roesee303be22013-04-12 19:04:54 +02001879 p[i] = flash_read_uchar(info, start + i);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001880}
1881
Kim Phillips11dc4012012-10-29 13:34:45 +00001882static void __flash_cmd_reset(flash_info_t *info)
Stefan Roesefa36ae72009-10-27 15:15:55 +01001883{
1884 /*
1885 * We do not yet know what kind of commandset to use, so we issue
1886 * the reset command in both Intel and AMD variants, in the hope
1887 * that AMD flash roms ignore the Intel command.
1888 */
1889 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsa90b9572011-04-12 00:59:04 -07001890 udelay(1);
Stefan Roesefa36ae72009-10-27 15:15:55 +01001891 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1892}
Mario Six7223a8c2018-01-26 14:43:37 +01001893
Stefan Roesefa36ae72009-10-27 15:15:55 +01001894void flash_cmd_reset(flash_info_t *info)
Mario Six640f4e32018-01-26 14:43:36 +01001895 __attribute__((weak, alias("__flash_cmd_reset")));
Stefan Roesefa36ae72009-10-27 15:15:55 +01001896
Mario Sixca2b07a2018-01-26 14:43:32 +01001897static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001898{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001899 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001900
Stefan Roesee303be22013-04-12 19:04:54 +02001901 /* Issue FLASH reset command */
1902 flash_cmd_reset(info);
1903
Axel Lin31bf0f52013-06-23 00:56:46 +08001904 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001905 cfi_offset++) {
Mario Six188a5562018-01-26 14:43:31 +01001906 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
Mario Sixc0350fb2018-01-26 14:43:55 +01001907 FLASH_CMD_CFI);
Mario Six88ecd8b2018-01-26 14:43:39 +01001908 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
Mario Sixddcf0542018-01-26 14:43:54 +01001909 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1910 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Mario Sixc0350fb2018-01-26 14:43:55 +01001911 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1912 sizeof(struct cfi_qry));
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001913 info->interface = le16_to_cpu(qry->interface_desc);
Jagannadha Sutradharudu Teki53879b12021-02-26 08:51:49 +01001914 /* Some flash chips can support multiple bus widths.
1915 * In this case, override the interface width and
1916 * limit it to the port width.
1917 */
1918 if ((info->interface == FLASH_CFI_X8X16) &&
1919 (info->portwidth == FLASH_CFI_8BIT)) {
1920 debug("Overriding 16-bit interface width to"
1921 " 8-bit port width\n");
1922 info->interface = FLASH_CFI_X8;
1923 } else if ((info->interface == FLASH_CFI_X16X32) &&
1924 (info->portwidth == FLASH_CFI_16BIT)) {
1925 debug("Overriding 16-bit interface width to"
1926 " 16-bit port width\n");
1927 info->interface = FLASH_CFI_X16;
1928 }
Stefan Roesee303be22013-04-12 19:04:54 +02001929
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001930 info->cfi_offset = flash_offset_cfi[cfi_offset];
Mario Six188a5562018-01-26 14:43:31 +01001931 debug("device interface is %d\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001932 info->interface);
Jagannadha Sutradharudu Teki53879b12021-02-26 08:51:49 +01001933 debug("found port %d chip %d chip_lsb %d ",
1934 info->portwidth, info->chipwidth, info->chip_lsb);
Mario Six188a5562018-01-26 14:43:31 +01001935 debug("port %d bits chip %d bits\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01001936 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1937 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001938
1939 /* calculate command offsets as in the Linux driver */
Stefan Roesee303be22013-04-12 19:04:54 +02001940 info->addr_unlock1 = 0x555;
1941 info->addr_unlock2 = 0x2aa;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001942
1943 /*
1944 * modify the unlock address if we are
1945 * in compatibility mode
1946 */
Mario Sixb1683862018-01-26 14:43:33 +01001947 if (/* x8/x16 in x8 mode */
Mario Six4f89da42018-01-26 14:43:42 +01001948 (info->chipwidth == FLASH_CFI_BY8 &&
1949 info->interface == FLASH_CFI_X8X16) ||
Mario Sixb1683862018-01-26 14:43:33 +01001950 /* x16/x32 in x16 mode */
Mario Six4f89da42018-01-26 14:43:42 +01001951 (info->chipwidth == FLASH_CFI_BY16 &&
Mario Six0cec0a12018-01-26 14:43:46 +01001952 info->interface == FLASH_CFI_X16X32)) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001953 info->addr_unlock1 = 0xaaa;
1954 info->addr_unlock2 = 0x555;
1955 }
1956
1957 info->name = "CFI conformant";
1958 return 1;
1959 }
1960 }
1961
1962 return 0;
1963}
1964
Mario Sixca2b07a2018-01-26 14:43:32 +01001965static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001966{
Mario Six188a5562018-01-26 14:43:31 +01001967 debug("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001968
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001969 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001970 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1971 for (info->chipwidth = FLASH_CFI_BY8;
1972 info->chipwidth <= info->portwidth;
Jagannadha Sutradharudu Teki53879b12021-02-26 08:51:49 +01001973 info->chipwidth <<= 1) {
1974 /*
1975 * First, try detection without shifting the addresses
1976 * for 8bit devices (16bit wide connection)
1977 */
1978 info->chip_lsb = 0;
Stefan Roesee303be22013-04-12 19:04:54 +02001979 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001980 return 1;
Jagannadha Sutradharudu Teki53879b12021-02-26 08:51:49 +01001981
1982 /*
1983 * Not detected, so let's try with shifting
1984 * for 8bit devices
1985 */
1986 info->chip_lsb = 1;
1987 if (__flash_detect_cfi(info, qry))
1988 return 1;
1989 }
wdenk5653fc32004-02-08 22:55:38 +00001990 }
Mario Six188a5562018-01-26 14:43:31 +01001991 debug("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001992 return 0;
1993}
wdenkbf9e3b32004-02-12 00:47:09 +00001994
wdenk5653fc32004-02-08 22:55:38 +00001995/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001996 * Manufacturer-specific quirks. Add workarounds for geometry
1997 * reversal, etc. here.
1998 */
1999static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
2000{
2001 /* check if flash geometry needs reversal */
2002 if (qry->num_erase_regions > 1) {
2003 /* reverse geometry if top boot part */
2004 if (info->cfi_version < 0x3131) {
2005 /* CFI < 1.1, try to guess from device id */
2006 if ((info->device_id & 0x80) != 0)
2007 cfi_reverse_geometry(qry);
Stefan Roesee303be22013-04-12 19:04:54 +02002008 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002009 /* CFI >= 1.1, deduct from top/bottom flag */
2010 /* note: ext_addr is valid since cfi_version > 0 */
2011 cfi_reverse_geometry(qry);
2012 }
2013 }
2014}
2015
2016static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
2017{
2018 int reverse_geometry = 0;
2019
2020 /* Check the "top boot" bit in the PRI */
2021 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
2022 reverse_geometry = 1;
2023
2024 /* AT49BV6416(T) list the erase regions in the wrong order.
2025 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01002026 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002027 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002028 if (info->device_id == 0xd6 || info->device_id == 0xd2)
2029 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002030
2031 if (reverse_geometry)
2032 cfi_reverse_geometry(qry);
2033}
2034
Richard Retanubune8eac432009-01-14 08:44:26 -05002035static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2036{
2037 /* check if flash geometry needs reversal */
2038 if (qry->num_erase_regions > 1) {
2039 /* reverse geometry if top boot part */
2040 if (info->cfi_version < 0x3131) {
Mike Frysinger6a011ce2011-04-10 16:06:29 -04002041 /* CFI < 1.1, guess by device id */
2042 if (info->device_id == 0x22CA || /* M29W320DT */
2043 info->device_id == 0x2256 || /* M29W320ET */
2044 info->device_id == 0x22D7) { /* M29W800DT */
Richard Retanubune8eac432009-01-14 08:44:26 -05002045 cfi_reverse_geometry(qry);
2046 }
Mike Frysinger4c2105c2011-05-09 18:33:36 -04002047 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2048 /* CFI >= 1.1, deduct from top/bottom flag */
2049 /* note: ext_addr is valid since cfi_version > 0 */
2050 cfi_reverse_geometry(qry);
Richard Retanubune8eac432009-01-14 08:44:26 -05002051 }
2052 }
2053}
2054
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002055static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2056{
2057 /*
2058 * SST, for many recent nor parallel flashes, says they are
2059 * CFI-conformant. This is not true, since qry struct.
2060 * reports a std. AMD command set (0x0002), while SST allows to
2061 * erase two different sector sizes for the same memory.
2062 * 64KB sector (SST call it block) needs 0x30 to be erased.
2063 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2064 * Since CFI query detect the 4KB number of sectors, users expects
2065 * a sector granularity of 4KB, and it is here set.
2066 */
2067 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2068 info->device_id == 0x5C23) { /* SST39VF3202B */
2069 /* set sector granularity to 4KB */
Mario Six640f4e32018-01-26 14:43:36 +01002070 info->cmd_erase_sector = 0x50;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002071 }
2072}
2073
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302074static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2075{
2076 /*
2077 * The M29EW devices seem to report the CFI information wrong
2078 * when it's in 8 bit mode.
2079 * There's an app note from Numonyx on this issue.
2080 * So adjust the buffer size for M29EW while operating in 8-bit mode
2081 */
Mario Six4f89da42018-01-26 14:43:42 +01002082 if (qry->max_buf_write_size > 0x8 &&
Mario Sixc0350fb2018-01-26 14:43:55 +01002083 info->device_id == 0x7E &&
2084 (info->device_id2 == 0x2201 ||
2085 info->device_id2 == 0x2301 ||
2086 info->device_id2 == 0x2801 ||
2087 info->device_id2 == 0x4801)) {
Mario Six876c52f2018-01-26 14:43:50 +01002088 debug("Adjusted buffer size on Numonyx flash");
2089 debug(" M29EW family in 8 bit mode\n");
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302090 qry->max_buf_write_size = 0x8;
2091 }
2092}
2093
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002094/*
wdenk5653fc32004-02-08 22:55:38 +00002095 * The following code cannot be run from FLASH!
2096 *
2097 */
Mario Six188a5562018-01-26 14:43:31 +01002098ulong flash_get_size(phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00002099{
wdenkbf9e3b32004-02-12 00:47:09 +00002100 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00002101 int i, j;
2102 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06002103 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00002104 unsigned long tmp;
2105 int size_ratio;
2106 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00002107 int erase_region_size;
2108 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002109 struct cfi_qry qry;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002110 unsigned long max_size;
Stefan Roese260421a2006-11-13 13:55:24 +01002111
Kumar Galaf9796902008-05-15 15:13:08 -05002112 memset(&qry, 0, sizeof(qry));
2113
Stefan Roese260421a2006-11-13 13:55:24 +01002114 info->ext_addr = 0;
2115 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002116#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02002117 info->legacy_unlock = 0;
2118#endif
wdenk5653fc32004-02-08 22:55:38 +00002119
Becky Bruce09ce9922009-02-02 16:34:51 -06002120 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00002121
Mario Six188a5562018-01-26 14:43:31 +01002122 if (flash_detect_cfi(info, &qry)) {
Mario Six4f89da42018-01-26 14:43:42 +01002123 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2124 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002125 num_erase_regions = qry.num_erase_regions;
2126
Stefan Roese260421a2006-11-13 13:55:24 +01002127 if (info->ext_addr) {
Mario Six640f4e32018-01-26 14:43:36 +01002128 info->cfi_version = (ushort)flash_read_uchar(info,
Stefan Roesee303be22013-04-12 19:04:54 +02002129 info->ext_addr + 3) << 8;
Mario Six640f4e32018-01-26 14:43:36 +01002130 info->cfi_version |= (ushort)flash_read_uchar(info,
Stefan Roesee303be22013-04-12 19:04:54 +02002131 info->ext_addr + 4);
Stefan Roese260421a2006-11-13 13:55:24 +01002132 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002133
wdenkbf9e3b32004-02-12 00:47:09 +00002134#ifdef DEBUG
Mario Six188a5562018-01-26 14:43:31 +01002135 flash_printqry(&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00002136#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002137
wdenkbf9e3b32004-02-12 00:47:09 +00002138 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002139 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00002140 case CFI_CMDSET_INTEL_STANDARD:
2141 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002142 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00002143 break;
2144 case CFI_CMDSET_AMD_STANDARD:
2145 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002146 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00002147 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002148 default:
2149 printf("CFI: Unknown command set 0x%x\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002150 info->vendor);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002151 /*
2152 * Unfortunately, this means we don't know how
2153 * to get the chip back to Read mode. Might
2154 * as well try an Intel-style reset...
2155 */
2156 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2157 return 0;
wdenk5653fc32004-02-08 22:55:38 +00002158 }
wdenkcd37d9e2004-02-10 00:03:41 +00002159
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002160 /* Do manufacturer-specific fixups */
2161 switch (info->manufacturer_id) {
Mario Schuknecht2c9f48a2011-02-21 13:13:14 +01002162 case 0x0001: /* AMD */
2163 case 0x0037: /* AMIC */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002164 flash_fixup_amd(info, &qry);
2165 break;
2166 case 0x001f:
2167 flash_fixup_atmel(info, &qry);
2168 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05002169 case 0x0020:
2170 flash_fixup_stm(info, &qry);
2171 break;
Angelo Dureghello07b2c5c2012-12-01 01:14:18 +01002172 case 0x00bf: /* SST */
2173 flash_fixup_sst(info, &qry);
2174 break;
Jagannadha Sutradharudu Tekic5023212013-03-01 16:54:26 +05302175 case 0x0089: /* Numonyx */
2176 flash_fixup_num(info, &qry);
2177 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01002178 }
2179
Mario Six188a5562018-01-26 14:43:31 +01002180 debug("manufacturer is %d\n", info->vendor);
2181 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2182 debug("device id is 0x%x\n", info->device_id);
2183 debug("device id2 is 0x%x\n", info->device_id2);
2184 debug("cfi version is 0x%04x\n", info->cfi_version);
Stefan Roese260421a2006-11-13 13:55:24 +01002185
wdenk5653fc32004-02-08 22:55:38 +00002186 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00002187 /* if the chip is x8/x16 reduce the ratio by half */
Mario Six4f89da42018-01-26 14:43:42 +01002188 if (info->interface == FLASH_CFI_X8X16 &&
Mario Sixc0350fb2018-01-26 14:43:55 +01002189 info->chipwidth == FLASH_CFI_BY8) {
wdenkbf9e3b32004-02-12 00:47:09 +00002190 size_ratio >>= 1;
2191 }
Mario Six188a5562018-01-26 14:43:31 +01002192 debug("size_ratio %d port %d bits chip %d bits\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002193 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2194 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002195 info->size = 1 << qry.dev_size;
2196 /* multiply the size by the number of chips */
2197 info->size *= size_ratio;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002198 max_size = cfi_flash_bank_size(banknum);
Nuno Sá43bacbe2023-05-11 13:19:50 +02002199#ifdef CONFIG_CFI_FLASH
2200 if (max_size)
2201 max_size = min((unsigned long)info->addr_size, max_size);
2202 else
2203 max_size = info->addr_size;
2204#endif
Mario Six4f89da42018-01-26 14:43:42 +01002205 if (max_size && info->size > max_size) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002206 debug("[truncated from %ldMiB]", info->size >> 20);
2207 info->size = max_size;
2208 }
Mario Six188a5562018-01-26 14:43:31 +01002209 debug("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00002210 sect_cnt = 0;
2211 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00002212 for (i = 0; i < num_erase_regions; i++) {
2213 if (i > NUM_ERASE_REGIONS) {
Mario Six188a5562018-01-26 14:43:31 +01002214 printf("%d erase regions found, only %d used\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002215 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00002216 break;
2217 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002218
Andrew Gabbasovaedadf12013-05-14 12:27:52 -05002219 tmp = le32_to_cpu(get_unaligned(
Mario Six4f89da42018-01-26 14:43:42 +01002220 &qry.erase_region_info[i]));
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01002221 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002222
2223 erase_region_count = (tmp & 0xffff) + 1;
2224 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00002225 erase_region_size =
2226 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
Mario Sixddcf0542018-01-26 14:43:54 +01002227 debug("erase_region_count = %d ", erase_region_count);
2228 debug("erase_region_size = %d\n", erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00002229 for (j = 0; j < erase_region_count; j++) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02002230 if (sector - base >= info->size)
2231 break;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002232 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002233 printf("ERROR: too many flash sectors\n");
2234 break;
2235 }
Becky Bruce09ce9922009-02-02 16:34:51 -06002236 info->start[sect_cnt] =
2237 (ulong)map_physmem(sector,
2238 info->portwidth,
2239 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00002240 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00002241
2242 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002243 * Only read protection status from
2244 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00002245 */
2246 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002247 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00002248 case CFI_CMDSET_INTEL_EXTENDED:
2249 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roesedf4e8132010-10-25 18:31:29 +02002250 /*
2251 * Set flash to read-id mode. Otherwise
2252 * reading protected status is not
2253 * guaranteed.
2254 */
2255 flash_write_cmd(info, sect_cnt, 0,
2256 FLASH_CMD_READ_ID);
wdenka1191902005-01-09 17:12:27 +00002257 info->protect[sect_cnt] =
Mario Six188a5562018-01-26 14:43:31 +01002258 flash_isset(info, sect_cnt,
Mario Sixc0350fb2018-01-26 14:43:55 +01002259 FLASH_OFFSET_PROTECT,
2260 FLASH_STATUS_PROTECT);
Vasily Khoruzhickedc498c2016-03-20 18:37:10 -07002261 flash_write_cmd(info, sect_cnt, 0,
2262 FLASH_CMD_RESET);
wdenka1191902005-01-09 17:12:27 +00002263 break;
Stefan Roese03deff42012-12-06 15:44:10 +01002264 case CFI_CMDSET_AMD_EXTENDED:
2265 case CFI_CMDSET_AMD_STANDARD:
Stefan Roeseac6b9112012-12-06 15:44:11 +01002266 if (!info->legacy_unlock) {
Stefan Roese03deff42012-12-06 15:44:10 +01002267 /* default: not protected */
2268 info->protect[sect_cnt] = 0;
2269 break;
2270 }
2271
2272 /* Read protection (PPB) from sector */
2273 flash_write_cmd(info, 0, 0,
2274 info->cmd_reset);
2275 flash_unlock_seq(info, 0);
2276 flash_write_cmd(info, 0,
2277 info->addr_unlock1,
Marek Vasut94657482021-04-11 20:47:45 +02002278 AMD_CMD_SET_PPB_ENTRY);
Stefan Roese03deff42012-12-06 15:44:10 +01002279 info->protect[sect_cnt] =
Marek Vasut94657482021-04-11 20:47:45 +02002280 !flash_isset(info, sect_cnt,
2281 0, 0x01);
2282 flash_write_cmd(info, 0, 0,
2283 info->cmd_reset);
Stefan Roese03deff42012-12-06 15:44:10 +01002284 break;
wdenka1191902005-01-09 17:12:27 +00002285 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002286 /* default: not protected */
2287 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00002288 }
2289
wdenk5653fc32004-02-08 22:55:38 +00002290 sect_cnt++;
2291 }
2292 }
2293
2294 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002295 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2296 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002297 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002298 (1 << qry.block_erase_timeout_max);
2299 tmp = (1 << qry.buf_write_timeout_typ) *
2300 (1 << qry.buf_write_timeout_max);
2301
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002302 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002303 info->buffer_write_tout = (tmp + 999) / 1000;
2304 tmp = (1 << qry.word_write_timeout_typ) *
2305 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002306 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002307 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00002308 info->flash_id = FLASH_MAN_CFI;
Mario Six4f89da42018-01-26 14:43:42 +01002309 if (info->interface == FLASH_CFI_X8X16 &&
2310 info->chipwidth == FLASH_CFI_BY8) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002311 /* XXX - Need to test on x8/x16 in parallel. */
2312 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00002313 }
Mike Frysinger22159872008-10-02 01:55:38 -04002314
Mario Six188a5562018-01-26 14:43:31 +01002315 flash_write_cmd(info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00002316 }
2317
wdenkbf9e3b32004-02-12 00:47:09 +00002318 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00002319}
2320
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002321#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002322void flash_set_verbose(uint v)
2323{
2324 flash_verbose = v;
2325}
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002326#endif
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002327
Stefan Roese6f726f92010-10-25 18:31:48 +02002328static void cfi_flash_set_config_reg(u32 base, u16 val)
2329{
2330#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2331 /*
2332 * Only set this config register if really defined
2333 * to a valid value (0xffff is invalid)
2334 */
2335 if (val == 0xffff)
2336 return;
2337
2338 /*
2339 * Set configuration register. Data is "encrypted" in the 16 lower
2340 * address bits.
2341 */
2342 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2343 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2344
2345 /*
2346 * Finally issue reset-command to bring device back to
2347 * read-array mode
2348 */
2349 flash_write16(FLASH_CMD_RESET, (void *)base);
2350#endif
2351}
2352
wdenk5653fc32004-02-08 22:55:38 +00002353/*-----------------------------------------------------------------------
2354 */
Heiko Schocher6ee14162011-04-04 08:10:21 +02002355
Marek Vasut236c49a2017-08-20 17:20:00 +02002356static void flash_protect_default(void)
Heiko Schocher6ee14162011-04-04 08:10:21 +02002357{
Peter Tyser2c519832011-04-13 11:46:56 -05002358#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2359 int i;
2360 struct apl_s {
2361 ulong start;
2362 ulong size;
2363 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2364#endif
2365
Heiko Schocher6ee14162011-04-04 08:10:21 +02002366 /* Monitor protection ON by default */
Vignesh Raghavendrad75eacf2019-10-23 13:30:00 +05302367#if defined(CONFIG_SYS_MONITOR_BASE) && \
Tom Rini65cc0e22022-11-16 13:10:41 -05002368 (CONFIG_SYS_MONITOR_BASE >= CFG_SYS_FLASH_BASE) && \
Heiko Schocher6ee14162011-04-04 08:10:21 +02002369 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2370 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002371 CONFIG_SYS_MONITOR_BASE,
2372 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2373 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002374#endif
2375
2376 /* Environment protection ON by default */
2377#ifdef CONFIG_ENV_IS_IN_FLASH
2378 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002379 CONFIG_ENV_ADDR,
2380 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2381 flash_get_info(CONFIG_ENV_ADDR));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002382#endif
2383
2384 /* Redundant environment protection ON by default */
2385#ifdef CONFIG_ENV_ADDR_REDUND
2386 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002387 CONFIG_ENV_ADDR_REDUND,
2388 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2389 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002390#endif
2391
2392#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Axel Lin31bf0f52013-06-23 00:56:46 +08002393 for (i = 0; i < ARRAY_SIZE(apl); i++) {
Marek Vasut31d34142011-10-21 14:17:05 +00002394 debug("autoprotecting from %08lx to %08lx\n",
Heiko Schocher6ee14162011-04-04 08:10:21 +02002395 apl[i].start, apl[i].start + apl[i].size - 1);
2396 flash_protect(FLAG_PROTECT_SET,
Mario Sixc0350fb2018-01-26 14:43:55 +01002397 apl[i].start,
2398 apl[i].start + apl[i].size - 1,
2399 flash_get_info(apl[i].start));
Heiko Schocher6ee14162011-04-04 08:10:21 +02002400 }
2401#endif
2402}
2403
Mario Six188a5562018-01-26 14:43:31 +01002404unsigned long flash_init(void)
wdenk5653fc32004-02-08 22:55:38 +00002405{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002406 unsigned long size = 0;
2407 int i;
wdenk5653fc32004-02-08 22:55:38 +00002408
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002409#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002410 /* read environment from EEPROM */
2411 char s[64];
Mario Six7223a8c2018-01-26 14:43:37 +01002412
Simon Glass00caae62017-08-03 12:22:12 -06002413 env_get_f("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002414#endif
wdenk5653fc32004-02-08 22:55:38 +00002415
Thomas Chouf1056912015-11-07 14:31:08 +08002416#ifdef CONFIG_CFI_FLASH /* for driver model */
2417 cfi_flash_init_dm();
2418#endif
2419
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002420 /* Init: no FLASHes known */
Patrick Delaunay98150e72022-01-04 14:23:58 +01002421 for (i = 0; i < CFI_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002422 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002423
Stefan Roese6f726f92010-10-25 18:31:48 +02002424 /* Optionally write flash configuration register */
2425 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2426 cfi_flash_config_reg(i));
2427
Stefan Roeseb00e19c2010-08-30 10:11:51 +02002428 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002429 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002430 size += flash_info[i].size;
2431 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002432#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Mario Six876c52f2018-01-26 14:43:50 +01002433 printf("## Unknown flash on Bank %d ", i + 1);
2434 printf("- Size = 0x%08lx = %ld MB\n",
Mario Sixc0350fb2018-01-26 14:43:55 +01002435 flash_info[i].size,
2436 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002437#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002438 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002439#ifdef CONFIG_SYS_FLASH_PROTECTION
Jeroen Hofsteec15df212014-06-17 22:47:31 +02002440 else if (strcmp(s, "yes") == 0) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002441 /*
2442 * Only the U-Boot image and it's environment
2443 * is protected, all other sectors are
2444 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002445 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002446 * and the environment variable "unlock" is
2447 * set to "yes".
2448 */
2449 if (flash_info[i].legacy_unlock) {
2450 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002451
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002452 /*
2453 * Disable legacy_unlock temporarily,
2454 * since flash_real_protect would
2455 * relock all other sectors again
2456 * otherwise.
2457 */
2458 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002459
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002460 /*
2461 * Legacy unlocking (e.g. Intel J3) ->
2462 * unlock only one sector. This will
2463 * unlock all sectors.
2464 */
Mario Six188a5562018-01-26 14:43:31 +01002465 flash_real_protect(&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002466
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002467 flash_info[i].legacy_unlock = 1;
2468
2469 /*
2470 * Manually mark other sectors as
2471 * unlocked (unprotected)
2472 */
2473 for (k = 1; k < flash_info[i].sector_count; k++)
2474 flash_info[i].protect[k] = 0;
2475 } else {
2476 /*
2477 * No legancy unlocking -> unlock all sectors
2478 */
Mario Six188a5562018-01-26 14:43:31 +01002479 flash_protect(FLAG_PROTECT_CLEAR,
Mario Sixc0350fb2018-01-26 14:43:55 +01002480 flash_info[i].start[0],
2481 flash_info[i].start[0]
2482 + flash_info[i].size - 1,
2483 &flash_info[i]);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002484 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002485 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002486#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002487 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002488
Heiko Schocher6ee14162011-04-04 08:10:21 +02002489 flash_protect_default();
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002490#ifdef CONFIG_FLASH_CFI_MTD
2491 cfi_mtd_init();
2492#endif
2493
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002494 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002495}
Thomas Chouf1056912015-11-07 14:31:08 +08002496
2497#ifdef CONFIG_CFI_FLASH /* for driver model */
2498static int cfi_flash_probe(struct udevice *dev)
2499{
Andre Przywara492b9912020-09-24 00:22:04 +01002500 fdt_addr_t addr;
Nuno Sá43bacbe2023-05-11 13:19:50 +02002501 fdt_size_t size;
Andre Przywara492b9912020-09-24 00:22:04 +01002502 int idx;
Thomas Chouf1056912015-11-07 14:31:08 +08002503
Andre Przywara492b9912020-09-24 00:22:04 +01002504 for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) {
Nuno Sá43bacbe2023-05-11 13:19:50 +02002505 addr = dev_read_addr_size_index(dev, idx, &size);
Andre Przywara492b9912020-09-24 00:22:04 +01002506 if (addr == FDT_ADDR_T_NONE)
2507 break;
Mario Six8bfeb332018-03-28 14:38:41 +02002508
Marek Vasut1ec0a372017-09-12 19:09:08 +02002509 flash_info[cfi_flash_num_flash_banks].dev = dev;
2510 flash_info[cfi_flash_num_flash_banks].base = addr;
Nuno Sá43bacbe2023-05-11 13:19:50 +02002511 flash_info[cfi_flash_num_flash_banks].addr_size = size;
Marek Vasut1ec0a372017-09-12 19:09:08 +02002512 cfi_flash_num_flash_banks++;
Thomas Chouf1056912015-11-07 14:31:08 +08002513 }
Marek Vasut1ec0a372017-09-12 19:09:08 +02002514 gd->bd->bi_flashstart = flash_info[0].base;
Thomas Chouf1056912015-11-07 14:31:08 +08002515
2516 return 0;
2517}
2518
2519static const struct udevice_id cfi_flash_ids[] = {
2520 { .compatible = "cfi-flash" },
2521 { .compatible = "jedec-flash" },
2522 {}
2523};
2524
2525U_BOOT_DRIVER(cfi_flash) = {
2526 .name = "cfi_flash",
2527 .id = UCLASS_MTD,
2528 .of_match = cfi_flash_ids,
2529 .probe = cfi_flash_probe,
2530};
2531#endif /* CONFIG_CFI_FLASH */