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Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010014
15/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010020 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010021 };
22
Patrick Delaunaya6743132018-07-09 15:17:19 +020023 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020024 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010025 reg = <0xC0000000 0x40000000>;
26 };
Patrice Chotard21299d32018-04-26 17:13:11 +020027
Patrick Delaunayfe915332019-07-30 19:16:12 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Patrick Delaunay62d620c2019-11-06 16:16:33 +010033 mcuram2: mcuram2@10000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10000000 0x40000>;
36 no-map;
37 };
38
39 vdev0vring0: vdev0vring0@10040000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10040000 0x1000>;
42 no-map;
43 };
44
45 vdev0vring1: vdev0vring1@10041000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10041000 0x1000>;
48 no-map;
49 };
50
51 vdev0buffer: vdev0buffer@10042000 {
52 compatible = "shared-dma-pool";
53 reg = <0x10042000 0x4000>;
54 no-map;
55 };
56
57 mcuram: mcuram@30000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x30000000 0x40000>;
60 no-map;
61 };
62
63 retram: retram@38000000 {
64 compatible = "shared-dma-pool";
65 reg = <0x38000000 0x10000>;
66 no-map;
67 };
68
Patrick Delaunayfe915332019-07-30 19:16:12 +020069 gpu_reserved: gpu@e8000000 {
70 reg = <0xe8000000 0x8000000>;
71 no-map;
72 };
73 };
74
Patrice Chotard23661602019-02-12 16:50:38 +010075 aliases {
76 serial0 = &uart4;
77 };
78
Patrice Chotard21299d32018-04-26 17:13:11 +020079 sd_switch: regulator-sd_switch {
80 compatible = "regulator-gpio";
81 regulator-name = "sd_switch";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <2900000>;
84 regulator-type = "voltage";
85 regulator-always-on;
86
87 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
88 gpios-states = <0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +010089 states = <1800000 0x1>,
90 <2900000 0x0>;
91 };
92};
93
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +010094&adc {
95 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
96 pinctrl-0 = <&adc1_in6_pins_a>;
97 pinctrl-names = "default";
98 vdd-supply = <&vdd>;
99 vdda-supply = <&vdda>;
100 vref-supply = <&vdda>;
101 status = "disabled";
102 adc1: adc@0 {
103 st,adc-channels = <0 1 6>;
104 /* 16.5 ck_cycles sampling time */
105 st,min-sample-time-nsecs = <400>;
106 status = "okay";
107 };
108};
109
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100110&dac {
111 pinctrl-names = "default";
112 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
113 vref-supply = <&vdda>;
114 status = "disabled";
115 dac1: dac@1 {
116 status = "okay";
117 };
118 dac2: dac@2 {
119 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200120 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100121};
122
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200123&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100124 status = "okay";
125};
126
Patrick Delaunayfe915332019-07-30 19:16:12 +0200127&gpu {
128 contiguous-area = <&gpu_reserved>;
129 status = "okay";
130};
131
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100132&i2c4 {
133 pinctrl-names = "default";
134 pinctrl-0 = <&i2c4_pins_a>;
135 i2c-scl-rising-time-ns = <185>;
136 i2c-scl-falling-time-ns = <20>;
137 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200138 /* spare dmas for other usage */
139 /delete-property/dmas;
140 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100141
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200142 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100143 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100144 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200145 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100146 interrupt-controller;
147 #interrupt-cells = <2>;
148 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200149
Patrice Chotard21299d32018-04-26 17:13:11 +0200150 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100151 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200152 ldo1-supply = <&v3v3>;
153 ldo2-supply = <&v3v3>;
154 ldo3-supply = <&vdd_ddr>;
155 ldo5-supply = <&v3v3>;
156 ldo6-supply = <&v3v3>;
157 pwr_sw1-supply = <&bst_out>;
158 pwr_sw2-supply = <&bst_out>;
159
160 vddcore: buck1 {
161 regulator-name = "vddcore";
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100162 regulator-min-microvolt = <1200000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200163 regulator-max-microvolt = <1350000>;
164 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200165 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200166 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200167 };
168
169 vdd_ddr: buck2 {
170 regulator-name = "vdd_ddr";
171 regulator-min-microvolt = <1350000>;
172 regulator-max-microvolt = <1350000>;
173 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200174 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200175 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200176 };
177
178 vdd: buck3 {
179 regulator-name = "vdd";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200183 st,mask-reset;
184 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200185 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200186 };
187
188 v3v3: buck4 {
189 regulator-name = "v3v3";
190 regulator-min-microvolt = <3300000>;
191 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200192 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200193 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200194 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200195 };
196
197 vdda: ldo1 {
198 regulator-name = "vdda";
199 regulator-min-microvolt = <2900000>;
200 regulator-max-microvolt = <2900000>;
201 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200202 };
203
204 v2v8: ldo2 {
205 regulator-name = "v2v8";
206 regulator-min-microvolt = <2800000>;
207 regulator-max-microvolt = <2800000>;
208 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200209 };
210
211 vtt_ddr: ldo3 {
212 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200213 regulator-min-microvolt = <500000>;
214 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200215 regulator-always-on;
216 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200217 };
218
219 vdd_usb: ldo4 {
220 regulator-name = "vdd_usb";
221 regulator-min-microvolt = <3300000>;
222 regulator-max-microvolt = <3300000>;
223 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200224 };
225
226 vdd_sd: ldo5 {
227 regulator-name = "vdd_sd";
228 regulator-min-microvolt = <2900000>;
229 regulator-max-microvolt = <2900000>;
230 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200231 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200232 };
233
234 v1v8: ldo6 {
235 regulator-name = "v1v8";
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <1800000>;
238 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200239 };
240
241 vref_ddr: vref_ddr {
242 regulator-name = "vref_ddr";
243 regulator-always-on;
244 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200245 };
246
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100247 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200248 regulator-name = "bst_out";
249 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100250 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200251
252 vbus_otg: pwr_sw1 {
253 regulator-name = "vbus_otg";
254 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200255 };
256
257 vbus_sw: pwr_sw2 {
258 regulator-name = "vbus_sw";
259 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100260 regulator-active-discharge = <1>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200261 };
262 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200263
264 onkey {
265 compatible = "st,stpmic1-onkey";
266 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
267 interrupt-names = "onkey-falling", "onkey-rising";
268 power-off-time-sec = <10>;
269 status = "okay";
270 };
271
272 watchdog {
273 compatible = "st,stpmic1-wdt";
274 status = "disabled";
275 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100276 };
277};
278
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200279&ipcc {
280 status = "okay";
281};
282
Patrice Chotard23661602019-02-12 16:50:38 +0100283&iwdg2 {
284 timeout-sec = <32>;
285 status = "okay";
286};
287
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200288&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100289 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
290 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200291 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
292 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100293 interrupt-parent = <&exti>;
294 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200295 status = "okay";
296};
297
Patrick Delaunay7915b992020-01-28 10:10:59 +0100298&pwr_regulators {
299 vdd-supply = <&vdd>;
300 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200301};
302
Patrice Chotard23661602019-02-12 16:50:38 +0100303&rng1 {
304 status = "okay";
305};
306
307&rtc {
308 status = "okay";
309};
310
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100311&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200312 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100313 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200314 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
315 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100316 broken-cd;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100317 st,sig-dir;
318 st,neg-edge;
319 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100320 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200321 vmmc-supply = <&vdd_sd>;
322 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100323 status = "okay";
324};
325
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100326&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100327 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100328 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100329 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
330 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100331 non-removable;
332 no-sd;
333 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100334 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100335 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200336 vmmc-supply = <&v3v3>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100337 vqmmc-supply = <&v3v3>;
338 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100339 status = "okay";
340};
341
Patrice Chotard23661602019-02-12 16:50:38 +0100342&timers6 {
343 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200344 /* spare dmas for other usage */
345 /delete-property/dmas;
346 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100347 timer@5 {
348 status = "okay";
349 };
350};
351
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100352&uart4 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&uart4_pins_a>;
355 status = "okay";
356};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200357
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200358&usbotg_hs {
359 vbus-supply = <&vbus_otg>;
360};
361
Patrick Delaunaya6743132018-07-09 15:17:19 +0200362&usbphyc_port0 {
363 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200364};
365
366&usbphyc_port1 {
367 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200368};