blob: b678ec41318ea89ebcbe79a474ff24204d7cbe5d [file] [log] [blame]
Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020011 select TPL_NEEDS_SEPARATE_STACK if TPL
12 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -060013 select SPL_SERIAL
14 select TPL_SERIAL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020015 select DEBUG_UART_BOARD_INIT
16 imply ROCKCHIP_COMMON_BOARD
17 imply SPL_ROCKCHIP_COMMON_BOARD
18 help
19 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
20 including NEON and GPU, Mali-400 graphics, several DDR3 options
21 and video codec support. Peripherals include Gigabit Ethernet,
22 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
23
Heiko Stübner041cdb52016-07-16 00:17:15 +020024config ROCKCHIP_RK3036
25 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053026 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080027 select SUPPORT_SPL
28 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +080029 imply USB_FUNCTION_ROCKUSB
30 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080031 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020032 help
33 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
34 including NEON and GPU, Mali-400 graphics, several DDR3 options
35 and video codec support. Peripherals include Gigabit Ethernet,
36 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
37
Johan Jonker33f47502022-04-16 17:09:47 +020038config ROCKCHIP_RK3066
39 bool "Support Rockchip RK3066"
40 select CPU_V7A
41 select SPL_BOARD_INIT if SPL
42 select SUPPORT_SPL
43 select SUPPORT_TPL
44 select SPL
45 select TPL
46 select TPL_ROCKCHIP_BACK_TO_BROM
47 select TPL_ROCKCHIP_EARLYRETURN_TO_BROM
48 imply ROCKCHIP_COMMON_BOARD
49 imply SPL_ROCKCHIP_COMMON_BOARD
50 imply SPL_SERIAL
51 imply TPL_ROCKCHIP_COMMON_BOARD
52 imply TPL_SERIAL
53 help
54 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
55 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
56 video interfaces, several memory options and video codec support.
57 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
58 UART, SPI, I2C and PWMs.
59
Kever Yangdaeed1d2017-11-28 16:04:16 +080060config ROCKCHIP_RK3128
61 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053062 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080064 help
65 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
66 including NEON and GPU, Mali-400 graphics, several DDR3 options
67 and video codec support. Peripherals include Gigabit Ethernet,
68 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
69
Heiko Stübner0a2be692017-02-18 19:46:36 +010070config ROCKCHIP_RK3188
71 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053072 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080073 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010074 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010075 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020076 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020077 select SPL_REGMAP
78 select SPL_SYSCON
79 select SPL_RAM
Simon Glass9ca00682021-07-10 21:14:31 -060080 select SPL_DRIVERS_MISC
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020081 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080082 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020083 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080084 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080085 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010086 help
87 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
88 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
89 video interfaces, several memory options and video codec support.
90 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
91 UART, SPI, I2C and PWMs.
92
Kever Yang168eef72017-06-23 17:17:52 +080093config ROCKCHIP_RK322X
94 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053095 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080096 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080097 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080098 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080099 select SPL_DM
100 select SPL_OF_LIBFDT
101 select TPL
102 select TPL_DM
103 select TPL_OF_LIBFDT
Kever Yangc34643e2019-04-02 20:41:24 +0800104 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass9ca00682021-07-10 21:14:31 -0600105 select SPL_DRIVERS_MISC
Kever Yangcca3b092019-07-22 20:02:07 +0800106 imply ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600107 imply SPL_SERIAL
Kever Yang0cd65e42019-07-22 19:59:20 +0800108 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600109 imply TPL_SERIAL
Kever Yang6ae28a32019-07-09 22:05:56 +0800110 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +0800111 select TPL_LIBCOMMON_SUPPORT
112 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +0800113 help
114 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
115 including NEON and GPU, Mali-400 graphics, several DDR3 options
116 and video codec support. Peripherals include Gigabit Ethernet,
117 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
118
Simon Glass2444dae2015-08-30 16:55:38 -0600119config ROCKCHIP_RK3288
120 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530121 select CPU_V7A
Jagan Tekieab5c502020-07-21 12:16:38 +0530122 select OF_BOARD_SETUP
Tom Rinia2ac2b92021-08-27 21:18:30 -0400123 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yanga381bcf2016-07-19 21:16:59 +0800124 select SUPPORT_SPL
125 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +0800126 select SUPPORT_TPL
Jagan Teki38070172020-01-23 19:42:19 +0530127 imply PRE_CONSOLE_BUFFER
Kever Yangde57a9f2019-07-22 20:02:15 +0800128 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +0800129 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800130 imply TPL_CLK
131 imply TPL_DM
Simon Glass9ca00682021-07-10 21:14:31 -0600132 imply TPL_DRIVERS_MISC
Kever Yangd18ca742019-07-02 11:43:05 +0800133 imply TPL_LIBCOMMON_SUPPORT
134 imply TPL_LIBGENERIC_SUPPORT
Kever Yang45290842019-07-02 11:43:06 +0800135 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +0800136 imply TPL_OF_CONTROL
137 imply TPL_OF_PLATDATA
138 imply TPL_RAM
139 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +0800140 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600141 imply TPL_SERIAL
Kever Yangd18ca742019-07-02 11:43:05 +0800142 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +0800143 imply USB_FUNCTION_ROCKUSB
144 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600145 help
146 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
147 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
148 video interfaces supporting HDMI and eDP, several DDR3 options
149 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100150 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600151
Andy Yanf1a22522019-11-14 11:21:12 +0800152config ROCKCHIP_RK3308
153 bool "Support Rockchip RK3308"
154 select ARM64
155 select DEBUG_UART_BOARD_INIT
156 select SUPPORT_SPL
157 select SUPPORT_TPL
158 select SPL
159 select SPL_ATF
160 select SPL_ATF_NO_PLATFORM_PARAM
161 select SPL_LOAD_FIT
162 imply ROCKCHIP_COMMON_BOARD
163 imply SPL_ROCKCHIP_COMMON_BOARD
164 imply SPL_CLK
165 imply SPL_REGMAP
166 imply SPL_SYSCON
167 imply SPL_RAM
Simon Glass2a736062021-08-08 12:20:12 -0600168 imply SPL_SERIAL
169 imply TPL_SERIAL
Andy Yanf1a22522019-11-14 11:21:12 +0800170 imply SPL_SEPARATE_BSS
171 help
172 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
173 Cortex-A35 and highly integrated audio interfaces.
174
Kever Yang85a3cfb2017-02-23 15:37:51 +0800175config ROCKCHIP_RK3328
176 bool "Support Rockchip RK3328"
177 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300178 select SUPPORT_SPL
179 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300180 select SUPPORT_TPL
181 select TPL
Kever Yang3f47db02019-08-02 10:40:01 +0300182 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800183 imply ROCKCHIP_COMMON_BOARD
YouMin Chenca93e322019-11-15 11:04:44 +0800184 imply ROCKCHIP_SDRAM_COMMON
Kever Yang9cc67042019-07-22 19:59:32 +0800185 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600186 imply SPL_SERIAL
187 imply TPL_SERIAL
Kever Yangc009aeb2019-06-09 00:27:15 +0300188 imply SPL_SEPARATE_BSS
189 select ENABLE_ARM_SOC_BOOT0_HOOK
190 select DEBUG_UART_BOARD_INIT
191 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800192 help
193 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
194 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
195 video interfaces supporting HDMI and eDP, several DDR3 options
196 and video codec support. Peripherals include Gigabit Ethernet,
197 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
198
Andreas Färber37a0c602017-05-15 17:51:18 +0800199config ROCKCHIP_RK3368
200 bool "Support Rockchip RK3368"
201 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200202 select SUPPORT_SPL
203 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200204 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800205 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800206 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200207 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600208 imply SPL_SERIAL
209 imply TPL_SERIAL
Kever Yang82560cb2019-07-09 22:05:58 +0800210 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800211 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200212 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
213 into a big and little cluster with 4 cores each) Cortex-A53 including
214 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
215 (for the little cluster), PowerVR G6110 based graphics, one video
216 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
217 video codec support.
218
219 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
220 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800221
Kever Yanga381bcf2016-07-19 21:16:59 +0800222config ROCKCHIP_RK3399
223 bool "Support Rockchip RK3399"
224 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800225 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800226 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800227 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530228 select SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530229 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530230 select SPL_LOAD_FIT
231 select SPL_CLK if SPL
232 select SPL_PINCTRL if SPL
233 select SPL_RAM if SPL
234 select SPL_REGMAP if SPL
235 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800236 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800237 select SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600238 select SPL_SERIAL
Simon Glass9ca00682021-07-10 21:14:31 -0600239 select SPL_DRIVERS_MISC
Jagan Teki2666bd42019-05-08 11:11:43 +0530240 select CLK
241 select FIT
242 select PINCTRL
243 select RAM
244 select REGMAP
245 select SYSCON
246 select DM_PMIC
247 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800248 select BOARD_LATE_INIT
Sughosh Ganubea92672022-11-10 14:49:15 +0530249 imply PARTITION_TYPE_GUID
Jagan Teki61853a72020-04-02 17:11:23 +0530250 imply PRE_CONSOLE_BUFFER
Kever Yang920b0132019-07-22 20:02:19 +0800251 imply ROCKCHIP_COMMON_BOARD
YouMin Chena922d0d2019-11-15 11:04:45 +0800252 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Baker46a86062020-06-16 00:30:47 +0100253 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangb7abef22019-07-22 19:59:42 +0800254 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600255 imply TPL_SERIAL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800256 imply TPL_LIBCOMMON_SUPPORT
257 imply TPL_LIBGENERIC_SUPPORT
258 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass9ca00682021-07-10 21:14:31 -0600259 imply TPL_DRIVERS_MISC
Kever Yang6bbf5e12018-11-09 11:18:15 +0800260 imply TPL_OF_CONTROL
261 imply TPL_DM
262 imply TPL_REGMAP
263 imply TPL_SYSCON
264 imply TPL_RAM
265 imply TPL_CLK
266 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800267 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekiefebc8e2020-01-09 14:22:19 +0530268 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
269 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yanga381bcf2016-07-19 21:16:59 +0800270 help
271 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
272 and quad-core Cortex-A53.
273 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
274 video interfaces supporting HDMI and eDP, several DDR3 options
275 and video codec support. Peripherals include Gigabit Ethernet,
276 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
277
Joseph Chen2a950e32021-06-02 15:58:25 +0800278config ROCKCHIP_RK3568
279 bool "Support Rockchip RK3568"
280 select ARM64
Nico Chengdaec31e2021-10-26 10:42:19 +0800281 select SUPPORT_SPL
282 select SPL
Joseph Chen2a950e32021-06-02 15:58:25 +0800283 select CLK
284 select PINCTRL
285 select RAM
286 select REGMAP
287 select SYSCON
288 select BOARD_LATE_INIT
289 imply ROCKCHIP_COMMON_BOARD
290 help
291 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
292 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
293 two video interfaces supporting HDMI and eDP, several DDR3 options
294 and video codec support. Peripherals include Gigabit Ethernet,
295 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
296
Andy Yan2c1e11d2017-06-01 18:00:55 +0800297config ROCKCHIP_RV1108
298 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530299 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800300 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800301 help
302 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
303 and a DSP.
304
Jagan Tekiffb191e2022-12-14 23:21:05 +0530305config ROCKCHIP_RV1126
306 bool "Support Rockchip RV1126"
307 select CPU_V7A
308 select SKIP_LOWLEVEL_INIT_ONLY
309 select TPL
310 select SUPPORT_TPL
311 select TPL_NEEDS_SEPARATE_STACK
312 select TPL_ROCKCHIP_BACK_TO_BROM
313 select SPL
314 select SUPPORT_SPL
315 select SPL_STACK_R
316 select CLK
317 select FIT
318 select PINCTRL
319 select RAM
320 select ROCKCHIP_SDRAM_COMMON
321 select REGMAP
322 select SYSCON
323 select DM_PMIC
324 select DM_REGULATOR_FIXED
325 select DM_RESET
326 select REGULATOR_RK8XX
327 select PMIC_RK8XX
328 select BOARD_LATE_INIT
329 imply ROCKCHIP_COMMON_BOARD
330 imply TPL_DM
331 imply TPL_LIBCOMMON_SUPPORT
332 imply TPL_LIBGENERIC_SUPPORT
333 imply TPL_OF_CONTROL
334 imply TPL_OF_PLATDATA
335 imply TPL_RAM
336 imply TPL_ROCKCHIP_COMMON_BOARD
337 imply TPL_SERIAL
338 imply SPL_CLK
339 imply SPL_DM
340 imply SPL_DRIVERS_MISC
341 imply SPL_LIBCOMMON_SUPPORT
342 imply SPL_LIBGENERIC_SUPPORT
343 imply SPL_OF_CONTROL
344 imply SPL_RAM
345 imply SPL_REGMAP
346 imply SPL_ROCKCHIP_COMMON_BOARD
347 imply SPL_SERIAL
348 imply SPL_SYSCON
349
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200350config ROCKCHIP_USB_UART
351 bool "Route uart output to usb pins"
352 help
353 Rockchip SoCs have the ability to route the signals of the debug
354 uart through the d+ and d- pins of a specific usb phy to enable
355 some form of closed-case debugging. With this option supported
356 SoCs will enable this routing as a debug measure.
357
Philipp Tomsichee14d292017-06-29 11:21:15 +0200358config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800359 bool "SPL returns to bootrom"
360 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100361 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800362 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200363 depends on SPL
364 help
365 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
366 SPL will return to the boot rom, which will then load the U-Boot
367 binary to keep going on.
368
369config TPL_ROCKCHIP_BACK_TO_BROM
370 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800371 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200372 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800373 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200374 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800375 help
376 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
377 SPL will return to the boot rom, which will then load the U-Boot
378 binary to keep going on.
379
Kever Yang54f17fa2019-07-22 20:02:01 +0800380config ROCKCHIP_COMMON_BOARD
381 bool "Rockchip common board file"
382 help
383 Rockchip SoCs have similar boot process, Common board file is mainly
384 in charge of common process of board_init() and board_late_init() for
385 U-Boot proper.
386
Kever Yang49105fb2019-07-22 19:59:12 +0800387config SPL_ROCKCHIP_COMMON_BOARD
388 bool "Rockchip SPL common board file"
389 depends on SPL
390 help
391 Rockchip SoCs have similar boot process, SPL is mainly in charge of
392 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
393 no TPL for the board.
394
Kever Yang18f85082019-07-09 22:05:55 +0800395config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbd4e41872019-12-20 18:05:22 -0800396 bool "Rockchip TPL common board file"
Kever Yang18f85082019-07-09 22:05:55 +0800397 depends on TPL
398 help
399 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
400 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
401 common board is a basic TPL board init which can be shared for most
Thomas Hebb32f2ca22019-11-13 18:18:03 -0800402 of SoCs to avoid copy-paste for different SoCs.
Kever Yang18f85082019-07-09 22:05:55 +0800403
Andy Yane3067792017-10-11 15:00:16 +0800404config ROCKCHIP_BOOT_MODE_REG
405 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800406 help
Kever Yang15f09a12019-03-28 11:01:23 +0800407 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800408 according to the value from this register.
409
Chris Morgan30975fb2022-05-27 13:18:20 -0500410config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON
411 bool "Disable device boot on power plug-in"
412 depends on PMIC_RK8XX
413 default n
414 ---help---
415 Say Y here to prevent the device from booting up because of a plug-in
416 event. When set, the device will boot briefly to determine why it was
417 powered on, and if it was determined because of a plug-in event
418 instead of a button press event it will shut back off.
419
Johan Jonker54562042022-04-09 18:55:02 +0200420config ROCKCHIP_STIMER
421 bool "Rockchip STIMER support"
422 default y
423 help
424 Enable Rockchip STIMER support.
425
426config ROCKCHIP_STIMER_BASE
427 hex
428 depends on ROCKCHIP_STIMER
429
Kever Yangfa1392a2017-04-20 17:03:46 +0800430config ROCKCHIP_SPL_RESERVE_IRAM
431 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800432 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800433 help
434 SPL may need reserve memory for firmware loaded by SPL, whose load
435 address is in IRAM and may overlay with SPL text area if not
436 reserved.
437
Heiko Stübner1d845942017-02-18 19:46:25 +0100438config ROCKCHIP_BROM_HELPER
439 bool
440
Philipp Tomsichb377d222017-10-10 16:21:10 +0200441config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
442 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
443 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
444 help
445 Some Rockchip BROM variants (e.g. on the RK3188) load the
446 first stage in segments and enter multiple times. E.g. on
447 the RK3188, the first 1KB of the first stage are loaded
448 first and entered; after returning to the BROM, the
449 remainder of the first stage is loaded, but the BROM
450 re-enters at the same address/to the same code as previously.
451
452 This enables support code in the BOOT0 hook for the SPL stage
453 to allow multiple entries.
454
455config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
456 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
457 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
458 help
459 Some Rockchip BROM variants (e.g. on the RK3188) load the
460 first stage in segments and enter multiple times. E.g. on
461 the RK3188, the first 1KB of the first stage are loaded
462 first and entered; after returning to the BROM, the
463 remainder of the first stage is loaded, but the BROM
464 re-enters at the same address/to the same code as previously.
465
466 This enables support code in the BOOT0 hook for the TPL stage
467 to allow multiple entries.
468
Simon Glass103c5f12021-08-08 12:20:09 -0600469config SPL_MMC
Philipp Tomsichee14d292017-06-29 11:21:15 +0200470 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400471
Simon Glass9b312e22020-07-19 13:55:57 -0600472config ROCKCHIP_SPI_IMAGE
473 bool "Build a SPI image for rockchip"
Simon Glass9b312e22020-07-19 13:55:57 -0600474 help
475 Some Rockchip SoCs support booting from SPI flash. Enable this
Quentin Schulza4bb36d2022-09-02 15:10:54 +0200476 option to produce a SPI-flash image containing U-Boot. The image
477 is built by binman. U-Boot sits near the start of the image.
Simon Glass9b312e22020-07-19 13:55:57 -0600478
Alper Nebi Yasakb42297b2022-01-29 18:27:56 +0300479config LNX_KRNL_IMG_TEXT_OFFSET_BASE
Simon Glass98463902022-10-20 18:22:39 -0600480 default TEXT_BASE
Alper Nebi Yasakb42297b2022-01-29 18:27:56 +0300481
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +0200482source "arch/arm/mach-rockchip/px30/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +0800483source "arch/arm/mach-rockchip/rk3036/Kconfig"
Johan Jonker33f47502022-04-16 17:09:47 +0200484source "arch/arm/mach-rockchip/rk3066/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800485source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100486source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800487source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200488source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanf1a22522019-11-14 11:21:12 +0800489source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800490source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800491source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800492source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen695693b2021-06-02 16:13:46 +0800493source "arch/arm/mach-rockchip/rk3568/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800494source "arch/arm/mach-rockchip/rv1108/Kconfig"
Jagan Tekiffb191e2022-12-14 23:21:05 +0530495source "arch/arm/mach-rockchip/rv1126/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600496endif