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Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010014
15/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010020 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010021 };
22
Patrick Delaunaya6743132018-07-09 15:17:19 +020023 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020024 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010025 reg = <0xC0000000 0x40000000>;
26 };
Patrice Chotard21299d32018-04-26 17:13:11 +020027
Patrick Delaunayfe915332019-07-30 19:16:12 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Patrick Delaunay62d620c2019-11-06 16:16:33 +010033 mcuram2: mcuram2@10000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10000000 0x40000>;
36 no-map;
37 };
38
39 vdev0vring0: vdev0vring0@10040000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10040000 0x1000>;
42 no-map;
43 };
44
45 vdev0vring1: vdev0vring1@10041000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10041000 0x1000>;
48 no-map;
49 };
50
51 vdev0buffer: vdev0buffer@10042000 {
52 compatible = "shared-dma-pool";
53 reg = <0x10042000 0x4000>;
54 no-map;
55 };
56
57 mcuram: mcuram@30000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x30000000 0x40000>;
60 no-map;
61 };
62
63 retram: retram@38000000 {
64 compatible = "shared-dma-pool";
65 reg = <0x38000000 0x10000>;
66 no-map;
67 };
68
Patrick Delaunayfe915332019-07-30 19:16:12 +020069 gpu_reserved: gpu@e8000000 {
70 reg = <0xe8000000 0x8000000>;
71 no-map;
72 };
Patrick Delaunay4a1b9752020-03-18 09:22:48 +010073
74 optee@fe000000 {
75 reg = <0xfe000000 0x02000000>;
76 no-map;
77 };
Patrick Delaunayfe915332019-07-30 19:16:12 +020078 };
79
Patrice Chotard23661602019-02-12 16:50:38 +010080 aliases {
81 serial0 = &uart4;
82 };
83
Patrice Chotard21299d32018-04-26 17:13:11 +020084 sd_switch: regulator-sd_switch {
85 compatible = "regulator-gpio";
86 regulator-name = "sd_switch";
87 regulator-min-microvolt = <1800000>;
88 regulator-max-microvolt = <2900000>;
89 regulator-type = "voltage";
90 regulator-always-on;
91
92 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
93 gpios-states = <0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +010094 states = <1800000 0x1>,
95 <2900000 0x0>;
96 };
97};
98
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +010099&adc {
100 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
101 pinctrl-0 = <&adc1_in6_pins_a>;
102 pinctrl-names = "default";
103 vdd-supply = <&vdd>;
104 vdda-supply = <&vdda>;
105 vref-supply = <&vdda>;
106 status = "disabled";
107 adc1: adc@0 {
108 st,adc-channels = <0 1 6>;
109 /* 16.5 ck_cycles sampling time */
110 st,min-sample-time-nsecs = <400>;
111 status = "okay";
112 };
113};
114
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100115&dac {
116 pinctrl-names = "default";
117 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
118 vref-supply = <&vdda>;
119 status = "disabled";
120 dac1: dac@1 {
121 status = "okay";
122 };
123 dac2: dac@2 {
124 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200125 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100126};
127
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200128&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100129 status = "okay";
130};
131
Patrick Delaunayfe915332019-07-30 19:16:12 +0200132&gpu {
133 contiguous-area = <&gpu_reserved>;
134 status = "okay";
135};
136
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100137&i2c4 {
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200138 pinctrl-names = "default", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100139 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200140 pinctrl-1 = <&i2c4_pins_sleep_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100141 i2c-scl-rising-time-ns = <185>;
142 i2c-scl-falling-time-ns = <20>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200143 clock-frequency = <400000>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100144 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200145 /* spare dmas for other usage */
146 /delete-property/dmas;
147 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100148
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200149 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100150 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100151 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200152 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100153 interrupt-controller;
154 #interrupt-cells = <2>;
155 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200156
Patrice Chotard21299d32018-04-26 17:13:11 +0200157 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100158 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200159 ldo1-supply = <&v3v3>;
160 ldo2-supply = <&v3v3>;
161 ldo3-supply = <&vdd_ddr>;
162 ldo5-supply = <&v3v3>;
163 ldo6-supply = <&v3v3>;
164 pwr_sw1-supply = <&bst_out>;
165 pwr_sw2-supply = <&bst_out>;
166
167 vddcore: buck1 {
168 regulator-name = "vddcore";
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100169 regulator-min-microvolt = <1200000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200170 regulator-max-microvolt = <1350000>;
171 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200172 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200173 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200174 };
175
176 vdd_ddr: buck2 {
177 regulator-name = "vdd_ddr";
178 regulator-min-microvolt = <1350000>;
179 regulator-max-microvolt = <1350000>;
180 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200181 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200182 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200183 };
184
185 vdd: buck3 {
186 regulator-name = "vdd";
187 regulator-min-microvolt = <3300000>;
188 regulator-max-microvolt = <3300000>;
189 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200190 st,mask-reset;
191 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200192 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200193 };
194
195 v3v3: buck4 {
196 regulator-name = "v3v3";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200199 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200200 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200201 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200202 };
203
204 vdda: ldo1 {
205 regulator-name = "vdda";
206 regulator-min-microvolt = <2900000>;
207 regulator-max-microvolt = <2900000>;
208 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200209 };
210
211 v2v8: ldo2 {
212 regulator-name = "v2v8";
213 regulator-min-microvolt = <2800000>;
214 regulator-max-microvolt = <2800000>;
215 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200216 };
217
218 vtt_ddr: ldo3 {
219 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200220 regulator-min-microvolt = <500000>;
221 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200222 regulator-always-on;
223 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200224 };
225
226 vdd_usb: ldo4 {
227 regulator-name = "vdd_usb";
Patrice Chotard21299d32018-04-26 17:13:11 +0200228 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200229 };
230
231 vdd_sd: ldo5 {
232 regulator-name = "vdd_sd";
233 regulator-min-microvolt = <2900000>;
234 regulator-max-microvolt = <2900000>;
235 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200236 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200237 };
238
239 v1v8: ldo6 {
240 regulator-name = "v1v8";
241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>;
243 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200244 };
245
246 vref_ddr: vref_ddr {
247 regulator-name = "vref_ddr";
248 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200249 };
250
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100251 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200252 regulator-name = "bst_out";
253 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100254 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200255
256 vbus_otg: pwr_sw1 {
257 regulator-name = "vbus_otg";
258 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200259 };
260
261 vbus_sw: pwr_sw2 {
262 regulator-name = "vbus_sw";
263 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100264 regulator-active-discharge = <1>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200265 };
266 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200267
268 onkey {
269 compatible = "st,stpmic1-onkey";
270 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
271 interrupt-names = "onkey-falling", "onkey-rising";
272 power-off-time-sec = <10>;
273 status = "okay";
274 };
275
276 watchdog {
277 compatible = "st,stpmic1-wdt";
278 status = "disabled";
279 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100280 };
281};
282
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200283&ipcc {
284 status = "okay";
285};
286
Patrice Chotard23661602019-02-12 16:50:38 +0100287&iwdg2 {
288 timeout-sec = <32>;
289 status = "okay";
290};
291
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200292&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100293 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
294 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200295 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
296 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100297 interrupt-parent = <&exti>;
298 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200299 status = "okay";
300};
301
Patrick Delaunay7915b992020-01-28 10:10:59 +0100302&pwr_regulators {
303 vdd-supply = <&vdd>;
304 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200305};
306
Patrice Chotard23661602019-02-12 16:50:38 +0100307&rng1 {
308 status = "okay";
309};
310
311&rtc {
312 status = "okay";
313};
314
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100315&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200316 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100317 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200318 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
319 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200320 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
321 disable-wp;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100322 st,sig-dir;
323 st,neg-edge;
324 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100325 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200326 vmmc-supply = <&vdd_sd>;
327 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100328 status = "okay";
329};
330
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100331&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100332 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100333 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100334 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
335 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100336 non-removable;
337 no-sd;
338 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100339 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100340 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200341 vmmc-supply = <&v3v3>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200342 vqmmc-supply = <&vdd>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100343 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100344 status = "okay";
345};
346
Patrice Chotard23661602019-02-12 16:50:38 +0100347&timers6 {
348 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200349 /* spare dmas for other usage */
350 /delete-property/dmas;
351 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100352 timer@5 {
353 status = "okay";
354 };
355};
356
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100357&uart4 {
358 pinctrl-names = "default";
359 pinctrl-0 = <&uart4_pins_a>;
360 status = "okay";
361};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200362
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200363&usbotg_hs {
364 vbus-supply = <&vbus_otg>;
365};
366
Patrick Delaunaya6743132018-07-09 15:17:19 +0200367&usbphyc_port0 {
368 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200369};
370
371&usbphyc_port1 {
372 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200373};