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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glass6854f872014-11-14 20:56:33 -07002/*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6 *
7 * Modifications are:
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2009 coresystems GmbH
15 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 *
17 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 *
19 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20 * David Mosberger-Tang
21 *
22 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
Simon Glass6854f872014-11-14 20:56:33 -070023 */
24
25#include <common.h>
26#include <bios_emul.h>
Simon Glass3f4e1e82015-11-29 13:17:57 -070027#include <dm.h>
Simon Glass6854f872014-11-14 20:56:33 -070028#include <errno.h>
Simon Glass35a3f872019-12-28 10:44:56 -070029#include <init.h>
Simon Glass6854f872014-11-14 20:56:33 -070030#include <malloc.h>
31#include <pci.h>
32#include <pci_rom.h>
33#include <vbe.h>
Simon Glassee87ee82016-10-05 20:42:17 -060034#include <video.h>
Simon Glass6854f872014-11-14 20:56:33 -070035#include <video_fb.h>
Simon Glass3cabcf92020-04-08 16:57:35 -060036#include <acpi/acpi_s3.h>
Bin Menga4520022015-07-06 16:31:36 +080037#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070038
Bin Meng68769eb2017-04-21 07:24:46 -070039DECLARE_GLOBAL_DATA_PTR;
Bin Meng68769eb2017-04-21 07:24:46 -070040
Simon Glass3f4e1e82015-11-29 13:17:57 -070041__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070042{
Bin Meng68769eb2017-04-21 07:24:46 -070043#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
44 if (gd->arch.prev_sleep_state == ACPI_S3) {
45 if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
46 return true;
47 else
48 return false;
49 }
50#endif
51
Simon Glass6854f872014-11-14 20:56:33 -070052 return true;
53}
54
Bin Mengf698baa2016-06-14 02:02:40 -070055__weak bool board_should_load_oprom(struct udevice *dev)
Simon Glass6854f872014-11-14 20:56:33 -070056{
Bin Mengc0aea6b2016-06-14 02:02:39 -070057 return true;
Simon Glass6854f872014-11-14 20:56:33 -070058}
59
60__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
61{
62 return vendev;
63}
64
Simon Glass3f4e1e82015-11-29 13:17:57 -070065static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glass6854f872014-11-14 20:56:33 -070066{
Simon Glass3f4e1e82015-11-29 13:17:57 -070067 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Simon Glass6854f872014-11-14 20:56:33 -070068 struct pci_rom_header *rom_header;
69 struct pci_rom_data *rom_data;
Simon Glass40305242014-12-29 19:32:23 -070070 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080071 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070072 u32 vendev;
73 u32 mapped_vendev;
74 u32 rom_address;
75
Simon Glass3f4e1e82015-11-29 13:17:57 -070076 vendev = pplat->vendor << 16 | pplat->device;
Simon Glass6854f872014-11-14 20:56:33 -070077 mapped_vendev = board_map_oprom_vendev(vendev);
78 if (vendev != mapped_vendev)
79 debug("Device ID mapped to %#08x\n", mapped_vendev);
80
Bin Meng786a08e2015-07-06 16:31:33 +080081#ifdef CONFIG_VGA_BIOS_ADDR
82 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070083#else
Simon Glass4a2708a2015-01-14 21:37:04 -070084
Simon Glass3f4e1e82015-11-29 13:17:57 -070085 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glass6854f872014-11-14 20:56:33 -070086 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
87 debug("%s: rom_address=%x\n", __func__, rom_address);
88 return -ENOENT;
89 }
90
91 /* Enable expansion ROM address decoding. */
Simon Glass3f4e1e82015-11-29 13:17:57 -070092 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
93 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glass6854f872014-11-14 20:56:33 -070094#endif
95 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080096 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070097
98 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -070099 le16_to_cpu(rom_header->signature),
100 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700101
Simon Glass40305242014-12-29 19:32:23 -0700102 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -0700103 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700104 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +0800105#ifndef CONFIG_VGA_BIOS_ADDR
106 /* Disable expansion ROM address decoding */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700107 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Mengf110da92015-07-08 13:06:41 +0800108#endif
Simon Glass6854f872014-11-14 20:56:33 -0700109 return -EINVAL;
110 }
111
Simon Glass40305242014-12-29 19:32:23 -0700112 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
113 rom_vendor = le16_to_cpu(rom_data->vendor);
114 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700115
116 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700117 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700118
119 /* If the device id is mapped, a mismatch is expected */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700120 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700121 (vendev == mapped_vendev)) {
122 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700123 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700124 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700125 }
126
Bin Mengd57c2f22015-04-24 15:48:03 +0800127 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
128 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
129 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700130
Simon Glass3f4e1e82015-11-29 13:17:57 -0700131 if (pplat->class != rom_class) {
Bin Mengd57c2f22015-04-24 15:48:03 +0800132 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glass3f4e1e82015-11-29 13:17:57 -0700133 rom_class, pplat->class);
Simon Glass6854f872014-11-14 20:56:33 -0700134 }
135 *hdrp = rom_header;
136
137 return 0;
138}
139
Simon Glassd830b152016-01-15 05:23:22 -0700140/**
141 * pci_rom_load() - Load a ROM image and return a pointer to it
142 *
143 * @rom_header: Pointer to ROM image
144 * @ram_headerp: Returns a pointer to the image in RAM
145 * @allocedp: Returns true if @ram_headerp was allocated and needs
146 * to be freed
147 * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
148 * the error state. Even if this function returns an error, it may have
149 * allocated memory.
150 */
151static int pci_rom_load(struct pci_rom_header *rom_header,
152 struct pci_rom_header **ram_headerp, bool *allocedp)
Simon Glass6854f872014-11-14 20:56:33 -0700153{
154 struct pci_rom_data *rom_data;
155 unsigned int rom_size;
156 unsigned int image_size = 0;
157 void *target;
158
Simon Glassd830b152016-01-15 05:23:22 -0700159 *allocedp = false;
Simon Glass6854f872014-11-14 20:56:33 -0700160 do {
161 /* Get next image, until we see an x86 version */
162 rom_header = (struct pci_rom_header *)((void *)rom_header +
163 image_size);
164
165 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700166 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700167
Simon Glass40305242014-12-29 19:32:23 -0700168 image_size = le16_to_cpu(rom_data->ilen) * 512;
169 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700170
171 if (rom_data->type != 0)
172 return -EACCES;
173
174 rom_size = rom_header->size * 512;
175
Simon Glassbdc88d42014-12-29 19:32:24 -0700176#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700177 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700178#else
179 target = (void *)malloc(rom_size);
180 if (!target)
181 return -ENOMEM;
Simon Glassd830b152016-01-15 05:23:22 -0700182 *allocedp = true;
Simon Glassbdc88d42014-12-29 19:32:24 -0700183#endif
Simon Glass6854f872014-11-14 20:56:33 -0700184 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700185 ulong start = get_timer(0);
186
Simon Glass6854f872014-11-14 20:56:33 -0700187 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
188 rom_header, target, rom_size);
189 memcpy(target, rom_header, rom_size);
190 if (memcmp(target, rom_header, rom_size)) {
191 printf("VGA ROM copy failed\n");
192 return -EFAULT;
193 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700194 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700195 }
196 *ram_headerp = target;
197
198 return 0;
199}
200
Bin Meng153e1dd2015-08-13 00:29:16 -0700201struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700202
Bin Menga4520022015-07-06 16:31:36 +0800203void setup_video(struct screen_info *screen_info)
204{
Bin Menga4520022015-07-06 16:31:36 +0800205 struct vesa_mode_info *vesa = &mode_info.vesa;
206
Bin Meng1e7a0472015-07-30 03:49:13 -0700207 /* Sanity test on VESA parameters */
208 if (!vesa->x_resolution || !vesa->y_resolution)
209 return;
210
Bin Menga4520022015-07-06 16:31:36 +0800211 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
212
213 screen_info->lfb_width = vesa->x_resolution;
214 screen_info->lfb_height = vesa->y_resolution;
215 screen_info->lfb_depth = vesa->bits_per_pixel;
216 screen_info->lfb_linelength = vesa->bytes_per_scanline;
217 screen_info->lfb_base = vesa->phys_base_ptr;
218 screen_info->lfb_size =
219 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
220 65536);
221 screen_info->lfb_size >>= 16;
222 screen_info->red_size = vesa->red_mask_size;
223 screen_info->red_pos = vesa->red_mask_pos;
224 screen_info->green_size = vesa->green_mask_size;
225 screen_info->green_pos = vesa->green_mask_pos;
226 screen_info->blue_size = vesa->blue_mask_size;
227 screen_info->blue_pos = vesa->blue_mask_pos;
228 screen_info->rsvd_size = vesa->reserved_mask_size;
229 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800230}
231
Simon Glass3f4e1e82015-11-29 13:17:57 -0700232int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
233 int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700234{
Simon Glass3f4e1e82015-11-29 13:17:57 -0700235 struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
Andreas Bießmanned488992016-02-16 23:29:31 +0100236 struct pci_rom_header *rom = NULL, *ram = NULL;
Simon Glass6854f872014-11-14 20:56:33 -0700237 int vesa_mode = -1;
Simon Glassd830b152016-01-15 05:23:22 -0700238 bool emulate, alloced;
Simon Glass6854f872014-11-14 20:56:33 -0700239 int ret;
240
241 /* Only execute VGA ROMs */
Simon Glass3f4e1e82015-11-29 13:17:57 -0700242 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
243 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glass6854f872014-11-14 20:56:33 -0700244 PCI_CLASS_DISPLAY_VGA);
245 return -ENODEV;
246 }
247
Bin Mengf698baa2016-06-14 02:02:40 -0700248 if (!board_should_load_oprom(dev))
Simon Glass595aac92018-10-01 12:22:44 -0600249 return log_msg_ret("Should not load OPROM", -ENXIO);
Simon Glass6854f872014-11-14 20:56:33 -0700250
Simon Glass3f4e1e82015-11-29 13:17:57 -0700251 ret = pci_rom_probe(dev, &rom);
Simon Glass6854f872014-11-14 20:56:33 -0700252 if (ret)
253 return ret;
254
Simon Glassd830b152016-01-15 05:23:22 -0700255 ret = pci_rom_load(rom, &ram, &alloced);
Simon Glass6854f872014-11-14 20:56:33 -0700256 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700257 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700258
Simon Glassd830b152016-01-15 05:23:22 -0700259 if (!board_should_run_oprom(dev)) {
260 ret = -ENXIO;
261 goto err;
262 }
Simon Glass6854f872014-11-14 20:56:33 -0700263
264#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
265 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
266 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
267#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700268 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700269
270 if (exec_method & PCI_ROM_USE_NATIVE) {
271#ifdef CONFIG_X86
272 emulate = false;
273#else
274 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
275 printf("BIOS native execution is only available on x86\n");
Simon Glassd830b152016-01-15 05:23:22 -0700276 ret = -ENOSYS;
277 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700278 }
279 emulate = true;
280#endif
281 } else {
282#ifdef CONFIG_BIOSEMU
283 emulate = true;
284#else
285 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
286 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
Simon Glassd830b152016-01-15 05:23:22 -0700287 ret = -ENOSYS;
288 goto err;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700289 }
290 emulate = false;
291#endif
292 }
293
Simon Glass6854f872014-11-14 20:56:33 -0700294 if (emulate) {
295#ifdef CONFIG_BIOSEMU
296 BE_VGAInfo *info;
297
Simon Glass72826722016-01-17 16:11:09 -0700298 ret = biosemu_setup(dev, &info);
Simon Glass6854f872014-11-14 20:56:33 -0700299 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700300 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700301 biosemu_set_interrupt_handler(0x15, int15_handler);
Simon Glass72826722016-01-17 16:11:09 -0700302 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
303 true, vesa_mode, &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700304 if (ret)
Simon Glassd830b152016-01-15 05:23:22 -0700305 goto err;
Simon Glass6854f872014-11-14 20:56:33 -0700306#endif
307 } else {
Simon Glass6c456512019-04-25 21:59:08 -0600308#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
Simon Glass6854f872014-11-14 20:56:33 -0700309 bios_set_interrupt_handler(0x15, int15_handler);
310
Simon Glass8beb0bd2015-11-29 13:17:58 -0700311 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
312 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700313#endif
314 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700315 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glassd830b152016-01-15 05:23:22 -0700316 ret = 0;
Simon Glass6854f872014-11-14 20:56:33 -0700317
Simon Glassd830b152016-01-15 05:23:22 -0700318err:
319 if (alloced)
320 free(ram);
321 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700322}
Simon Glassee87ee82016-10-05 20:42:17 -0600323
324#ifdef CONFIG_DM_VIDEO
Bin Meng5f6ad022016-10-09 04:14:15 -0700325int vbe_setup_video_priv(struct vesa_mode_info *vesa,
326 struct video_priv *uc_priv,
327 struct video_uc_platdata *plat)
Simon Glassee87ee82016-10-05 20:42:17 -0600328{
329 if (!vesa->x_resolution)
Simon Glass595aac92018-10-01 12:22:44 -0600330 return log_msg_ret("No x resolution", -ENXIO);
Simon Glassee87ee82016-10-05 20:42:17 -0600331 uc_priv->xsize = vesa->x_resolution;
332 uc_priv->ysize = vesa->y_resolution;
Simon Glass06696eb2018-11-29 15:08:52 -0700333 uc_priv->line_length = vesa->bytes_per_scanline;
Simon Glassee87ee82016-10-05 20:42:17 -0600334 switch (vesa->bits_per_pixel) {
335 case 32:
336 case 24:
337 uc_priv->bpix = VIDEO_BPP32;
338 break;
339 case 16:
340 uc_priv->bpix = VIDEO_BPP16;
341 break;
342 default:
343 return -EPROTONOSUPPORT;
344 }
345 plat->base = vesa->phys_base_ptr;
346 plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
347
348 return 0;
349}
350
351int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
352{
353 struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
354 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
355 int ret;
356
357 /* If we are running from EFI or coreboot, this can't work */
Bin Mengf0920e42016-10-09 04:14:12 -0700358 if (!ll_boot_init()) {
359 printf("Not available (previous bootloader prevents it)\n");
Simon Glassee87ee82016-10-05 20:42:17 -0600360 return -EPERM;
Bin Mengf0920e42016-10-09 04:14:12 -0700361 }
Simon Glassee87ee82016-10-05 20:42:17 -0600362 bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
363 ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
364 PCI_ROM_ALLOW_FALLBACK);
365 bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
366 if (ret) {
367 debug("failed to run video BIOS: %d\n", ret);
368 return ret;
369 }
370
371 ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
372 if (ret) {
373 debug("No video mode configured\n");
374 return ret;
375 }
376
Bin Meng61130932018-04-11 22:02:18 -0700377 printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
Bin Mengf0920e42016-10-09 04:14:12 -0700378 mode_info.vesa.bits_per_pixel);
379
Simon Glassee87ee82016-10-05 20:42:17 -0600380 return 0;
381}
382#endif