blob: eab9537fbae52f972dea1e54aff66e640a70499c [file] [log] [blame]
wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glassd96c2602019-12-28 10:44:58 -07007#include <clock_legacy.h>
Simon Glassfa54eb12014-09-04 16:27:32 -06008#include <common.h>
Paul Burton50fce1d2016-09-08 07:47:29 +01009#include <clk.h>
Simon Glass12e431b2014-09-04 16:27:34 -060010#include <dm.h>
11#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
wdenke85390d2002-04-01 14:29:03 +000013#include <ns16550.h>
Ley Foon Tanb051eec2018-06-14 18:45:22 +080014#include <reset.h>
Simon Glass12e431b2014-09-04 16:27:34 -060015#include <serial.h>
Ladislav Michla1b322a2010-02-01 23:34:25 +010016#include <watchdog.h>
Simon Glass401d1c42020-10-30 21:38:53 -060017#include <asm/global_data.h>
Simon Glass61b29b82020-02-03 07:36:15 -070018#include <linux/err.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100019#include <linux/types.h>
20#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000021
Simon Glass12e431b2014-09-04 16:27:34 -060022DECLARE_GLOBAL_DATA_PTR;
23
Detlev Zundel200779e2009-04-03 11:53:01 +020024#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
25#define UART_MCRVAL (UART_MCR_DTR | \
26 UART_MCR_RTS) /* RTS/DTR */
Simon Glass12e431b2014-09-04 16:27:34 -060027
Simon Glass2e2c5142019-09-25 08:11:14 -060028#if !CONFIG_IS_ENABLED(DM_SERIAL)
Graeme Russ167cdad2010-04-24 00:05:46 +100029#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassf8df9d02011-10-15 19:14:09 +000030#define serial_out(x, y) outb(x, (ulong)y)
31#define serial_in(y) inb((ulong)y)
Dave Aldridge79df1202011-09-01 22:47:14 +000032#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000033#define serial_out(x, y) out_be32(y, x)
34#define serial_in(y) in_be32(y)
Dave Aldridge79df1202011-09-01 22:47:14 +000035#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000036#define serial_out(x, y) out_le32(y, x)
37#define serial_in(y) in_le32(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100038#else
Simon Glassf8df9d02011-10-15 19:14:09 +000039#define serial_out(x, y) writeb(x, y)
40#define serial_in(y) readb(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100041#endif
Simon Glass12e431b2014-09-04 16:27:34 -060042#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000043
Tom Rinif899cc12021-09-12 20:32:32 -040044#if defined(CONFIG_ARCH_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -040045#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
46#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -040047#undef UART_MCRVAL
48#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
49#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
50#else
51#define UART_MCRVAL (UART_MCR_RTS)
52#endif
Vitaly Andrianovef509b92014-04-04 13:16:53 -040053#endif
54
Tom Rini6e7df1d2023-01-10 11:19:45 -050055#ifndef CFG_SYS_NS16550_IER
56#define CFG_SYS_NS16550_IER 0x00
57#endif /* CFG_SYS_NS16550_IER */
Prafulla Wadaskara160ea02010-10-27 21:58:31 +053058
Simon Glass363e6da2015-02-27 22:06:26 -070059static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass76571672015-01-26 18:27:08 -070060{
61#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
62 outb(value, (ulong)addr);
Bernhard Messerklinger78b7d372018-02-15 09:02:26 +010063#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass76571672015-01-26 18:27:08 -070064 out_le32(addr, value);
65#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
66 out_be32(addr, value);
Simon Glass90914002015-05-12 14:55:02 -060067#elif defined(CONFIG_SYS_NS16550_MEM32)
68 writel(value, addr);
Simon Glass76571672015-01-26 18:27:08 -070069#elif defined(CONFIG_SYS_BIG_ENDIAN)
70 writeb(value, addr + (1 << shift) - 1);
71#else
72 writeb(value, addr);
73#endif
74}
75
Simon Glass363e6da2015-02-27 22:06:26 -070076static inline int serial_in_shift(void *addr, int shift)
Simon Glass76571672015-01-26 18:27:08 -070077{
78#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
79 return inb((ulong)addr);
Bernhard Messerklinger78b7d372018-02-15 09:02:26 +010080#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass76571672015-01-26 18:27:08 -070081 return in_le32(addr);
82#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
83 return in_be32(addr);
Simon Glass90914002015-05-12 14:55:02 -060084#elif defined(CONFIG_SYS_NS16550_MEM32)
85 return readl(addr);
Simon Glass76571672015-01-26 18:27:08 -070086#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Lin20379c12015-02-28 15:55:36 +080087 return readb(addr + (1 << shift) - 1);
Simon Glass76571672015-01-26 18:27:08 -070088#else
89 return readb(addr);
90#endif
91}
92
Simon Glass2e2c5142019-09-25 08:11:14 -060093#if CONFIG_IS_ENABLED(DM_SERIAL)
Marek Vasutfa4ce722016-05-25 02:13:03 +020094
Tom Rini91092132022-11-16 13:10:28 -050095#ifndef CFG_SYS_NS16550_CLK
96#define CFG_SYS_NS16550_CLK 0
Marek Vasutfa4ce722016-05-25 02:13:03 +020097#endif
98
Simon Glass62cbde42019-12-19 17:58:18 -070099/*
100 * Use this #ifdef for now since many platforms don't define in(), out(),
101 * out_le32(), etc. but we don't have #defines to indicate this.
102 *
103 * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
104 * on a platform
105 */
106#ifdef CONFIG_NS16550_DYNAMIC
Simon Glass8a8d24b2020-12-03 16:55:23 -0700107static void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
Simon Glass62cbde42019-12-19 17:58:18 -0700108 int value)
109{
110 if (plat->flags & NS16550_FLAG_IO) {
111 outb(value, addr);
112 } else if (plat->reg_width == 4) {
113 if (plat->flags & NS16550_FLAG_ENDIAN) {
114 if (plat->flags & NS16550_FLAG_BE)
115 out_be32(addr, value);
116 else
117 out_le32(addr, value);
118 } else {
119 writel(value, addr);
120 }
121 } else if (plat->flags & NS16550_FLAG_BE) {
122 writeb(value, addr + (1 << plat->reg_shift) - 1);
123 } else {
124 writeb(value, addr);
125 }
126}
127
Simon Glass8a8d24b2020-12-03 16:55:23 -0700128static int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
Simon Glass62cbde42019-12-19 17:58:18 -0700129{
130 if (plat->flags & NS16550_FLAG_IO) {
131 return inb(addr);
132 } else if (plat->reg_width == 4) {
133 if (plat->flags & NS16550_FLAG_ENDIAN) {
134 if (plat->flags & NS16550_FLAG_BE)
135 return in_be32(addr);
136 else
137 return in_le32(addr);
138 } else {
139 return readl(addr);
140 }
141 } else if (plat->flags & NS16550_FLAG_BE) {
142 return readb(addr + (1 << plat->reg_shift) - 1);
143 } else {
144 return readb(addr);
145 }
146}
147#else
Simon Glass8a8d24b2020-12-03 16:55:23 -0700148static inline void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
Simon Glass62cbde42019-12-19 17:58:18 -0700149 int value)
150{
151}
152
Simon Glass8a8d24b2020-12-03 16:55:23 -0700153static inline int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
Simon Glass62cbde42019-12-19 17:58:18 -0700154{
155 return 0;
156}
157
158#endif /* CONFIG_NS16550_DYNAMIC */
159
Simon Glassd30c7202020-12-22 19:30:18 -0700160static void ns16550_writeb(struct ns16550 *port, int offset, int value)
Simon Glass12e431b2014-09-04 16:27:34 -0600161{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700162 struct ns16550_plat *plat = port->plat;
Simon Glass12e431b2014-09-04 16:27:34 -0600163 unsigned char *addr;
164
165 offset *= 1 << plat->reg_shift;
Simon Glass62cbde42019-12-19 17:58:18 -0700166 addr = (unsigned char *)plat->base + offset + plat->reg_offset;
Paul Burtondf8ec552016-05-17 07:43:26 +0100167
Simon Glass62cbde42019-12-19 17:58:18 -0700168 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
169 serial_out_dynamic(plat, addr, value);
170 else
171 serial_out_shift(addr, plat->reg_shift, value);
Simon Glass12e431b2014-09-04 16:27:34 -0600172}
173
Simon Glassd30c7202020-12-22 19:30:18 -0700174static int ns16550_readb(struct ns16550 *port, int offset)
Simon Glass12e431b2014-09-04 16:27:34 -0600175{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700176 struct ns16550_plat *plat = port->plat;
Simon Glass12e431b2014-09-04 16:27:34 -0600177 unsigned char *addr;
178
179 offset *= 1 << plat->reg_shift;
Simon Glass62cbde42019-12-19 17:58:18 -0700180 addr = (unsigned char *)plat->base + offset + plat->reg_offset;
Simon Glass76571672015-01-26 18:27:08 -0700181
Simon Glass62cbde42019-12-19 17:58:18 -0700182 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
183 return serial_in_dynamic(plat, addr);
184 else
185 return serial_in_shift(addr, plat->reg_shift);
Simon Glass12e431b2014-09-04 16:27:34 -0600186}
187
Simon Glassd30c7202020-12-22 19:30:18 -0700188static u32 ns16550_getfcr(struct ns16550 *port)
Marek Vasut65f83802016-12-01 02:06:29 +0100189{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700190 struct ns16550_plat *plat = port->plat;
Marek Vasut65f83802016-12-01 02:06:29 +0100191
192 return plat->fcr;
193}
194
Simon Glass12e431b2014-09-04 16:27:34 -0600195/* We can clean these up once everything is moved to driver model */
196#define serial_out(value, addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700197 ns16550_writeb(com_port, \
198 (unsigned char *)addr - (unsigned char *)com_port, value)
Simon Glass12e431b2014-09-04 16:27:34 -0600199#define serial_in(addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700200 ns16550_readb(com_port, \
201 (unsigned char *)addr - (unsigned char *)com_port)
Marek Vasut65f83802016-12-01 02:06:29 +0100202#else
Simon Glassd30c7202020-12-22 19:30:18 -0700203static u32 ns16550_getfcr(struct ns16550 *port)
Marek Vasut65f83802016-12-01 02:06:29 +0100204{
Heiko Schocher17fa0322017-01-18 08:05:49 +0100205 return UART_FCR_DEFVAL;
Marek Vasut65f83802016-12-01 02:06:29 +0100206}
Simon Glass12e431b2014-09-04 16:27:34 -0600207#endif
208
Simon Glassd30c7202020-12-22 19:30:18 -0700209int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate)
Simon Glassfa54eb12014-09-04 16:27:32 -0600210{
211 const unsigned int mode_x_div = 16;
212
Simon Glass21d00432015-01-26 18:27:09 -0700213 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
214}
215
Simon Glass2d6bf752020-12-22 19:30:19 -0700216static void ns16550_setbrg(struct ns16550 *com_port, int baud_divisor)
Simon Glass8bbe33c2014-09-04 16:27:33 -0600217{
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100218 /* to keep serial format, read lcr before writing BKSE */
219 int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
220
221 serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600222 serial_out(baud_divisor & 0xff, &com_port->dll);
223 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100224 serial_out(lcr_val, &com_port->lcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600225}
226
Simon Glass2d6bf752020-12-22 19:30:19 -0700227void ns16550_init(struct ns16550 *com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000228{
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800229#if (defined(CONFIG_SPL_BUILD) && \
230 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000231 /*
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800232 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
233 * before SPL starts only THRE bit is set. We have to empty the
234 * transmitter before initialization starts.
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000235 */
236 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
237 == UART_LSR_THRE) {
Simon Glass12e431b2014-09-04 16:27:34 -0600238 if (baud_divisor != -1)
Simon Glass2d6bf752020-12-22 19:30:19 -0700239 ns16550_setbrg(com_port, baud_divisor);
Patrik Dahlström1c166062019-12-21 17:25:12 +0100240 else {
241 // Re-use old baud rate divisor to flush transmit reg.
242 const int dll = serial_in(&com_port->dll);
243 const int dlm = serial_in(&com_port->dlm);
244 const int divisor = dll | (dlm << 8);
Simon Glass2d6bf752020-12-22 19:30:19 -0700245 ns16550_setbrg(com_port, divisor);
Patrik Dahlström1c166062019-12-21 17:25:12 +0100246 }
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000247 serial_out(0, &com_port->mdr1);
248 }
249#endif
250
Scott Woodcb55b332012-09-18 18:19:05 -0500251 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
252 ;
253
Tom Rini6e7df1d2023-01-10 11:19:45 -0500254 serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
Lokesh Vutla5d754192018-08-27 15:55:24 +0530255#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
Graeme Russ167cdad2010-04-24 00:05:46 +1000256 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk945af8d2003-07-16 21:53:01 +0000257#endif
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800258
Graeme Russ167cdad2010-04-24 00:05:46 +1000259 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasut65f83802016-12-01 02:06:29 +0100260 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100261 /* initialize serial config to 8N1 before writing baudrate */
262 serial_out(UART_LCRVAL, &com_port->lcr);
Simon Glass12e431b2014-09-04 16:27:34 -0600263 if (baud_divisor != -1)
Simon Glass2d6bf752020-12-22 19:30:19 -0700264 ns16550_setbrg(com_port, baud_divisor);
Lokesh Vutla5d754192018-08-27 15:55:24 +0530265#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
266 defined(CONFIG_OMAP_SERIAL)
Simon Glassf8df9d02011-10-15 19:14:09 +0000267 /* /16 is proper to hit 115200 with 48MHz */
268 serial_out(0, &com_port->mdr1);
Tom Rini89024dd2017-05-12 22:33:16 -0400269#endif
Tom Rinif899cc12021-09-12 20:32:32 -0400270#if defined(CONFIG_ARCH_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -0400271 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
272#endif
wdenke85390d2002-04-01 14:29:03 +0000273}
274
Tom Rini57c3afb2022-11-16 13:10:26 -0500275#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS)
Simon Glass2d6bf752020-12-22 19:30:19 -0700276void ns16550_reinit(struct ns16550 *com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000277{
Tom Rini6e7df1d2023-01-10 11:19:45 -0500278 serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
Simon Glass2d6bf752020-12-22 19:30:19 -0700279 ns16550_setbrg(com_port, 0);
Graeme Russ167cdad2010-04-24 00:05:46 +1000280 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasut65f83802016-12-01 02:06:29 +0100281 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Glass2d6bf752020-12-22 19:30:19 -0700282 ns16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000283}
Tom Rini57c3afb2022-11-16 13:10:26 -0500284#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */
wdenke85390d2002-04-01 14:29:03 +0000285
Simon Glass2d6bf752020-12-22 19:30:19 -0700286void ns16550_putc(struct ns16550 *com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000287{
Simon Glassf8df9d02011-10-15 19:14:09 +0000288 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
289 ;
Graeme Russ167cdad2010-04-24 00:05:46 +1000290 serial_out(c, &com_port->thr);
Stefan Roese1a2d9b32010-10-12 09:39:45 +0200291
292 /*
293 * Call watchdog_reset() upon newline. This is done here in putc
294 * since the environment code uses a single puts() to print the complete
295 * environment upon "printenv". So we can't put this watchdog call
296 * in puts().
297 */
298 if (c == '\n')
Stefan Roese29caf932022-09-02 14:10:46 +0200299 schedule();
wdenke85390d2002-04-01 14:29:03 +0000300}
301
Tom Rini57c3afb2022-11-16 13:10:26 -0500302#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS)
Simon Glass2d6bf752020-12-22 19:30:19 -0700303char ns16550_getc(struct ns16550 *com_port)
wdenke85390d2002-04-01 14:29:03 +0000304{
Graeme Russ167cdad2010-04-24 00:05:46 +1000305 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasutf2041382012-09-15 10:25:19 +0200306#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk232c1502004-03-12 00:14:09 +0000307 extern void usbtty_poll(void);
308 usbtty_poll();
309#endif
Stefan Roese29caf932022-09-02 14:10:46 +0200310 schedule();
wdenk232c1502004-03-12 00:14:09 +0000311 }
Graeme Russ167cdad2010-04-24 00:05:46 +1000312 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000313}
314
Simon Glass2d6bf752020-12-22 19:30:19 -0700315int ns16550_tstc(struct ns16550 *com_port)
wdenke85390d2002-04-01 14:29:03 +0000316{
Simon Glassf8df9d02011-10-15 19:14:09 +0000317 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000318}
319
Tom Rini57c3afb2022-11-16 13:10:26 -0500320#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */
Simon Glass12e431b2014-09-04 16:27:34 -0600321
Simon Glass21d00432015-01-26 18:27:09 -0700322#ifdef CONFIG_DEBUG_UART_NS16550
323
324#include <debug_uart.h>
325
Simon Glass97b05972015-10-18 19:51:23 -0600326static inline void _debug_uart_init(void)
Simon Glass21d00432015-01-26 18:27:09 -0700327{
Pali Rohárd2937592022-05-06 11:05:16 +0200328 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
Simon Glass21d00432015-01-26 18:27:09 -0700329 int baud_divisor;
330
Pali Rohár5e998b42022-06-23 14:13:56 +0200331 /* Wait until tx buffer is empty */
332 while (!(serial_din(&com_port->lsr) & UART_LSR_TEMT))
333 ;
334
Simon Glass21d00432015-01-26 18:27:09 -0700335 /*
336 * We copy the code from above because it is already horribly messy.
337 * Trying to refactor to nicely remove the duplication doesn't seem
338 * feasible. The better fix is to move all users of this driver to
339 * driver model.
340 */
Marek Vasut03c6f172016-05-25 02:13:16 +0200341 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
342 CONFIG_BAUDRATE);
Tom Rini6e7df1d2023-01-10 11:19:45 -0500343 serial_dout(&com_port->ier, CFG_SYS_NS16550_IER);
Simon Glass6e780c72015-06-23 15:39:06 -0600344 serial_dout(&com_port->mcr, UART_MCRVAL);
Heiko Schocher17fa0322017-01-18 08:05:49 +0100345 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700346
Simon Glass6e780c72015-06-23 15:39:06 -0600347 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
348 serial_dout(&com_port->dll, baud_divisor & 0xff);
349 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
350 serial_dout(&com_port->lcr, UART_LCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700351}
352
Simon Glassd30c7202020-12-22 19:30:18 -0700353static inline int NS16550_read_baud_divisor(struct ns16550 *com_port)
Simon Goldschmidtc4448bd2019-01-09 20:35:31 +0100354{
355 int ret;
356
357 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
358 ret = serial_din(&com_port->dll) & 0xff;
359 ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
360 serial_dout(&com_port->lcr, UART_LCRVAL);
361
362 return ret;
363}
364
Simon Glass21d00432015-01-26 18:27:09 -0700365static inline void _debug_uart_putc(int ch)
366{
Pali Rohárd2937592022-05-06 11:05:16 +0200367 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
Simon Glass21d00432015-01-26 18:27:09 -0700368
Simon Goldschmidtc4448bd2019-01-09 20:35:31 +0100369 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
370#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
371 if (!NS16550_read_baud_divisor(com_port))
372 return;
373#endif
374 }
Simon Glass6e780c72015-06-23 15:39:06 -0600375 serial_dout(&com_port->thr, ch);
Simon Glass21d00432015-01-26 18:27:09 -0700376}
377
378DEBUG_UART_FUNCS
379
380#endif
381
Simon Glass2e2c5142019-09-25 08:11:14 -0600382#if CONFIG_IS_ENABLED(DM_SERIAL)
Simon Glass12e431b2014-09-04 16:27:34 -0600383static int ns16550_serial_putc(struct udevice *dev, const char ch)
384{
Simon Glassd30c7202020-12-22 19:30:18 -0700385 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600386
387 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
388 return -EAGAIN;
389 serial_out(ch, &com_port->thr);
390
391 /*
392 * Call watchdog_reset() upon newline. This is done here in putc
393 * since the environment code uses a single puts() to print the complete
394 * environment upon "printenv". So we can't put this watchdog call
395 * in puts().
396 */
397 if (ch == '\n')
Stefan Roese29caf932022-09-02 14:10:46 +0200398 schedule();
Simon Glass12e431b2014-09-04 16:27:34 -0600399
400 return 0;
401}
402
403static int ns16550_serial_pending(struct udevice *dev, bool input)
404{
Simon Glassd30c7202020-12-22 19:30:18 -0700405 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600406
407 if (input)
Mario Six4dbf9be2018-01-15 11:09:49 +0100408 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
Simon Glass12e431b2014-09-04 16:27:34 -0600409 else
Mario Six4dbf9be2018-01-15 11:09:49 +0100410 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
Simon Glass12e431b2014-09-04 16:27:34 -0600411}
412
413static int ns16550_serial_getc(struct udevice *dev)
414{
Simon Glassd30c7202020-12-22 19:30:18 -0700415 struct ns16550 *const com_port = dev_get_priv(dev);
Stefan Roese7fded0c2017-08-16 17:37:15 +0200416
417 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass12e431b2014-09-04 16:27:34 -0600418 return -EAGAIN;
419
Stefan Roese7fded0c2017-08-16 17:37:15 +0200420 return serial_in(&com_port->rbr);
Simon Glass12e431b2014-09-04 16:27:34 -0600421}
422
423static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
424{
Simon Glassd30c7202020-12-22 19:30:18 -0700425 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass8a8d24b2020-12-03 16:55:23 -0700426 struct ns16550_plat *plat = com_port->plat;
Simon Glass12e431b2014-09-04 16:27:34 -0600427 int clock_divisor;
428
429 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
430
Simon Glass2d6bf752020-12-22 19:30:19 -0700431 ns16550_setbrg(com_port, clock_divisor);
Simon Glass12e431b2014-09-04 16:27:34 -0600432
433 return 0;
434}
435
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100436static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
437{
Simon Glassd30c7202020-12-22 19:30:18 -0700438 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Goldschmidt9ad3b042018-11-02 21:28:08 +0100439 int lcr_val = UART_LCR_WLS_8;
440 uint parity = SERIAL_GET_PARITY(serial_config);
441 uint bits = SERIAL_GET_BITS(serial_config);
442 uint stop = SERIAL_GET_STOP(serial_config);
443
444 /*
445 * only parity config is implemented, check if other serial settings
446 * are the default one.
447 */
448 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
449 return -ENOTSUPP; /* not supported in driver*/
450
451 switch (parity) {
452 case SERIAL_PAR_NONE:
453 /* no bits to add */
454 break;
455 case SERIAL_PAR_ODD:
456 lcr_val |= UART_LCR_PEN;
457 break;
458 case SERIAL_PAR_EVEN:
459 lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
460 break;
461 default:
462 return -ENOTSUPP; /* not supported in driver*/
463 }
464
465 serial_out(lcr_val, &com_port->lcr);
466 return 0;
467}
468
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200469static int ns16550_serial_getinfo(struct udevice *dev,
470 struct serial_device_info *info)
471{
Simon Glassd30c7202020-12-22 19:30:18 -0700472 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass8a8d24b2020-12-03 16:55:23 -0700473 struct ns16550_plat *plat = com_port->plat;
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200474
475 info->type = SERIAL_CHIP_16550_COMPATIBLE;
476#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
477 info->addr_space = SERIAL_ADDRESS_SPACE_IO;
478#else
479 info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
480#endif
481 info->addr = plat->base;
482 info->reg_width = plat->reg_width;
483 info->reg_shift = plat->reg_shift;
484 info->reg_offset = plat->reg_offset;
Andy Shevchenko5db92a02020-02-27 17:21:55 +0200485 info->clock = plat->clock;
486
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200487 return 0;
488}
489
Bin Meng09bd0842021-02-03 21:22:40 +0800490static int ns16550_serial_assign_base(struct ns16550_plat *plat, fdt_addr_t base)
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100491{
Bin Meng9e6ce622020-04-03 18:35:32 -0700492 if (base == FDT_ADDR_T_NONE)
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100493 return -EINVAL;
494
495#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Bin Meng9e6ce622020-04-03 18:35:32 -0700496 plat->base = base;
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100497#else
Bin Meng9e6ce622020-04-03 18:35:32 -0700498 plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100499#endif
500
501 return 0;
502}
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100503
Simon Glass12e431b2014-09-04 16:27:34 -0600504int ns16550_serial_probe(struct udevice *dev)
505{
Simon Glass0fd3d912020-12-22 19:30:28 -0700506 struct ns16550_plat *plat = dev_get_plat(dev);
Simon Glassd30c7202020-12-22 19:30:18 -0700507 struct ns16550 *const com_port = dev_get_priv(dev);
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800508 struct reset_ctl_bulk reset_bulk;
Bin Meng9e6ce622020-04-03 18:35:32 -0700509 fdt_addr_t addr;
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800510 int ret;
511
Bin Meng9e6ce622020-04-03 18:35:32 -0700512 /*
513 * If we are on PCI bus, either directly attached to a PCI root port,
Simon Glasscaa4daa2020-12-03 16:55:18 -0700514 * or via a PCI bridge, assign plat->base before probing hardware.
Bin Meng9e6ce622020-04-03 18:35:32 -0700515 */
516 if (device_is_on_pci_bus(dev)) {
517 addr = devfdt_get_addr_pci(dev);
518 ret = ns16550_serial_assign_base(plat, addr);
519 if (ret)
520 return ret;
521 }
Wolfgang Wallner720f9e12020-03-02 14:41:14 +0100522
Ley Foon Tanb051eec2018-06-14 18:45:22 +0800523 ret = reset_get_bulk(dev, &reset_bulk);
524 if (!ret)
525 reset_deassert_bulk(&reset_bulk);
Simon Glass12e431b2014-09-04 16:27:34 -0600526
Simon Glassc69cda22020-12-03 16:55:20 -0700527 com_port->plat = dev_get_plat(dev);
Simon Glass2d6bf752020-12-22 19:30:19 -0700528 ns16550_init(com_port, -1);
Simon Glass12e431b2014-09-04 16:27:34 -0600529
530 return 0;
531}
532
Marek Vasut79fd9282016-12-01 02:06:30 +0100533#if CONFIG_IS_ENABLED(OF_CONTROL)
534enum {
535 PORT_NS16550 = 0,
Marek Vasut0b060ee2016-12-01 02:06:31 +0100536 PORT_JZ4780,
Marek Vasut79fd9282016-12-01 02:06:30 +0100537};
538#endif
539
Simon Glass414cc152021-08-07 07:24:03 -0600540#if CONFIG_IS_ENABLED(OF_REAL)
Simon Glassd1998a92020-12-03 16:55:21 -0700541int ns16550_serial_of_to_plat(struct udevice *dev)
Simon Glass12e431b2014-09-04 16:27:34 -0600542{
Simon Glass0fd3d912020-12-22 19:30:28 -0700543 struct ns16550_plat *plat = dev_get_plat(dev);
Marek Vasut0b060ee2016-12-01 02:06:31 +0100544 const u32 port_type = dev_get_driver_data(dev);
Bin Meng9e6ce622020-04-03 18:35:32 -0700545 fdt_addr_t addr;
Masahiro Yamada021abf62016-09-26 20:45:27 +0900546 struct clk clk;
547 int err;
Simon Glass12e431b2014-09-04 16:27:34 -0600548
Bin Meng9e6ce622020-04-03 18:35:32 -0700549 addr = dev_read_addr(dev);
550 err = ns16550_serial_assign_base(plat, addr);
551 if (err && !device_is_on_pci_bus(dev))
552 return err;
553
Philipp Tomsich3d404792017-06-07 18:46:02 +0200554 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
555 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
Andy Shevchenko4e720772018-11-20 23:52:35 +0200556 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
Paul Burton50fce1d2016-09-08 07:47:29 +0100557
558 err = clk_get_by_index(dev, 0, &clk);
559 if (!err) {
560 err = clk_get_rate(&clk);
561 if (!IS_ERR_VALUE(err))
562 plat->clock = err;
Alexandre Courbotab895d62016-09-30 17:37:00 +0900563 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
Paul Burton50fce1d2016-09-08 07:47:29 +0100564 debug("ns16550 failed to get clock\n");
565 return err;
566 }
567
568 if (!plat->clock)
Philipp Tomsich3d404792017-06-07 18:46:02 +0200569 plat->clock = dev_read_u32_default(dev, "clock-frequency",
Tom Rini91092132022-11-16 13:10:28 -0500570 CFG_SYS_NS16550_CLK);
Bin Meng384b62c2021-02-03 22:42:25 +0800571 if (!plat->clock)
Tom Rini91092132022-11-16 13:10:28 -0500572 plat->clock = CFG_SYS_NS16550_CLK;
Thomas Chou8e62d322015-11-19 21:48:05 +0800573 if (!plat->clock) {
574 debug("ns16550 clock not defined\n");
575 return -EINVAL;
576 }
Simon Glass12e431b2014-09-04 16:27:34 -0600577
Heiko Schocher17fa0322017-01-18 08:05:49 +0100578 plat->fcr = UART_FCR_DEFVAL;
Marek Vasut0b060ee2016-12-01 02:06:31 +0100579 if (port_type == PORT_JZ4780)
580 plat->fcr |= UART_FCR_UME;
Marek Vasut65f83802016-12-01 02:06:29 +0100581
Simon Glass12e431b2014-09-04 16:27:34 -0600582 return 0;
583}
Simon Glass11c1a872014-10-22 21:37:05 -0600584#endif
Simon Glass12e431b2014-09-04 16:27:34 -0600585
586const struct dm_serial_ops ns16550_serial_ops = {
587 .putc = ns16550_serial_putc,
588 .pending = ns16550_serial_pending,
589 .getc = ns16550_serial_getc,
590 .setbrg = ns16550_serial_setbrg,
Andy Shevchenko50bf7d02018-11-20 23:52:36 +0200591 .setconfig = ns16550_serial_setconfig,
592 .getinfo = ns16550_serial_getinfo,
Simon Glass12e431b2014-09-04 16:27:34 -0600593};
Thomas Chou8e62d322015-11-19 21:48:05 +0800594
Simon Glass414cc152021-08-07 07:24:03 -0600595#if CONFIG_IS_ENABLED(OF_REAL)
Thomas Choucc4228f2015-12-14 20:45:09 +0800596/*
597 * Please consider existing compatible strings before adding a new
598 * one to keep this table compact. Or you may add a generic "ns16550"
599 * compatible string to your dts.
600 */
Thomas Chou8e62d322015-11-19 21:48:05 +0800601static const struct udevice_id ns16550_serial_ids[] = {
Marek Vasut79fd9282016-12-01 02:06:30 +0100602 { .compatible = "ns16550", .data = PORT_NS16550 },
603 { .compatible = "ns16550a", .data = PORT_NS16550 },
Marek Vasut0b060ee2016-12-01 02:06:31 +0100604 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
Marek Vasut79fd9282016-12-01 02:06:30 +0100605 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
606 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
Thomas Chou8e62d322015-11-19 21:48:05 +0800607 {}
608};
Simon Glass414cc152021-08-07 07:24:03 -0600609#endif /* OF_REAL */
Thomas Chou8e62d322015-11-19 21:48:05 +0800610
Simon Glassb7e29832015-12-13 21:36:59 -0700611#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700612
613/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
614#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
Thomas Chou8e62d322015-11-19 21:48:05 +0800615U_BOOT_DRIVER(ns16550_serial) = {
616 .name = "ns16550_serial",
617 .id = UCLASS_SERIAL,
Simon Glass414cc152021-08-07 07:24:03 -0600618#if CONFIG_IS_ENABLED(OF_REAL)
Thomas Chou8e62d322015-11-19 21:48:05 +0800619 .of_match = ns16550_serial_ids,
Simon Glassd1998a92020-12-03 16:55:21 -0700620 .of_to_plat = ns16550_serial_of_to_plat,
Simon Glass8a8d24b2020-12-03 16:55:23 -0700621 .plat_auto = sizeof(struct ns16550_plat),
Thomas Chou8e62d322015-11-19 21:48:05 +0800622#endif
Simon Glassd30c7202020-12-22 19:30:18 -0700623 .priv_auto = sizeof(struct ns16550),
Thomas Chou8e62d322015-11-19 21:48:05 +0800624 .probe = ns16550_serial_probe,
625 .ops = &ns16550_serial_ops,
Bin Meng46879192018-10-24 06:36:36 -0700626#if !CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glassb7e5a642015-12-04 08:58:38 -0700627 .flags = DM_FLAG_PRE_RELOC,
Bin Meng46879192018-10-24 06:36:36 -0700628#endif
Thomas Chou8e62d322015-11-19 21:48:05 +0800629};
Walter Lozanoaddf3582020-06-25 01:10:06 -0300630
Simon Glassbdf8fd72020-12-28 20:34:57 -0700631DM_DRIVER_ALIAS(ns16550_serial, ti_da830_uart)
Simon Glassb7e29832015-12-13 21:36:59 -0700632#endif
Alexandru Gagniuc6f8c3512017-03-27 12:54:19 -0700633#endif /* SERIAL_PRESENT */
634
Simon Glass12e431b2014-09-04 16:27:34 -0600635#endif /* CONFIG_DM_SERIAL */