blob: 7743c962cfa04fb167d6b941cdadcc5c24940131 [file] [log] [blame]
Masahiro Yamada6e7e9292014-11-07 18:48:31 +09001#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +09006config USB_HOST
7 bool
Tom Rinibe5c0602021-07-09 10:11:56 -04008 select DM_USB
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +09009
Masahiro Yamada6e7e9292014-11-07 18:48:31 +090010config USB_XHCI_HCD
11 bool "xHCI HCD (USB 3.0) support"
Tom Rinibe5c0602021-07-09 10:11:56 -040012 depends on DM && OF_CONTROL
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +090013 select USB_HOST
Masahiro Yamada6e7e9292014-11-07 18:48:31 +090014 ---help---
15 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
16 "SuperSpeed" host controller hardware.
17
Masahiro Yamada6e7e9292014-11-07 18:48:31 +090018if USB_XHCI_HCD
19
Masahiro Yamada10db7502016-06-04 07:35:04 +090020config USB_XHCI_DWC3
21 bool "DesignWare USB3 DRD Core Support"
22 help
23 Say Y or if your system has a Dual Role SuperSpeed
24 USB controller based on the DesignWare USB3 IP Core.
25
Neil Armstrongca7fdc82018-04-11 17:08:00 +020026config USB_XHCI_DWC3_OF_SIMPLE
27 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
Jean-Jacques Hiblot103774b2018-04-12 10:41:10 +020028 depends on DM_USB
Mark Kettenisaaa8d6b2019-06-30 18:01:54 +020029 default y if ARCH_ROCKCHIP
Jean-Jacques Hiblotcc73ba92018-04-12 10:41:11 +020030 default y if DRA7XX
Neil Armstrongca7fdc82018-04-11 17:08:00 +020031 help
32 Support USB2/3 functionality in simple SoC integrations with
33 USB controller based on the DesignWare USB3 IP Core.
34
Chunfeng Yun74102832020-05-02 11:35:18 +020035config USB_XHCI_MTK
36 bool "Support for MediaTek on-chip xHCI USB controller"
37 depends on ARCH_MEDIATEK
38 help
39 Enables support for the on-chip xHCI controller on MediaTek SoCs.
40
Stefan Roese81c1f6f2016-07-14 11:39:20 +020041config USB_XHCI_MVEBU
42 bool "MVEBU USB 3.0 support"
43 default y
44 depends on ARCH_MVEBU
Konstantin Porotchkin81192b72017-02-12 11:10:30 +020045 select DM_REGULATOR
Stefan Roese81c1f6f2016-07-14 11:39:20 +020046 help
47 Choose this option to add support for USB 3.0 driver on mvebu
48 SoCs, which includes Armada8K, Armada3700 and other Armada
49 family SoCs.
50
Stefan Roese92ca2fe2020-08-24 13:04:38 +020051config USB_XHCI_OCTEON
52 bool "Support for Marvell Octeon family on-chip xHCI USB controller"
53 depends on ARCH_OCTEON
54 default y
55 help
56 Enables support for the on-chip xHCI controller on Marvell Octeon
57 family SoCs. This is a driver for the dwc3 to provide the glue logic
58 to configure the controller.
59
Tom Rini8d8d7e92021-09-12 20:32:22 -040060config USB_XHCI_OMAP
61 bool "Support for TI OMAP family xHCI USB controller"
62 depends on ARCH_OMAP2PLUS
63 help
64 Enables support for the on-chip xHCI controller found on some TI SoC
65 families. Note that some families have multiple contollers while
66 others only have something such as DesignWare-based controllers.
67 Consult the SoC documentation to determine if this option applies
68 to your hardware.
69
Bin Mengd7cde282017-07-19 21:50:08 +080070config USB_XHCI_PCI
71 bool "Support for PCI-based xHCI USB controller"
Bin Meng978f6a32017-07-19 21:51:07 +080072 depends on DM_USB
Bin Mengd7cde282017-07-19 21:50:08 +080073 default y if X86
74 help
75 Enables support for the PCI-based xHCI controller.
76
Marek Vasute1cc60c2017-10-15 15:01:29 +020077config USB_XHCI_RCAR
78 bool "Renesas RCar USB 3.0 support"
79 default y
80 depends on ARCH_RMOBILE
81 help
82 Choose this option to add support for USB 3.0 driver on Renesas
83 RCar Gen3 SoCs.
84
Patrice Chotard40d1a312017-09-05 11:04:24 +020085config USB_XHCI_STI
86 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
87 depends on ARCH_STI
88 default y
89 help
90 Enables support for the on-chip xHCI controller on STMicroelectronics
91 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
92 to configure the controller.
93
Uri Mashiachef3f3b82017-02-23 15:39:36 +020094config USB_XHCI_DRA7XX_INDEX
95 int "DRA7XX xHCI USB index"
96 range 0 1
97 default 0
98 depends on DRA7XX
99 help
100 Select the DRA7XX xHCI USB index.
101 Current supported values: 0, 1.
102
Ran Wang420b0eb2017-10-23 10:09:22 +0800103config USB_XHCI_FSL
104 bool "Support for NXP Layerscape on-chip xHCI USB controller"
105 default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
106 depends on !SPL_NO_USB
107 help
108 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
Rayagonda Kokatanur9cadf052020-04-09 09:23:15 +0530109
110config USB_XHCI_BRCM
111 bool "Broadcom USB3 Host XHCI controller"
112 depends on DM_USB
113 help
114 USB controller based on the Broadcom USB3 IP Core.
115 Supports USB2/3 functionality.
116
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900117endif # USB_XHCI_HCD
Alexey Brodkinfee331f2015-12-14 17:18:50 +0300118
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900119config USB_EHCI_HCD
120 bool "EHCI HCD (USB 2.0) support"
Tom Rini64d6ac52017-05-12 22:33:28 -0400121 default y if ARCH_MX5 || ARCH_MX6
Tom Rinibe5c0602021-07-09 10:11:56 -0400122 depends on DM && OF_CONTROL
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900123 select USB_HOST
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900124 ---help---
125 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
126 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
127 If your USB host controller supports USB 2.0, you will likely want to
128 configure this Host Controller Driver.
129
130 EHCI controllers are packaged with "companion" host controllers (OHCI
131 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
132 will connect to EHCI if the device is high speed, otherwise they
133 connect to a companion controller. If you configure EHCI, you should
134 probably configure the OHCI (for NEC and some other vendors) USB Host
135 Controller Driver or UHCI (for Via motherboards) Host Controller
136 Driver too.
137
138 You may want to read <file:Documentation/usb/ehci.txt>.
139
Masahiro Yamada6e7e9292014-11-07 18:48:31 +0900140if USB_EHCI_HCD
141
Marek BehĂșn56882dc2021-10-09 15:27:35 +0200142config USB_EHCI_IS_TDI
143 bool
144
Wenyou Yang17b68b52016-08-05 08:57:35 +0800145config USB_EHCI_ATMEL
146 bool "Support for Atmel on-chip EHCI USB controller"
147 depends on ARCH_AT91
148 default y
149 ---help---
150 Enables support for the on-chip EHCI controller on Atmel chips.
151
Stefan Roesecd482252015-09-01 11:39:44 +0200152config USB_EHCI_MARVELL
Tom Rini80f1f322017-05-12 22:33:29 -0400153 bool "Support for Marvell on-chip EHCI USB controller"
Trevor Woernerbb0fb4c2020-05-06 08:02:40 -0400154 depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
Stefan Roesecd482252015-09-01 11:39:44 +0200155 default y
Marek BehĂșn56882dc2021-10-09 15:27:35 +0200156 select USB_EHCI_IS_TDI if !ARM64
Stefan Roesecd482252015-09-01 11:39:44 +0200157 ---help---
158 Enables support for the on-chip EHCI controller on MVEBU SoCs.
159
Lukasz Majewski400b9722019-04-04 12:26:55 +0200160config USB_EHCI_MX5
161 bool "Support for i.MX5 on-chip EHCI USB controller"
162 depends on ARCH_MX5
Lukasz Majewski400b9722019-04-04 12:26:55 +0200163 help
164 Enables support for the on-chip EHCI controller on i.MX5 SoCs.
165
Nikita Kiryanov919e8022015-07-23 17:19:35 +0300166config USB_EHCI_MX6
Ye Li235f5e12019-10-24 10:29:32 -0300167 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
Giulio Benettie7e81e82021-05-20 16:10:15 +0200168 depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
Nikita Kiryanov919e8022015-07-23 17:19:35 +0300169 default y
170 ---help---
171 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
172
Stefan Agner2deebe22016-07-13 00:25:36 -0700173config USB_EHCI_MX7
174 bool "Support for i.MX7 on-chip EHCI USB controller"
Marek Vasut5e7e2a82021-04-02 14:07:22 +0200175 depends on ARCH_MX7 || IMX8M
176 select PHY if IMX8M
177 select NOP_PHY if IMX8M
Stefan Agner2deebe22016-07-13 00:25:36 -0700178 default y
179 ---help---
180 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
181
Marek BehĂșn7b805002021-10-09 15:27:33 +0200182config USB_EHCI_MXS
Lukasz Majewskif82feb72021-12-22 10:55:06 +0100183 bool "Support for i.MX23/i.MX28 EHCI USB controller"
184 depends on ARCH_MX23 || ARCH_MX28
Marek BehĂșn7b805002021-10-09 15:27:33 +0200185 default y
Marek BehĂșn56882dc2021-10-09 15:27:35 +0200186 select USB_EHCI_IS_TDI
Marek BehĂșn7b805002021-10-09 15:27:33 +0200187 help
Lukasz Majewskif82feb72021-12-22 10:55:06 +0100188 Enables support for the on-chip EHCI controller on i.MX23 and
189 i.MX28 SoCs.
Marek BehĂșn7b805002021-10-09 15:27:33 +0200190
Tom Rini1d1ab612017-05-12 22:33:30 -0400191config USB_EHCI_OMAP
192 bool "Support for OMAP3+ on-chip EHCI USB controller"
193 depends on ARCH_OMAP2PLUS
194 default y
195 ---help---
196 Enables support for the on-chip EHCI controller on OMAP3 and later
197 SoCs.
198
Tom Rini899867a2021-09-12 20:32:28 -0400199if USB_EHCI_OMAP
200
201config HAS_OMAP_EHCI_PHY1_RESET_GPIO
202 bool "PHY #1 requires a GPIO hold to it in RESET while PHY settles"
203 help
204 Enable this to be able to configure the GPIO number used to hold the
205 PHY in RESET for enough time until the PHY is settled and ready.
206
207config OMAP_EHCI_PHY1_RESET_GPIO
208 int "GPIO number to hold PHY #1 in RESET"
209 depends on HAS_OMAP_EHCI_PHY1_RESET_GPIO
210
211config HAS_OMAP_EHCI_PHY2_RESET_GPIO
212 bool "PHY #2 requires a GPIO hold to it in RESET while PHY settles"
213 help
214 Enable this to be able to configure the GPIO number used to hold the
215 PHY in RESET for enough time until the PHY is settled and ready.
216
217config OMAP_EHCI_PHY2_RESET_GPIO
218 int "GPIO number to hold PHY #2 in RESET"
219 depends on HAS_OMAP_EHCI_PHY2_RESET_GPIO
220
221config HAS_OMAP_EHCI_PHY3_RESET_GPIO
222 bool "PHY #3 requires a GPIO hold to it in RESET while PHY settles"
223 help
224 Enable this to be able to configure the GPIO number used to hold the
225 PHY in RESET for enough time until the PHY is settled and ready.
226
227config OMAP_EHCI_PHY3_RESET_GPIO
228 int "GPIO number to hold PHY #3 in RESET"
229 depends on HAS_OMAP_EHCI_PHY3_RESET_GPIO
230
231endif
232
Marcel Ziswiler20df4b52019-03-25 17:24:54 +0100233config USB_EHCI_VF
234 bool "Support for Vybrid on-chip EHCI USB controller"
235 depends on ARCH_VF610
236 default y
237 help
238 Enables support for the on-chip EHCI controller on Vybrid SoCs.
239
Ye Li235f5e12019-10-24 10:29:32 -0300240if USB_EHCI_MX6 || USB_EHCI_MX7
Stefan Agnerc4483092016-07-13 00:25:38 -0700241
242config MXC_USB_OTG_HACTIVE
243 bool "USB Power pin high active"
244 ---help---
245 Set the USB Power pin polarity to be high active (PWR_POL)
246
247endif
248
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200249config USB_EHCI_MSM
250 bool "Support for Qualcomm on-chip EHCI USB controller"
251 depends on DM_USB
252 select USB_ULPI_VIEWPORT
Ramon Fried0ac0b6e2018-09-21 13:35:50 +0300253 select MSM8916_USB_PHY
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200254 ---help---
255 Enables support for the on-chip EHCI controller on Qualcomm
256 Snapdragon SoCs.
Mateusz Kulikowski5a822112016-03-31 23:12:26 +0200257
Bin Menga11a5b82017-08-09 00:21:54 -0700258config USB_EHCI_PCI
259 bool "Support for PCI-based EHCI USB controller"
260 default y if X86
261 help
262 Enables support for the PCI-based EHCI controller.
263
Peter Robinson747fed52019-02-20 12:17:27 +0000264config USB_EHCI_TEGRA
265 bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
Trevor Woerner18138ab2020-05-06 08:02:41 -0400266 depends on ARCH_TEGRA
Marek BehĂșn56882dc2021-10-09 15:27:35 +0200267 select USB_EHCI_IS_TDI
Peter Robinson747fed52019-02-20 12:17:27 +0000268 ---help---
269 Enable support for Tegra on-chip EHCI USB controller
270
Siva Durga Prasad Paladugu2cdc7782016-07-22 14:51:51 +0530271config USB_EHCI_ZYNQ
272 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
Michal Simek54fdef22020-08-24 14:41:51 +0200273 default y if ARCH_ZYNQ
Marek BehĂșn56882dc2021-10-09 15:27:35 +0200274 select USB_EHCI_IS_TDI
Siva Durga Prasad Paladugu2cdc7782016-07-22 14:51:51 +0530275 ---help---
276 Enable support for Zynq on-chip EHCI USB controller
277
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300278config USB_EHCI_GENERIC
279 bool "Support for generic EHCI USB controller"
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300280 depends on DM_USB
Jagan Teki29d280c2018-12-22 18:18:10 +0530281 default ARCH_SUNXI
Alexey Brodkin90fbb282015-12-02 12:32:02 +0300282 ---help---
283 Enables support for generic EHCI controller.
284
Ran Wang91f4fb92017-12-20 10:34:20 +0800285config USB_EHCI_FSL
286 bool "Support for FSL on-chip EHCI USB controller"
Ran Wang91f4fb92017-12-20 10:34:20 +0800287 select CONFIG_EHCI_HCD_INIT_AFTER_RESET
288 ---help---
289 Enables support for the on-chip EHCI controller on FSL chips.
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900290endif # USB_EHCI_HCD
291
292config USB_OHCI_HCD
293 bool "OHCI HCD (USB 1.1) support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400294 depends on DM && OF_CONTROL
295 select USB_HOST
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900296 ---help---
297 The Open Host Controller Interface (OHCI) is a standard for accessing
298 USB 1.1 host controller hardware. It does more in hardware than Intel's
299 UHCI specification. If your USB host controller follows the OHCI spec,
300 say Y. On most non-x86 systems, and on x86 hardware that's not using a
301 USB controller from Intel or VIA, this is appropriate. If your host
302 controller doesn't use PCI, this is probably appropriate. For a PCI
303 based system where you're not sure, the "lspci -v" entry will list the
304 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
305
Tom Rinibe5c0602021-07-09 10:11:56 -0400306if USB_OHCI_HCD
307
Heiko Schocher991e6602019-07-16 10:49:07 +0200308config USB_OHCI_PCI
309 bool "Support for PCI-based OHCI USB controller"
Tom Rinibe5c0602021-07-09 10:11:56 -0400310 depends on PCI
Heiko Schocher991e6602019-07-16 10:49:07 +0200311 help
312 Enables support for the PCI-based OHCI controller.
313
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900314config USB_OHCI_GENERIC
315 bool "Support for generic OHCI USB controller"
Jagan Teki29d280c2018-12-22 18:18:10 +0530316 default ARCH_SUNXI
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900317 ---help---
318 Enables support for generic OHCI controller.
319
Adam Ford9da54742019-04-30 05:21:41 -0500320config USB_OHCI_DA8XX
321 bool "Support for da850 OHCI USB controller"
322 help
323 Enable support for the da850 USB controller.
324
Masahiro Yamada93cb8242016-08-01 00:16:32 +0900325endif # USB_OHCI_HCD
Masahiro Yamada96d82842016-08-01 00:16:33 +0900326
327config USB_UHCI_HCD
328 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada2b58e1b2016-08-01 00:16:34 +0900329 select USB_HOST
Masahiro Yamada96d82842016-08-01 00:16:33 +0900330 ---help---
331 The Universal Host Controller Interface is a standard by Intel for
332 accessing the USB hardware in the PC (which is also called the USB
333 host controller). If your USB host controller conforms to this
334 standard, you may want to say Y, but see below. All recent boards
335 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
336 i810, i820) conform to this standard. Also all VIA PCI chipsets
337 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
338 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
339 If unsure, say Y.
340
341if USB_UHCI_HCD
342
343endif # USB_UHCI_HCD
Philipp Tomsich4ac72f52017-07-03 18:30:06 +0200344
345config USB_DWC2
346 bool "DesignWare USB2 Core support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400347 depends on DM && OF_CONTROL
Philipp Tomsich4ac72f52017-07-03 18:30:06 +0200348 select USB_HOST
349 ---help---
350 The DesignWare USB 2.0 controller is compliant with the
351 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
352 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
353 operation is compliant to the controller Supplement. If you want to
354 enable this controller in host mode, say Y.
Alexey Brodkin42637fd2018-02-28 16:16:58 +0300355
356if USB_DWC2
357config USB_DWC2_BUFFER_SIZE
358 int "Data buffer size in kB"
359 default 64
360 ---help---
361 By default 64 kB buffer is used but if amount of RAM avaialble on
362 the target is not enough to accommodate allocation of buffer of
363 that size it is possible to shrink it. Smaller sizes should be fine
364 because larger transactions could be split in smaller ones.
365
366endif # USB_DWC2
Marek Vasuta3d65652019-08-11 13:23:43 +0200367
368config USB_R8A66597_HCD
369 bool "Renesas R8A66597 USB Core support"
Tom Rinibe5c0602021-07-09 10:11:56 -0400370 depends on DM && OF_CONTROL
Marek Vasuta3d65652019-08-11 13:23:43 +0200371 select USB_HOST
372 ---help---
373 This enables support for the on-chip Renesas R8A66597 USB 2.0
374 controller, present in various RZ and SH SoCs.