Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 3 | config ROCKCHIP_PX30 |
| 4 | bool "Support Rockchip PX30" |
| 5 | select ARM64 |
| 6 | select SUPPORT_SPL |
| 7 | select SUPPORT_TPL |
| 8 | select SPL |
| 9 | select TPL |
| 10 | select TPL_TINY_FRAMEWORK if TPL |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 11 | select TPL_NEEDS_SEPARATE_STACK if TPL |
| 12 | imply SPL_SEPARATE_BSS |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 13 | select SPL_SERIAL |
| 14 | select TPL_SERIAL |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 15 | select DEBUG_UART_BOARD_INIT |
| 16 | imply ROCKCHIP_COMMON_BOARD |
| 17 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 18 | help |
| 19 | The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 |
| 20 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 21 | and video codec support. Peripherals include Gigabit Ethernet, |
| 22 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 23 | |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 24 | config ROCKCHIP_RK3036 |
| 25 | bool "Support Rockchip RK3036" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 26 | select CPU_V7A |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 27 | select SUPPORT_SPL |
| 28 | select SPL |
Eddie Cai | 451dcf5 | 2018-01-17 09:51:41 +0800 | [diff] [blame] | 29 | imply USB_FUNCTION_ROCKUSB |
| 30 | imply CMD_ROCKUSB |
Kever Yang | c0c2a2e | 2019-07-22 20:02:04 +0800 | [diff] [blame] | 31 | imply ROCKCHIP_COMMON_BOARD |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 32 | help |
| 33 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 34 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 35 | and video codec support. Peripherals include Gigabit Ethernet, |
| 36 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 37 | |
Johan Jonker | 33f4750 | 2022-04-16 17:09:47 +0200 | [diff] [blame] | 38 | config ROCKCHIP_RK3066 |
| 39 | bool "Support Rockchip RK3066" |
| 40 | select CPU_V7A |
| 41 | select SPL_BOARD_INIT if SPL |
| 42 | select SUPPORT_SPL |
| 43 | select SUPPORT_TPL |
| 44 | select SPL |
| 45 | select TPL |
| 46 | select TPL_ROCKCHIP_BACK_TO_BROM |
| 47 | select TPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 48 | imply ROCKCHIP_COMMON_BOARD |
| 49 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 50 | imply SPL_SERIAL |
| 51 | imply TPL_ROCKCHIP_COMMON_BOARD |
| 52 | imply TPL_SERIAL |
| 53 | help |
| 54 | The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 |
| 55 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two |
| 56 | video interfaces, several memory options and video codec support. |
| 57 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, |
| 58 | UART, SPI, I2C and PWMs. |
| 59 | |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 60 | config ROCKCHIP_RK3128 |
| 61 | bool "Support Rockchip RK3128" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 62 | select CPU_V7A |
Kever Yang | 7e719d9 | 2019-07-22 20:02:05 +0800 | [diff] [blame] | 63 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 64 | help |
| 65 | The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 |
| 66 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 67 | and video codec support. Peripherals include Gigabit Ethernet, |
| 68 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 69 | |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 70 | config ROCKCHIP_RK3188 |
| 71 | bool "Support Rockchip RK3188" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 72 | select CPU_V7A |
Ley Foon Tan | 0680f1b | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 73 | select SPL_BOARD_INIT if SPL |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 74 | select SUPPORT_SPL |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 75 | select SPL |
Philipp Tomsich | 4bbb05b | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 76 | select SPL_CLK |
Philipp Tomsich | 4bbb05b | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 77 | select SPL_REGMAP |
| 78 | select SPL_SYSCON |
| 79 | select SPL_RAM |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 80 | select SPL_DRIVERS_MISC |
Philipp Tomsich | 4d9253f | 2017-10-10 16:21:15 +0200 | [diff] [blame] | 81 | select SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 82 | select SPL_ROCKCHIP_BACK_TO_BROM |
Heiko Stübner | 008a610 | 2017-04-06 00:19:36 +0200 | [diff] [blame] | 83 | select BOARD_LATE_INIT |
Kever Yang | a97b65a | 2019-07-22 20:02:09 +0800 | [diff] [blame] | 84 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 4eb5063 | 2019-07-22 19:59:18 +0800 | [diff] [blame] | 85 | imply SPL_ROCKCHIP_COMMON_BOARD |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 86 | help |
| 87 | The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 |
| 88 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two |
| 89 | video interfaces, several memory options and video codec support. |
| 90 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, |
| 91 | UART, SPI, I2C and PWMs. |
| 92 | |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 93 | config ROCKCHIP_RK322X |
| 94 | bool "Support Rockchip RK3228/RK3229" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 95 | select CPU_V7A |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 96 | select SUPPORT_SPL |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 97 | select SUPPORT_TPL |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 98 | select SPL |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 99 | select SPL_DM |
| 100 | select SPL_OF_LIBFDT |
| 101 | select TPL |
| 102 | select TPL_DM |
| 103 | select TPL_OF_LIBFDT |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 104 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 105 | select SPL_DRIVERS_MISC |
Kever Yang | cca3b09 | 2019-07-22 20:02:07 +0800 | [diff] [blame] | 106 | imply ROCKCHIP_COMMON_BOARD |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 107 | imply SPL_SERIAL |
Kever Yang | 0cd65e4 | 2019-07-22 19:59:20 +0800 | [diff] [blame] | 108 | imply SPL_ROCKCHIP_COMMON_BOARD |
Alex Bee | 1d4b107 | 2023-07-18 16:57:13 +0200 | [diff] [blame] | 109 | select SPL_OPTEE_IMAGE if SPL_FIT |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 110 | imply TPL_SERIAL |
Kever Yang | 6ae28a3 | 2019-07-09 22:05:56 +0800 | [diff] [blame] | 111 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | c34643e | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 112 | select TPL_LIBCOMMON_SUPPORT |
| 113 | select TPL_LIBGENERIC_SUPPORT |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 114 | help |
| 115 | The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 |
| 116 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 117 | and video codec support. Peripherals include Gigabit Ethernet, |
| 118 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 119 | |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 120 | config ROCKCHIP_RK3288 |
| 121 | bool "Support Rockchip RK3288" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 122 | select CPU_V7A |
John Keeping | 24fea3f | 2023-02-23 19:28:51 +0000 | [diff] [blame] | 123 | select OF_SYSTEM_SETUP |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 124 | select SKIP_LOWLEVEL_INIT_ONLY |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 125 | select SUPPORT_SPL |
| 126 | select SPL |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 127 | select SUPPORT_TPL |
Jagan Teki | 3807017 | 2020-01-23 19:42:19 +0530 | [diff] [blame] | 128 | imply PRE_CONSOLE_BUFFER |
Kever Yang | de57a9f | 2019-07-22 20:02:15 +0800 | [diff] [blame] | 129 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 60b13c8 | 2019-07-22 19:59:27 +0800 | [diff] [blame] | 130 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 131 | imply TPL_CLK |
| 132 | imply TPL_DM |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 133 | imply TPL_DRIVERS_MISC |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 134 | imply TPL_LIBCOMMON_SUPPORT |
| 135 | imply TPL_LIBGENERIC_SUPPORT |
Kever Yang | 4529084 | 2019-07-02 11:43:06 +0800 | [diff] [blame] | 136 | imply TPL_NEEDS_SEPARATE_STACK |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 137 | imply TPL_OF_CONTROL |
| 138 | imply TPL_OF_PLATDATA |
| 139 | imply TPL_RAM |
| 140 | imply TPL_REGMAP |
Kever Yang | 3338f54 | 2019-07-09 22:05:57 +0800 | [diff] [blame] | 141 | imply TPL_ROCKCHIP_COMMON_BOARD |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 142 | imply TPL_SERIAL |
Kever Yang | d18ca74 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 143 | imply TPL_SYSCON |
Eddie Cai | c3d098e | 2017-12-15 08:17:13 +0800 | [diff] [blame] | 144 | imply USB_FUNCTION_ROCKUSB |
| 145 | imply CMD_ROCKUSB |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 146 | help |
| 147 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 148 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 149 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 150 | and video codec support. Peripherals include Gigabit Ethernet, |
Andreas Färber | ef904bf | 2016-11-02 18:03:01 +0100 | [diff] [blame] | 151 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 152 | |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 153 | config ROCKCHIP_RK3308 |
| 154 | bool "Support Rockchip RK3308" |
| 155 | select ARM64 |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 156 | select SUPPORT_SPL |
| 157 | select SUPPORT_TPL |
| 158 | select SPL |
| 159 | select SPL_ATF |
| 160 | select SPL_ATF_NO_PLATFORM_PARAM |
| 161 | select SPL_LOAD_FIT |
| 162 | imply ROCKCHIP_COMMON_BOARD |
| 163 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 164 | imply SPL_CLK |
| 165 | imply SPL_REGMAP |
| 166 | imply SPL_SYSCON |
| 167 | imply SPL_RAM |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 168 | imply SPL_SERIAL |
| 169 | imply TPL_SERIAL |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 170 | imply SPL_SEPARATE_BSS |
| 171 | help |
| 172 | The Rockchip RK3308 is a ARM-based Soc which embedded with quad |
| 173 | Cortex-A35 and highly integrated audio interfaces. |
| 174 | |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 175 | config ROCKCHIP_RK3328 |
| 176 | bool "Support Rockchip RK3328" |
| 177 | select ARM64 |
Kever Yang | c009aeb | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 178 | select SUPPORT_SPL |
| 179 | select SPL |
Kever Yang | 3f47db0 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 180 | select SUPPORT_TPL |
| 181 | select TPL |
Kever Yang | 3f47db0 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 182 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 38ed267 | 2019-07-22 20:02:16 +0800 | [diff] [blame] | 183 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | ca93e32 | 2019-11-15 11:04:44 +0800 | [diff] [blame] | 184 | imply ROCKCHIP_SDRAM_COMMON |
Kever Yang | 9cc6704 | 2019-07-22 19:59:32 +0800 | [diff] [blame] | 185 | imply SPL_ROCKCHIP_COMMON_BOARD |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 186 | imply SPL_SERIAL |
| 187 | imply TPL_SERIAL |
Kever Yang | c009aeb | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 188 | imply SPL_SEPARATE_BSS |
| 189 | select ENABLE_ARM_SOC_BOOT0_HOOK |
| 190 | select DEBUG_UART_BOARD_INIT |
| 191 | select SYS_NS16550 |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 192 | help |
| 193 | The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. |
| 194 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 195 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 196 | and video codec support. Peripherals include Gigabit Ethernet, |
| 197 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 198 | |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 199 | config ROCKCHIP_RK3368 |
| 200 | bool "Support Rockchip RK3368" |
| 201 | select ARM64 |
Philipp Tomsich | 5071457 | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 202 | select SUPPORT_SPL |
| 203 | select SUPPORT_TPL |
Philipp Tomsich | 4cf4378 | 2017-07-28 20:03:07 +0200 | [diff] [blame] | 204 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | edaf8db | 2019-07-22 20:02:17 +0800 | [diff] [blame] | 205 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 30d7109 | 2019-07-22 19:59:34 +0800 | [diff] [blame] | 206 | imply SPL_ROCKCHIP_COMMON_BOARD |
Philipp Tomsich | 5071457 | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 207 | imply SPL_SEPARATE_BSS |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 208 | imply SPL_SERIAL |
| 209 | imply TPL_SERIAL |
Kever Yang | 82560cb | 2019-07-09 22:05:58 +0800 | [diff] [blame] | 210 | imply TPL_ROCKCHIP_COMMON_BOARD |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 211 | help |
Philipp Tomsich | 9a8f009 | 2017-06-10 00:47:53 +0200 | [diff] [blame] | 212 | The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised |
| 213 | into a big and little cluster with 4 cores each) Cortex-A53 including |
| 214 | AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache |
| 215 | (for the little cluster), PowerVR G6110 based graphics, one video |
| 216 | output processor supporting LVDS/HDMI/eDP, several DDR3 options and |
| 217 | video codec support. |
| 218 | |
| 219 | On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, |
| 220 | I2S, UARTs, SPI, I2C and PWMs. |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 221 | |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 222 | config ROCKCHIP_RK3399 |
| 223 | bool "Support Rockchip RK3399" |
| 224 | select ARM64 |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 225 | select SUPPORT_SPL |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 226 | select SUPPORT_TPL |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 227 | select SPL |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 228 | select SPL_ATF |
Jagan Teki | adde32d | 2019-06-21 00:25:03 +0530 | [diff] [blame] | 229 | select SPL_BOARD_INIT if SPL |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 230 | select SPL_LOAD_FIT |
| 231 | select SPL_CLK if SPL |
| 232 | select SPL_PINCTRL if SPL |
| 233 | select SPL_RAM if SPL |
| 234 | select SPL_REGMAP if SPL |
| 235 | select SPL_SYSCON if SPL |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 236 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 66e87cc | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 237 | select SPL_SEPARATE_BSS |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 238 | select SPL_SERIAL |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 239 | select SPL_DRIVERS_MISC |
Jagan Teki | 2666bd4 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 240 | select CLK |
| 241 | select FIT |
| 242 | select PINCTRL |
| 243 | select RAM |
| 244 | select REGMAP |
| 245 | select SYSCON |
| 246 | select DM_PMIC |
| 247 | select DM_REGULATOR_FIXED |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 248 | select BOARD_LATE_INIT |
Sughosh Ganu | bea9267 | 2022-11-10 14:49:15 +0530 | [diff] [blame] | 249 | imply PARTITION_TYPE_GUID |
Jagan Teki | 61853a7 | 2020-04-02 17:11:23 +0530 | [diff] [blame] | 250 | imply PRE_CONSOLE_BUFFER |
Kever Yang | 920b013 | 2019-07-22 20:02:19 +0800 | [diff] [blame] | 251 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | a922d0d | 2019-11-15 11:04:45 +0800 | [diff] [blame] | 252 | imply ROCKCHIP_SDRAM_COMMON |
Kever Yang | b7abef2 | 2019-07-22 19:59:42 +0800 | [diff] [blame] | 253 | imply SPL_ROCKCHIP_COMMON_BOARD |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 254 | imply TPL_SERIAL |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 255 | imply TPL_LIBCOMMON_SUPPORT |
| 256 | imply TPL_LIBGENERIC_SUPPORT |
| 257 | imply TPL_SYS_MALLOC_SIMPLE |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 258 | imply TPL_DRIVERS_MISC |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 259 | imply TPL_OF_CONTROL |
| 260 | imply TPL_DM |
| 261 | imply TPL_REGMAP |
| 262 | imply TPL_SYSCON |
| 263 | imply TPL_RAM |
| 264 | imply TPL_CLK |
| 265 | imply TPL_TINY_MEMSET |
Kever Yang | 2738181 | 2019-07-09 22:06:01 +0800 | [diff] [blame] | 266 | imply TPL_ROCKCHIP_COMMON_BOARD |
Jagan Teki | efebc8e | 2020-01-09 14:22:19 +0530 | [diff] [blame] | 267 | imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT |
| 268 | imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 269 | help |
| 270 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 |
| 271 | and quad-core Cortex-A53. |
| 272 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 273 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 274 | and video codec support. Peripherals include Gigabit Ethernet, |
| 275 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 276 | |
Joseph Chen | 2a950e3 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 277 | config ROCKCHIP_RK3568 |
| 278 | bool "Support Rockchip RK3568" |
| 279 | select ARM64 |
Nico Cheng | daec31e | 2021-10-26 10:42:19 +0800 | [diff] [blame] | 280 | select SUPPORT_SPL |
| 281 | select SPL |
Joseph Chen | 2a950e3 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 282 | select CLK |
| 283 | select PINCTRL |
| 284 | select RAM |
| 285 | select REGMAP |
| 286 | select SYSCON |
| 287 | select BOARD_LATE_INIT |
Manoj Sai | 2c99198 | 2023-02-17 17:28:44 +0530 | [diff] [blame] | 288 | select DM_REGULATOR_FIXED |
Jagan Teki | 5f5b1cf | 2023-02-17 17:28:34 +0530 | [diff] [blame] | 289 | select DM_RESET |
Jonas Karlman | 9f41234 | 2023-04-17 19:07:15 +0000 | [diff] [blame] | 290 | imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF |
Joseph Chen | 2a950e3 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 291 | imply ROCKCHIP_COMMON_BOARD |
Jonas Karlman | e1962a9 | 2023-04-17 19:07:17 +0000 | [diff] [blame] | 292 | imply OF_LIBFDT_OVERLAY |
Jonas Karlman | 2eedb6d | 2023-02-22 22:44:41 +0000 | [diff] [blame] | 293 | imply ROCKCHIP_OTP |
| 294 | imply MISC_INIT_R |
Joseph Chen | 2a950e3 | 2021-06-02 15:58:25 +0800 | [diff] [blame] | 295 | help |
| 296 | The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, |
| 297 | including NEON and GPU, 512K L3 cache, Mali-G52 based graphics, |
| 298 | two video interfaces supporting HDMI and eDP, several DDR3 options |
| 299 | and video codec support. Peripherals include Gigabit Ethernet, |
| 300 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 301 | |
Jagan Teki | f5bc992 | 2023-01-30 20:27:45 +0530 | [diff] [blame] | 302 | config ROCKCHIP_RK3588 |
| 303 | bool "Support Rockchip RK3588" |
| 304 | select ARM64 |
| 305 | select SUPPORT_SPL |
| 306 | select SPL |
| 307 | select CLK |
| 308 | select PINCTRL |
| 309 | select RAM |
| 310 | select REGMAP |
| 311 | select SYSCON |
| 312 | select BOARD_LATE_INIT |
Jonas Karlman | 153c87b | 2023-05-17 18:26:37 +0000 | [diff] [blame] | 313 | select DM_REGULATOR_FIXED |
| 314 | select DM_RESET |
Jonas Karlman | 9f41234 | 2023-04-17 19:07:15 +0000 | [diff] [blame] | 315 | imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF |
Jagan Teki | f5bc992 | 2023-01-30 20:27:45 +0530 | [diff] [blame] | 316 | imply ROCKCHIP_COMMON_BOARD |
Jonas Karlman | e1962a9 | 2023-04-17 19:07:17 +0000 | [diff] [blame] | 317 | imply OF_LIBFDT_OVERLAY |
Jonas Karlman | 3a539e0 | 2023-02-22 22:44:41 +0000 | [diff] [blame] | 318 | imply ROCKCHIP_OTP |
| 319 | imply MISC_INIT_R |
Jonas Karlman | 58c2301 | 2023-04-17 19:07:21 +0000 | [diff] [blame] | 320 | imply CLK_SCMI |
| 321 | imply SCMI_FIRMWARE |
Jagan Teki | f5bc992 | 2023-01-30 20:27:45 +0530 | [diff] [blame] | 322 | help |
| 323 | The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and |
| 324 | quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, |
| 325 | HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, |
| 326 | SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet, |
| 327 | SDIO3.0 I2C, UART, SPI, GPIO and PWM. |
| 328 | |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 329 | config ROCKCHIP_RV1108 |
| 330 | bool "Support Rockchip RV1108" |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 331 | select CPU_V7A |
Kever Yang | 26008cd | 2019-07-22 20:02:21 +0800 | [diff] [blame] | 332 | imply ROCKCHIP_COMMON_BOARD |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 333 | help |
| 334 | The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 |
| 335 | and a DSP. |
| 336 | |
Jagan Teki | ffb191e | 2022-12-14 23:21:05 +0530 | [diff] [blame] | 337 | config ROCKCHIP_RV1126 |
| 338 | bool "Support Rockchip RV1126" |
| 339 | select CPU_V7A |
| 340 | select SKIP_LOWLEVEL_INIT_ONLY |
| 341 | select TPL |
| 342 | select SUPPORT_TPL |
| 343 | select TPL_NEEDS_SEPARATE_STACK |
| 344 | select TPL_ROCKCHIP_BACK_TO_BROM |
| 345 | select SPL |
| 346 | select SUPPORT_SPL |
| 347 | select SPL_STACK_R |
| 348 | select CLK |
| 349 | select FIT |
| 350 | select PINCTRL |
| 351 | select RAM |
| 352 | select ROCKCHIP_SDRAM_COMMON |
| 353 | select REGMAP |
| 354 | select SYSCON |
| 355 | select DM_PMIC |
| 356 | select DM_REGULATOR_FIXED |
| 357 | select DM_RESET |
| 358 | select REGULATOR_RK8XX |
| 359 | select PMIC_RK8XX |
| 360 | select BOARD_LATE_INIT |
| 361 | imply ROCKCHIP_COMMON_BOARD |
Jagan Teki | 2fa09b4 | 2023-07-29 19:11:42 +0530 | [diff] [blame] | 362 | imply OF_LIBFDT_OVERLAY |
Jagan Teki | ffb191e | 2022-12-14 23:21:05 +0530 | [diff] [blame] | 363 | imply TPL_DM |
| 364 | imply TPL_LIBCOMMON_SUPPORT |
| 365 | imply TPL_LIBGENERIC_SUPPORT |
| 366 | imply TPL_OF_CONTROL |
| 367 | imply TPL_OF_PLATDATA |
| 368 | imply TPL_RAM |
| 369 | imply TPL_ROCKCHIP_COMMON_BOARD |
| 370 | imply TPL_SERIAL |
| 371 | imply SPL_CLK |
| 372 | imply SPL_DM |
| 373 | imply SPL_DRIVERS_MISC |
| 374 | imply SPL_LIBCOMMON_SUPPORT |
| 375 | imply SPL_LIBGENERIC_SUPPORT |
| 376 | imply SPL_OF_CONTROL |
| 377 | imply SPL_RAM |
| 378 | imply SPL_REGMAP |
| 379 | imply SPL_ROCKCHIP_COMMON_BOARD |
| 380 | imply SPL_SERIAL |
| 381 | imply SPL_SYSCON |
| 382 | |
Heiko Stuebner | 5b5ca4c | 2018-10-08 13:01:56 +0200 | [diff] [blame] | 383 | config ROCKCHIP_USB_UART |
| 384 | bool "Route uart output to usb pins" |
| 385 | help |
| 386 | Rockchip SoCs have the ability to route the signals of the debug |
| 387 | uart through the d+ and d- pins of a specific usb phy to enable |
| 388 | some form of closed-case debugging. With this option supported |
| 389 | SoCs will enable this routing as a debug measure. |
| 390 | |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 391 | config SPL_ROCKCHIP_BACK_TO_BROM |
Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 392 | bool "SPL returns to bootrom" |
| 393 | default y if ROCKCHIP_RK3036 |
Heiko Stübner | 1d84594 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 394 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 395 | select SPL_BOOTROM_SUPPORT |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 396 | depends on SPL |
| 397 | help |
| 398 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 399 | SPL will return to the boot rom, which will then load the U-Boot |
| 400 | binary to keep going on. |
| 401 | |
| 402 | config TPL_ROCKCHIP_BACK_TO_BROM |
| 403 | bool "TPL returns to bootrom" |
Kever Yang | 6bbf5e1 | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 404 | default y |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 405 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bf1133b | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 406 | select TPL_BOOTROM_SUPPORT |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 407 | depends on TPL |
Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 408 | help |
| 409 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 410 | SPL will return to the boot rom, which will then load the U-Boot |
| 411 | binary to keep going on. |
| 412 | |
Kever Yang | 54f17fa | 2019-07-22 20:02:01 +0800 | [diff] [blame] | 413 | config ROCKCHIP_COMMON_BOARD |
| 414 | bool "Rockchip common board file" |
| 415 | help |
| 416 | Rockchip SoCs have similar boot process, Common board file is mainly |
| 417 | in charge of common process of board_init() and board_late_init() for |
| 418 | U-Boot proper. |
| 419 | |
Kever Yang | 49105fb | 2019-07-22 19:59:12 +0800 | [diff] [blame] | 420 | config SPL_ROCKCHIP_COMMON_BOARD |
| 421 | bool "Rockchip SPL common board file" |
| 422 | depends on SPL |
| 423 | help |
| 424 | Rockchip SoCs have similar boot process, SPL is mainly in charge of |
| 425 | load and boot Trust ATF/U-Boot firmware, and DRAM init if there is |
| 426 | no TPL for the board. |
| 427 | |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 428 | config TPL_ROCKCHIP_COMMON_BOARD |
Thomas Hebb | d4e4187 | 2019-12-20 18:05:22 -0800 | [diff] [blame] | 429 | bool "Rockchip TPL common board file" |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 430 | depends on TPL |
| 431 | help |
| 432 | Rockchip SoCs have similar boot process, prefer to use TPL for DRAM |
| 433 | init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL |
| 434 | common board is a basic TPL board init which can be shared for most |
Thomas Hebb | 32f2ca2 | 2019-11-13 18:18:03 -0800 | [diff] [blame] | 435 | of SoCs to avoid copy-paste for different SoCs. |
Kever Yang | 18f8508 | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 436 | |
Jonas Karlman | 4773e9d | 2023-02-25 19:01:34 +0000 | [diff] [blame] | 437 | config ROCKCHIP_EXTERNAL_TPL |
| 438 | bool "Use external TPL binary" |
Jonas Karlman | f7ad291 | 2023-02-28 21:38:25 +0000 | [diff] [blame] | 439 | default y if ROCKCHIP_RK3568 || ROCKCHIP_RK3588 |
Jonas Karlman | 4773e9d | 2023-02-25 19:01:34 +0000 | [diff] [blame] | 440 | help |
| 441 | Some Rockchip SoCs require an external TPL to initialize DRAM. |
| 442 | Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to |
| 443 | include the external TPL in the image built by binman. |
| 444 | |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 445 | config ROCKCHIP_BOOT_MODE_REG |
| 446 | hex "Rockchip boot mode flag register address" |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 447 | help |
Kever Yang | 15f09a1 | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 448 | The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) |
Andy Yan | e306779 | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 449 | according to the value from this register. |
| 450 | |
Chris Morgan | 30975fb | 2022-05-27 13:18:20 -0500 | [diff] [blame] | 451 | config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON |
| 452 | bool "Disable device boot on power plug-in" |
| 453 | depends on PMIC_RK8XX |
| 454 | default n |
| 455 | ---help--- |
| 456 | Say Y here to prevent the device from booting up because of a plug-in |
| 457 | event. When set, the device will boot briefly to determine why it was |
| 458 | powered on, and if it was determined because of a plug-in event |
| 459 | instead of a button press event it will shut back off. |
| 460 | |
Johan Jonker | 5456204 | 2022-04-09 18:55:02 +0200 | [diff] [blame] | 461 | config ROCKCHIP_STIMER |
| 462 | bool "Rockchip STIMER support" |
| 463 | default y |
| 464 | help |
| 465 | Enable Rockchip STIMER support. |
| 466 | |
| 467 | config ROCKCHIP_STIMER_BASE |
| 468 | hex |
| 469 | depends on ROCKCHIP_STIMER |
| 470 | |
Kever Yang | fa1392a | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 471 | config ROCKCHIP_SPL_RESERVE_IRAM |
| 472 | hex "Size of IRAM reserved in SPL" |
Tom Rini | a077ac1 | 2023-08-02 11:09:43 -0400 | [diff] [blame] | 473 | default 0x0 |
Kever Yang | fa1392a | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 474 | help |
| 475 | SPL may need reserve memory for firmware loaded by SPL, whose load |
| 476 | address is in IRAM and may overlay with SPL text area if not |
| 477 | reserved. |
| 478 | |
Heiko Stübner | 1d84594 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 479 | config ROCKCHIP_BROM_HELPER |
| 480 | bool |
| 481 | |
Philipp Tomsich | b377d22 | 2017-10-10 16:21:10 +0200 | [diff] [blame] | 482 | config SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 483 | bool "SPL requires early-return (for RK3188-style BROM) to BROM" |
| 484 | depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 485 | help |
| 486 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 487 | first stage in segments and enter multiple times. E.g. on |
| 488 | the RK3188, the first 1KB of the first stage are loaded |
| 489 | first and entered; after returning to the BROM, the |
| 490 | remainder of the first stage is loaded, but the BROM |
| 491 | re-enters at the same address/to the same code as previously. |
| 492 | |
| 493 | This enables support code in the BOOT0 hook for the SPL stage |
| 494 | to allow multiple entries. |
| 495 | |
| 496 | config TPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 497 | bool "TPL requires early-return (for RK3188-style BROM) to BROM" |
| 498 | depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 499 | help |
| 500 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 501 | first stage in segments and enter multiple times. E.g. on |
| 502 | the RK3188, the first 1KB of the first stage are loaded |
| 503 | first and entered; after returning to the BROM, the |
| 504 | remainder of the first stage is loaded, but the BROM |
| 505 | re-enters at the same address/to the same code as previously. |
| 506 | |
| 507 | This enables support code in the BOOT0 hook for the TPL stage |
| 508 | to allow multiple entries. |
| 509 | |
Simon Glass | 103c5f1 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 510 | config SPL_MMC |
Philipp Tomsich | ee14d29 | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 511 | default y if !SPL_ROCKCHIP_BACK_TO_BROM |
Sandy Patterson | 230e0e0 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 512 | |
Simon Glass | 9b312e2 | 2020-07-19 13:55:57 -0600 | [diff] [blame] | 513 | config ROCKCHIP_SPI_IMAGE |
| 514 | bool "Build a SPI image for rockchip" |
Simon Glass | 9b312e2 | 2020-07-19 13:55:57 -0600 | [diff] [blame] | 515 | help |
| 516 | Some Rockchip SoCs support booting from SPI flash. Enable this |
Quentin Schulz | a4bb36d | 2022-09-02 15:10:54 +0200 | [diff] [blame] | 517 | option to produce a SPI-flash image containing U-Boot. The image |
| 518 | is built by binman. U-Boot sits near the start of the image. |
Simon Glass | 9b312e2 | 2020-07-19 13:55:57 -0600 | [diff] [blame] | 519 | |
Alper Nebi Yasak | b42297b | 2022-01-29 18:27:56 +0300 | [diff] [blame] | 520 | config LNX_KRNL_IMG_TEXT_OFFSET_BASE |
Simon Glass | 9846390 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 521 | default TEXT_BASE |
Alper Nebi Yasak | b42297b | 2022-01-29 18:27:56 +0300 | [diff] [blame] | 522 | |
Heiko Stuebner | e9ccb2f | 2019-07-16 22:18:21 +0200 | [diff] [blame] | 523 | source "arch/arm/mach-rockchip/px30/Kconfig" |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 524 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
Johan Jonker | 33f4750 | 2022-04-16 17:09:47 +0200 | [diff] [blame] | 525 | source "arch/arm/mach-rockchip/rk3066/Kconfig" |
Kever Yang | daeed1d | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 526 | source "arch/arm/mach-rockchip/rk3128/Kconfig" |
Heiko Stübner | 0a2be69 | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 527 | source "arch/arm/mach-rockchip/rk3188/Kconfig" |
Kever Yang | b24a8ec | 2017-06-23 17:17:54 +0800 | [diff] [blame] | 528 | source "arch/arm/mach-rockchip/rk322x/Kconfig" |
Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 529 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 530 | source "arch/arm/mach-rockchip/rk3308/Kconfig" |
Kever Yang | 85a3cfb | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 531 | source "arch/arm/mach-rockchip/rk3328/Kconfig" |
Andreas Färber | 37a0c60 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 532 | source "arch/arm/mach-rockchip/rk3368/Kconfig" |
Kever Yang | a381bcf | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 533 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
Joseph Chen | 695693b | 2021-06-02 16:13:46 +0800 | [diff] [blame] | 534 | source "arch/arm/mach-rockchip/rk3568/Kconfig" |
Jagan Teki | f5bc992 | 2023-01-30 20:27:45 +0530 | [diff] [blame] | 535 | source "arch/arm/mach-rockchip/rk3588/Kconfig" |
Andy Yan | 2c1e11d | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 536 | source "arch/arm/mach-rockchip/rv1108/Kconfig" |
Jagan Teki | ffb191e | 2022-12-14 23:21:05 +0530 | [diff] [blame] | 537 | source "arch/arm/mach-rockchip/rv1126/Kconfig" |
Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 538 | endif |