blob: 5e993383cfb6c54195909e152ee6cb82e0ec13ef [file] [log] [blame]
Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020011 select TPL_NEEDS_SEPARATE_STACK if TPL
12 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -060013 select SPL_SERIAL
14 select TPL_SERIAL
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +020015 select DEBUG_UART_BOARD_INIT
16 imply ROCKCHIP_COMMON_BOARD
17 imply SPL_ROCKCHIP_COMMON_BOARD
18 help
19 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
20 including NEON and GPU, Mali-400 graphics, several DDR3 options
21 and video codec support. Peripherals include Gigabit Ethernet,
22 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
23
Heiko Stübner041cdb52016-07-16 00:17:15 +020024config ROCKCHIP_RK3036
25 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053026 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +080027 select SUPPORT_SPL
28 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +080029 imply USB_FUNCTION_ROCKUSB
30 imply CMD_ROCKUSB
Kever Yangc0c2a2e2019-07-22 20:02:04 +080031 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner041cdb52016-07-16 00:17:15 +020032 help
33 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
34 including NEON and GPU, Mali-400 graphics, several DDR3 options
35 and video codec support. Peripherals include Gigabit Ethernet,
36 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
37
Johan Jonker33f47502022-04-16 17:09:47 +020038config ROCKCHIP_RK3066
39 bool "Support Rockchip RK3066"
40 select CPU_V7A
41 select SPL_BOARD_INIT if SPL
42 select SUPPORT_SPL
43 select SUPPORT_TPL
44 select SPL
45 select TPL
46 select TPL_ROCKCHIP_BACK_TO_BROM
47 select TPL_ROCKCHIP_EARLYRETURN_TO_BROM
48 imply ROCKCHIP_COMMON_BOARD
49 imply SPL_ROCKCHIP_COMMON_BOARD
50 imply SPL_SERIAL
51 imply TPL_ROCKCHIP_COMMON_BOARD
52 imply TPL_SERIAL
53 help
54 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
55 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
56 video interfaces, several memory options and video codec support.
57 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
58 UART, SPI, I2C and PWMs.
59
Kever Yangdaeed1d2017-11-28 16:04:16 +080060config ROCKCHIP_RK3128
61 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053062 select CPU_V7A
Kever Yang7e719d92019-07-22 20:02:05 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yangdaeed1d2017-11-28 16:04:16 +080064 help
65 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
66 including NEON and GPU, Mali-400 graphics, several DDR3 options
67 and video codec support. Peripherals include Gigabit Ethernet,
68 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
69
Heiko Stübner0a2be692017-02-18 19:46:36 +010070config ROCKCHIP_RK3188
71 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053072 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080073 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010074 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010075 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020076 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020077 select SPL_REGMAP
78 select SPL_SYSCON
79 select SPL_RAM
Simon Glass9ca00682021-07-10 21:14:31 -060080 select SPL_DRIVERS_MISC
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020081 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbf1133b2019-07-22 19:59:15 +080082 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020083 select BOARD_LATE_INIT
Kever Yanga97b65a2019-07-22 20:02:09 +080084 imply ROCKCHIP_COMMON_BOARD
Kever Yang4eb50632019-07-22 19:59:18 +080085 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübner0a2be692017-02-18 19:46:36 +010086 help
87 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
88 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
89 video interfaces, several memory options and video codec support.
90 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
91 UART, SPI, I2C and PWMs.
92
Kever Yang168eef72017-06-23 17:17:52 +080093config ROCKCHIP_RK322X
94 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053095 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080096 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080097 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080098 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080099 select SPL_DM
100 select SPL_OF_LIBFDT
101 select TPL
102 select TPL_DM
103 select TPL_OF_LIBFDT
Kever Yangc34643e2019-04-02 20:41:24 +0800104 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass9ca00682021-07-10 21:14:31 -0600105 select SPL_DRIVERS_MISC
Kever Yangcca3b092019-07-22 20:02:07 +0800106 imply ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600107 imply SPL_SERIAL
Kever Yang0cd65e42019-07-22 19:59:20 +0800108 imply SPL_ROCKCHIP_COMMON_BOARD
Alex Bee1d4b1072023-07-18 16:57:13 +0200109 select SPL_OPTEE_IMAGE if SPL_FIT
Simon Glass2a736062021-08-08 12:20:12 -0600110 imply TPL_SERIAL
Kever Yang6ae28a32019-07-09 22:05:56 +0800111 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangc34643e2019-04-02 20:41:24 +0800112 select TPL_LIBCOMMON_SUPPORT
113 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +0800114 help
115 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
116 including NEON and GPU, Mali-400 graphics, several DDR3 options
117 and video codec support. Peripherals include Gigabit Ethernet,
118 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
119
Simon Glass2444dae2015-08-30 16:55:38 -0600120config ROCKCHIP_RK3288
121 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530122 select CPU_V7A
John Keeping24fea3f2023-02-23 19:28:51 +0000123 select OF_SYSTEM_SETUP
Tom Rinia2ac2b92021-08-27 21:18:30 -0400124 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yanga381bcf2016-07-19 21:16:59 +0800125 select SUPPORT_SPL
126 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +0800127 select SUPPORT_TPL
Jagan Teki38070172020-01-23 19:42:19 +0530128 imply PRE_CONSOLE_BUFFER
Kever Yangde57a9f2019-07-22 20:02:15 +0800129 imply ROCKCHIP_COMMON_BOARD
Kever Yang60b13c82019-07-22 19:59:27 +0800130 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +0800131 imply TPL_CLK
132 imply TPL_DM
Simon Glass9ca00682021-07-10 21:14:31 -0600133 imply TPL_DRIVERS_MISC
Kever Yangd18ca742019-07-02 11:43:05 +0800134 imply TPL_LIBCOMMON_SUPPORT
135 imply TPL_LIBGENERIC_SUPPORT
Kever Yang45290842019-07-02 11:43:06 +0800136 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +0800137 imply TPL_OF_CONTROL
138 imply TPL_OF_PLATDATA
139 imply TPL_RAM
140 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +0800141 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600142 imply TPL_SERIAL
Kever Yangd18ca742019-07-02 11:43:05 +0800143 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +0800144 imply USB_FUNCTION_ROCKUSB
145 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -0600146 help
147 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
148 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
149 video interfaces supporting HDMI and eDP, several DDR3 options
150 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100151 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600152
Andy Yanf1a22522019-11-14 11:21:12 +0800153config ROCKCHIP_RK3308
154 bool "Support Rockchip RK3308"
155 select ARM64
Andy Yanf1a22522019-11-14 11:21:12 +0800156 select SUPPORT_SPL
157 select SUPPORT_TPL
158 select SPL
159 select SPL_ATF
160 select SPL_ATF_NO_PLATFORM_PARAM
161 select SPL_LOAD_FIT
162 imply ROCKCHIP_COMMON_BOARD
163 imply SPL_ROCKCHIP_COMMON_BOARD
164 imply SPL_CLK
165 imply SPL_REGMAP
166 imply SPL_SYSCON
167 imply SPL_RAM
Simon Glass2a736062021-08-08 12:20:12 -0600168 imply SPL_SERIAL
Andy Yanf1a22522019-11-14 11:21:12 +0800169 imply SPL_SEPARATE_BSS
170 help
171 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
172 Cortex-A35 and highly integrated audio interfaces.
173
Kever Yang85a3cfb2017-02-23 15:37:51 +0800174config ROCKCHIP_RK3328
175 bool "Support Rockchip RK3328"
176 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300177 select SUPPORT_SPL
178 select SPL
Kever Yang3f47db02019-08-02 10:40:01 +0300179 select SUPPORT_TPL
180 select TPL
Kever Yang3f47db02019-08-02 10:40:01 +0300181 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang38ed2672019-07-22 20:02:16 +0800182 imply ROCKCHIP_COMMON_BOARD
YouMin Chenca93e322019-11-15 11:04:44 +0800183 imply ROCKCHIP_SDRAM_COMMON
Kever Yang9cc67042019-07-22 19:59:32 +0800184 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600185 imply SPL_SERIAL
186 imply TPL_SERIAL
Kever Yangc009aeb2019-06-09 00:27:15 +0300187 imply SPL_SEPARATE_BSS
188 select ENABLE_ARM_SOC_BOOT0_HOOK
189 select DEBUG_UART_BOARD_INIT
190 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800191 help
192 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
193 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
194 video interfaces supporting HDMI and eDP, several DDR3 options
195 and video codec support. Peripherals include Gigabit Ethernet,
196 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
197
Andreas Färber37a0c602017-05-15 17:51:18 +0800198config ROCKCHIP_RK3368
199 bool "Support Rockchip RK3368"
200 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200201 select SUPPORT_SPL
202 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200203 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yangedaf8db2019-07-22 20:02:17 +0800204 imply ROCKCHIP_COMMON_BOARD
Kever Yang30d71092019-07-22 19:59:34 +0800205 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich50714572017-06-11 23:46:25 +0200206 imply SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600207 imply SPL_SERIAL
208 imply TPL_SERIAL
Kever Yang82560cb2019-07-09 22:05:58 +0800209 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800210 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200211 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
212 into a big and little cluster with 4 cores each) Cortex-A53 including
213 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
214 (for the little cluster), PowerVR G6110 based graphics, one video
215 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
216 video codec support.
217
218 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
219 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800220
Kever Yanga381bcf2016-07-19 21:16:59 +0800221config ROCKCHIP_RK3399
222 bool "Support Rockchip RK3399"
223 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800224 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800225 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800226 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530227 select SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530228 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530229 select SPL_LOAD_FIT
230 select SPL_CLK if SPL
231 select SPL_PINCTRL if SPL
232 select SPL_RAM if SPL
233 select SPL_REGMAP if SPL
234 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800235 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800236 select SPL_SEPARATE_BSS
Simon Glass2a736062021-08-08 12:20:12 -0600237 select SPL_SERIAL
Simon Glass9ca00682021-07-10 21:14:31 -0600238 select SPL_DRIVERS_MISC
Jagan Teki2666bd42019-05-08 11:11:43 +0530239 select CLK
240 select FIT
241 select PINCTRL
242 select RAM
243 select REGMAP
244 select SYSCON
245 select DM_PMIC
246 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800247 select BOARD_LATE_INIT
Sughosh Ganubea92672022-11-10 14:49:15 +0530248 imply PARTITION_TYPE_GUID
Jagan Teki61853a72020-04-02 17:11:23 +0530249 imply PRE_CONSOLE_BUFFER
Kever Yang920b0132019-07-22 20:02:19 +0800250 imply ROCKCHIP_COMMON_BOARD
YouMin Chena922d0d2019-11-15 11:04:45 +0800251 imply ROCKCHIP_SDRAM_COMMON
Kever Yangb7abef22019-07-22 19:59:42 +0800252 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glass2a736062021-08-08 12:20:12 -0600253 imply TPL_SERIAL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800254 imply TPL_LIBCOMMON_SUPPORT
255 imply TPL_LIBGENERIC_SUPPORT
256 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass9ca00682021-07-10 21:14:31 -0600257 imply TPL_DRIVERS_MISC
Kever Yang6bbf5e12018-11-09 11:18:15 +0800258 imply TPL_OF_CONTROL
259 imply TPL_DM
260 imply TPL_REGMAP
261 imply TPL_SYSCON
262 imply TPL_RAM
263 imply TPL_CLK
264 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800265 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekiefebc8e2020-01-09 14:22:19 +0530266 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
267 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yanga381bcf2016-07-19 21:16:59 +0800268 help
269 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
270 and quad-core Cortex-A53.
271 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
272 video interfaces supporting HDMI and eDP, several DDR3 options
273 and video codec support. Peripherals include Gigabit Ethernet,
274 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
275
Joseph Chen2a950e32021-06-02 15:58:25 +0800276config ROCKCHIP_RK3568
277 bool "Support Rockchip RK3568"
278 select ARM64
Nico Chengdaec31e2021-10-26 10:42:19 +0800279 select SUPPORT_SPL
280 select SPL
Joseph Chen2a950e32021-06-02 15:58:25 +0800281 select CLK
282 select PINCTRL
283 select RAM
284 select REGMAP
285 select SYSCON
286 select BOARD_LATE_INIT
Manoj Sai2c991982023-02-17 17:28:44 +0530287 select DM_REGULATOR_FIXED
Jagan Teki5f5b1cf2023-02-17 17:28:34 +0530288 select DM_RESET
Jonas Karlman9f412342023-04-17 19:07:15 +0000289 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Joseph Chen2a950e32021-06-02 15:58:25 +0800290 imply ROCKCHIP_COMMON_BOARD
Jonas Karlmane1962a92023-04-17 19:07:17 +0000291 imply OF_LIBFDT_OVERLAY
Jonas Karlman2eedb6d2023-02-22 22:44:41 +0000292 imply ROCKCHIP_OTP
293 imply MISC_INIT_R
Joseph Chen2a950e32021-06-02 15:58:25 +0800294 help
295 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
296 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
297 two video interfaces supporting HDMI and eDP, several DDR3 options
298 and video codec support. Peripherals include Gigabit Ethernet,
299 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
300
Jagan Tekif5bc9922023-01-30 20:27:45 +0530301config ROCKCHIP_RK3588
302 bool "Support Rockchip RK3588"
303 select ARM64
304 select SUPPORT_SPL
305 select SPL
306 select CLK
307 select PINCTRL
308 select RAM
309 select REGMAP
310 select SYSCON
311 select BOARD_LATE_INIT
Jonas Karlman153c87b2023-05-17 18:26:37 +0000312 select DM_REGULATOR_FIXED
313 select DM_RESET
Jonas Karlman9f412342023-04-17 19:07:15 +0000314 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekif5bc9922023-01-30 20:27:45 +0530315 imply ROCKCHIP_COMMON_BOARD
Jonas Karlmane1962a92023-04-17 19:07:17 +0000316 imply OF_LIBFDT_OVERLAY
Jonas Karlman3a539e02023-02-22 22:44:41 +0000317 imply ROCKCHIP_OTP
318 imply MISC_INIT_R
Jonas Karlman58c23012023-04-17 19:07:21 +0000319 imply CLK_SCMI
320 imply SCMI_FIRMWARE
Jagan Tekif5bc9922023-01-30 20:27:45 +0530321 help
322 The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and
323 quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4,
324 HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1,
325 SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet,
326 SDIO3.0 I2C, UART, SPI, GPIO and PWM.
327
Andy Yan2c1e11d2017-06-01 18:00:55 +0800328config ROCKCHIP_RV1108
329 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530330 select CPU_V7A
Kever Yang26008cd2019-07-22 20:02:21 +0800331 imply ROCKCHIP_COMMON_BOARD
Andy Yan2c1e11d2017-06-01 18:00:55 +0800332 help
333 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
334 and a DSP.
335
Jagan Tekiffb191e2022-12-14 23:21:05 +0530336config ROCKCHIP_RV1126
337 bool "Support Rockchip RV1126"
338 select CPU_V7A
339 select SKIP_LOWLEVEL_INIT_ONLY
340 select TPL
341 select SUPPORT_TPL
342 select TPL_NEEDS_SEPARATE_STACK
343 select TPL_ROCKCHIP_BACK_TO_BROM
344 select SPL
345 select SUPPORT_SPL
346 select SPL_STACK_R
347 select CLK
348 select FIT
349 select PINCTRL
350 select RAM
351 select ROCKCHIP_SDRAM_COMMON
352 select REGMAP
353 select SYSCON
354 select DM_PMIC
355 select DM_REGULATOR_FIXED
356 select DM_RESET
357 select REGULATOR_RK8XX
358 select PMIC_RK8XX
359 select BOARD_LATE_INIT
360 imply ROCKCHIP_COMMON_BOARD
Jagan Teki2fa09b42023-07-29 19:11:42 +0530361 imply OF_LIBFDT_OVERLAY
Tim Lunnb01adfe2023-10-31 13:07:15 +1100362 imply ROCKCHIP_OTP
363 imply MISC_INIT_R
Jagan Tekiffb191e2022-12-14 23:21:05 +0530364 imply TPL_DM
365 imply TPL_LIBCOMMON_SUPPORT
366 imply TPL_LIBGENERIC_SUPPORT
367 imply TPL_OF_CONTROL
368 imply TPL_OF_PLATDATA
369 imply TPL_RAM
370 imply TPL_ROCKCHIP_COMMON_BOARD
371 imply TPL_SERIAL
372 imply SPL_CLK
373 imply SPL_DM
374 imply SPL_DRIVERS_MISC
375 imply SPL_LIBCOMMON_SUPPORT
376 imply SPL_LIBGENERIC_SUPPORT
377 imply SPL_OF_CONTROL
378 imply SPL_RAM
379 imply SPL_REGMAP
380 imply SPL_ROCKCHIP_COMMON_BOARD
381 imply SPL_SERIAL
382 imply SPL_SYSCON
383
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200384config ROCKCHIP_USB_UART
385 bool "Route uart output to usb pins"
386 help
387 Rockchip SoCs have the ability to route the signals of the debug
388 uart through the d+ and d- pins of a specific usb phy to enable
389 some form of closed-case debugging. With this option supported
390 SoCs will enable this routing as a debug measure.
391
Philipp Tomsichee14d292017-06-29 11:21:15 +0200392config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800393 bool "SPL returns to bootrom"
394 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100395 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800396 select SPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200397 depends on SPL
398 help
399 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
400 SPL will return to the boot rom, which will then load the U-Boot
401 binary to keep going on.
402
403config TPL_ROCKCHIP_BACK_TO_BROM
404 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800405 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200406 select ROCKCHIP_BROM_HELPER
Kever Yangbf1133b2019-07-22 19:59:15 +0800407 select TPL_BOOTROM_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200408 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800409 help
410 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
411 SPL will return to the boot rom, which will then load the U-Boot
412 binary to keep going on.
413
Kever Yang54f17fa2019-07-22 20:02:01 +0800414config ROCKCHIP_COMMON_BOARD
415 bool "Rockchip common board file"
416 help
417 Rockchip SoCs have similar boot process, Common board file is mainly
418 in charge of common process of board_init() and board_late_init() for
419 U-Boot proper.
420
Kever Yang49105fb2019-07-22 19:59:12 +0800421config SPL_ROCKCHIP_COMMON_BOARD
422 bool "Rockchip SPL common board file"
423 depends on SPL
424 help
425 Rockchip SoCs have similar boot process, SPL is mainly in charge of
426 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
427 no TPL for the board.
428
Kever Yang18f85082019-07-09 22:05:55 +0800429config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbd4e41872019-12-20 18:05:22 -0800430 bool "Rockchip TPL common board file"
Kever Yang18f85082019-07-09 22:05:55 +0800431 depends on TPL
432 help
433 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
434 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
435 common board is a basic TPL board init which can be shared for most
Thomas Hebb32f2ca22019-11-13 18:18:03 -0800436 of SoCs to avoid copy-paste for different SoCs.
Kever Yang18f85082019-07-09 22:05:55 +0800437
Jonas Karlman4773e9d2023-02-25 19:01:34 +0000438config ROCKCHIP_EXTERNAL_TPL
439 bool "Use external TPL binary"
Massimo Pegorer9e13fef2023-09-09 11:33:24 +0200440 default y if ROCKCHIP_RK3308 || ROCKCHIP_RK3568 || ROCKCHIP_RK3588
Jonas Karlman4773e9d2023-02-25 19:01:34 +0000441 help
442 Some Rockchip SoCs require an external TPL to initialize DRAM.
443 Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to
444 include the external TPL in the image built by binman.
445
Andy Yane3067792017-10-11 15:00:16 +0800446config ROCKCHIP_BOOT_MODE_REG
447 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800448 help
Kever Yang15f09a12019-03-28 11:01:23 +0800449 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800450 according to the value from this register.
451
Chris Morgan30975fb2022-05-27 13:18:20 -0500452config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON
453 bool "Disable device boot on power plug-in"
454 depends on PMIC_RK8XX
Chris Morgan30975fb2022-05-27 13:18:20 -0500455 ---help---
456 Say Y here to prevent the device from booting up because of a plug-in
457 event. When set, the device will boot briefly to determine why it was
458 powered on, and if it was determined because of a plug-in event
459 instead of a button press event it will shut back off.
460
Johan Jonker54562042022-04-09 18:55:02 +0200461config ROCKCHIP_STIMER
462 bool "Rockchip STIMER support"
463 default y
464 help
465 Enable Rockchip STIMER support.
466
467config ROCKCHIP_STIMER_BASE
468 hex
469 depends on ROCKCHIP_STIMER
470
Kever Yangfa1392a2017-04-20 17:03:46 +0800471config ROCKCHIP_SPL_RESERVE_IRAM
472 hex "Size of IRAM reserved in SPL"
Tom Rinia077ac12023-08-02 11:09:43 -0400473 default 0x0
Kever Yangfa1392a2017-04-20 17:03:46 +0800474 help
475 SPL may need reserve memory for firmware loaded by SPL, whose load
476 address is in IRAM and may overlay with SPL text area if not
477 reserved.
478
Heiko Stübner1d845942017-02-18 19:46:25 +0100479config ROCKCHIP_BROM_HELPER
480 bool
481
Philipp Tomsichb377d222017-10-10 16:21:10 +0200482config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
483 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
484 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
485 help
486 Some Rockchip BROM variants (e.g. on the RK3188) load the
487 first stage in segments and enter multiple times. E.g. on
488 the RK3188, the first 1KB of the first stage are loaded
489 first and entered; after returning to the BROM, the
490 remainder of the first stage is loaded, but the BROM
491 re-enters at the same address/to the same code as previously.
492
493 This enables support code in the BOOT0 hook for the SPL stage
494 to allow multiple entries.
495
496config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
497 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
498 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
499 help
500 Some Rockchip BROM variants (e.g. on the RK3188) load the
501 first stage in segments and enter multiple times. E.g. on
502 the RK3188, the first 1KB of the first stage are loaded
503 first and entered; after returning to the BROM, the
504 remainder of the first stage is loaded, but the BROM
505 re-enters at the same address/to the same code as previously.
506
507 This enables support code in the BOOT0 hook for the TPL stage
508 to allow multiple entries.
509
Simon Glass103c5f12021-08-08 12:20:09 -0600510config SPL_MMC
Philipp Tomsichee14d292017-06-29 11:21:15 +0200511 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400512
Simon Glass9b312e22020-07-19 13:55:57 -0600513config ROCKCHIP_SPI_IMAGE
514 bool "Build a SPI image for rockchip"
Simon Glass9b312e22020-07-19 13:55:57 -0600515 help
516 Some Rockchip SoCs support booting from SPI flash. Enable this
Quentin Schulza4bb36d2022-09-02 15:10:54 +0200517 option to produce a SPI-flash image containing U-Boot. The image
518 is built by binman. U-Boot sits near the start of the image.
Simon Glass9b312e22020-07-19 13:55:57 -0600519
Alper Nebi Yasakb42297b2022-01-29 18:27:56 +0300520config LNX_KRNL_IMG_TEXT_OFFSET_BASE
Simon Glass98463902022-10-20 18:22:39 -0600521 default TEXT_BASE
Alper Nebi Yasakb42297b2022-01-29 18:27:56 +0300522
Heiko Stuebnere9ccb2f2019-07-16 22:18:21 +0200523source "arch/arm/mach-rockchip/px30/Kconfig"
huang linbe1d5e02015-11-17 14:20:27 +0800524source "arch/arm/mach-rockchip/rk3036/Kconfig"
Johan Jonker33f47502022-04-16 17:09:47 +0200525source "arch/arm/mach-rockchip/rk3066/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800526source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100527source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800528source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200529source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanf1a22522019-11-14 11:21:12 +0800530source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800531source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800532source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800533source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen695693b2021-06-02 16:13:46 +0800534source "arch/arm/mach-rockchip/rk3568/Kconfig"
Jagan Tekif5bc9922023-01-30 20:27:45 +0530535source "arch/arm/mach-rockchip/rk3588/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800536source "arch/arm/mach-rockchip/rv1108/Kconfig"
Jagan Tekiffb191e2022-12-14 23:21:05 +0530537source "arch/arm/mach-rockchip/rv1126/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600538endif