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Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010014
15/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010020 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010021 };
22
Patrick Delaunaya6743132018-07-09 15:17:19 +020023 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020024 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010025 reg = <0xC0000000 0x40000000>;
26 };
Patrice Chotard21299d32018-04-26 17:13:11 +020027
Patrick Delaunayfe915332019-07-30 19:16:12 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Patrick Delaunay62d620c2019-11-06 16:16:33 +010033 mcuram2: mcuram2@10000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10000000 0x40000>;
36 no-map;
37 };
38
39 vdev0vring0: vdev0vring0@10040000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10040000 0x1000>;
42 no-map;
43 };
44
45 vdev0vring1: vdev0vring1@10041000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10041000 0x1000>;
48 no-map;
49 };
50
51 vdev0buffer: vdev0buffer@10042000 {
52 compatible = "shared-dma-pool";
53 reg = <0x10042000 0x4000>;
54 no-map;
55 };
56
57 mcuram: mcuram@30000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x30000000 0x40000>;
60 no-map;
61 };
62
63 retram: retram@38000000 {
64 compatible = "shared-dma-pool";
65 reg = <0x38000000 0x10000>;
66 no-map;
67 };
68
Patrick Delaunayfe915332019-07-30 19:16:12 +020069 gpu_reserved: gpu@e8000000 {
70 reg = <0xe8000000 0x8000000>;
71 no-map;
72 };
73 };
74
Patrice Chotard23661602019-02-12 16:50:38 +010075 aliases {
76 serial0 = &uart4;
77 };
78
Patrice Chotard21299d32018-04-26 17:13:11 +020079 sd_switch: regulator-sd_switch {
80 compatible = "regulator-gpio";
81 regulator-name = "sd_switch";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <2900000>;
84 regulator-type = "voltage";
85 regulator-always-on;
86
87 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
88 gpios-states = <0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +010089 states = <1800000 0x1>,
90 <2900000 0x0>;
91 };
92};
93
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +010094&adc {
95 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
96 pinctrl-0 = <&adc1_in6_pins_a>;
97 pinctrl-names = "default";
98 vdd-supply = <&vdd>;
99 vdda-supply = <&vdda>;
100 vref-supply = <&vdda>;
101 status = "disabled";
102 adc1: adc@0 {
103 st,adc-channels = <0 1 6>;
104 /* 16.5 ck_cycles sampling time */
105 st,min-sample-time-nsecs = <400>;
106 status = "okay";
107 };
108};
109
Patrick Delaunay6f2e0ad2020-05-25 12:19:42 +0200110&cpu0{
111 cpu-supply = <&vddcore>;
112};
113
114&cpu1{
115 cpu-supply = <&vddcore>;
116};
117
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100118&dac {
119 pinctrl-names = "default";
120 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
121 vref-supply = <&vdda>;
122 status = "disabled";
123 dac1: dac@1 {
124 status = "okay";
125 };
126 dac2: dac@2 {
127 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200128 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100129};
130
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200131&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100132 status = "okay";
133};
134
Patrick Delaunayfe915332019-07-30 19:16:12 +0200135&gpu {
136 contiguous-area = <&gpu_reserved>;
Patrick Delaunayfe915332019-07-30 19:16:12 +0200137};
138
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100139&i2c4 {
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200140 pinctrl-names = "default", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100141 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunay500327e2020-07-06 13:26:53 +0200142 pinctrl-1 = <&i2c4_sleep_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100143 i2c-scl-rising-time-ns = <185>;
144 i2c-scl-falling-time-ns = <20>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200145 clock-frequency = <400000>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100146 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200147 /* spare dmas for other usage */
148 /delete-property/dmas;
149 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100150
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200151 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100152 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100153 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200154 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100155 interrupt-controller;
156 #interrupt-cells = <2>;
157 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200158
Patrice Chotard21299d32018-04-26 17:13:11 +0200159 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100160 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200161 ldo1-supply = <&v3v3>;
162 ldo2-supply = <&v3v3>;
163 ldo3-supply = <&vdd_ddr>;
164 ldo5-supply = <&v3v3>;
165 ldo6-supply = <&v3v3>;
166 pwr_sw1-supply = <&bst_out>;
167 pwr_sw2-supply = <&bst_out>;
168
169 vddcore: buck1 {
170 regulator-name = "vddcore";
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100171 regulator-min-microvolt = <1200000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200172 regulator-max-microvolt = <1350000>;
173 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200174 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200175 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200176 };
177
178 vdd_ddr: buck2 {
179 regulator-name = "vdd_ddr";
180 regulator-min-microvolt = <1350000>;
181 regulator-max-microvolt = <1350000>;
182 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200183 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200184 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200185 };
186
187 vdd: buck3 {
188 regulator-name = "vdd";
189 regulator-min-microvolt = <3300000>;
190 regulator-max-microvolt = <3300000>;
191 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200192 st,mask-reset;
193 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200194 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200195 };
196
197 v3v3: buck4 {
198 regulator-name = "v3v3";
199 regulator-min-microvolt = <3300000>;
200 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200201 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200202 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200203 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200204 };
205
206 vdda: ldo1 {
207 regulator-name = "vdda";
208 regulator-min-microvolt = <2900000>;
209 regulator-max-microvolt = <2900000>;
210 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200211 };
212
213 v2v8: ldo2 {
214 regulator-name = "v2v8";
215 regulator-min-microvolt = <2800000>;
216 regulator-max-microvolt = <2800000>;
217 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200218 };
219
220 vtt_ddr: ldo3 {
221 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200222 regulator-min-microvolt = <500000>;
223 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200224 regulator-always-on;
225 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200226 };
227
228 vdd_usb: ldo4 {
229 regulator-name = "vdd_usb";
Patrice Chotard21299d32018-04-26 17:13:11 +0200230 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200231 };
232
233 vdd_sd: ldo5 {
234 regulator-name = "vdd_sd";
235 regulator-min-microvolt = <2900000>;
236 regulator-max-microvolt = <2900000>;
237 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200238 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200239 };
240
241 v1v8: ldo6 {
242 regulator-name = "v1v8";
243 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <1800000>;
245 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200246 };
247
248 vref_ddr: vref_ddr {
249 regulator-name = "vref_ddr";
250 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200251 };
252
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100253 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200254 regulator-name = "bst_out";
255 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100256 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200257
258 vbus_otg: pwr_sw1 {
259 regulator-name = "vbus_otg";
260 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200261 };
262
263 vbus_sw: pwr_sw2 {
264 regulator-name = "vbus_sw";
265 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100266 regulator-active-discharge = <1>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200267 };
268 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200269
270 onkey {
271 compatible = "st,stpmic1-onkey";
272 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
273 interrupt-names = "onkey-falling", "onkey-rising";
274 power-off-time-sec = <10>;
275 status = "okay";
276 };
277
278 watchdog {
279 compatible = "st,stpmic1-wdt";
280 status = "disabled";
281 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100282 };
283};
284
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200285&ipcc {
286 status = "okay";
287};
288
Patrice Chotard23661602019-02-12 16:50:38 +0100289&iwdg2 {
290 timeout-sec = <32>;
291 status = "okay";
292};
293
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200294&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100295 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
296 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200297 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
298 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100299 interrupt-parent = <&exti>;
300 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200301 status = "okay";
302};
303
Patrick Delaunay7915b992020-01-28 10:10:59 +0100304&pwr_regulators {
305 vdd-supply = <&vdd>;
306 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200307};
308
Patrice Chotard23661602019-02-12 16:50:38 +0100309&rng1 {
310 status = "okay";
311};
312
313&rtc {
314 status = "okay";
315};
316
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100317&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200318 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100319 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200320 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
321 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200322 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
323 disable-wp;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100324 st,sig-dir;
325 st,neg-edge;
326 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100327 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200328 vmmc-supply = <&vdd_sd>;
329 vqmmc-supply = <&sd_switch>;
Patrick Delaunay500327e2020-07-06 13:26:53 +0200330 sd-uhs-sdr12;
331 sd-uhs-sdr25;
332 sd-uhs-sdr50;
333 sd-uhs-ddr50;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100334 status = "okay";
335};
336
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100337&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100338 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100339 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100340 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
341 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100342 non-removable;
343 no-sd;
344 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100345 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100346 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200347 vmmc-supply = <&v3v3>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200348 vqmmc-supply = <&vdd>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100349 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100350 status = "okay";
351};
352
Patrice Chotard23661602019-02-12 16:50:38 +0100353&timers6 {
354 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200355 /* spare dmas for other usage */
356 /delete-property/dmas;
357 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100358 timer@5 {
359 status = "okay";
360 };
361};
362
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100363&uart4 {
Patrick Delaunay62f95af2020-09-16 10:01:32 +0200364 pinctrl-names = "default", "sleep", "idle";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100365 pinctrl-0 = <&uart4_pins_a>;
Patrick Delaunay62f95af2020-09-16 10:01:32 +0200366 pinctrl-1 = <&uart4_sleep_pins_a>;
367 pinctrl-2 = <&uart4_idle_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100368 status = "okay";
369};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200370
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200371&usbotg_hs {
372 vbus-supply = <&vbus_otg>;
373};
374
Patrick Delaunaya6743132018-07-09 15:17:19 +0200375&usbphyc_port0 {
376 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200377};
378
379&usbphyc_port1 {
380 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200381};