Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 1 | if ARCH_STM32MP |
| 2 | |
| 3 | config SPL |
Patrick Delaunay | 97f7e39 | 2020-07-24 11:13:31 +0200 | [diff] [blame] | 4 | select SPL_BOARD_INIT |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 5 | select SPL_CLK |
| 6 | select SPL_DM |
| 7 | select SPL_DM_SEQ_ALIAS |
Patrick Delaunay | bc06134 | 2018-07-09 15:17:21 +0200 | [diff] [blame] | 8 | select SPL_DRIVERS_MISC_SUPPORT |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 9 | select SPL_FRAMEWORK |
| 10 | select SPL_GPIO_SUPPORT |
| 11 | select SPL_LIBCOMMON_SUPPORT |
| 12 | select SPL_LIBGENERIC_SUPPORT |
| 13 | select SPL_OF_CONTROL |
| 14 | select SPL_OF_TRANSLATE |
| 15 | select SPL_PINCTRL |
| 16 | select SPL_REGMAP |
Ley Foon Tan | bfc6bae | 2018-06-14 18:45:19 +0800 | [diff] [blame] | 17 | select SPL_DM_RESET |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 18 | select SPL_SERIAL_SUPPORT |
Patrick Delaunay | 49ef8e1 | 2019-07-30 19:16:36 +0200 | [diff] [blame] | 19 | select SPL_SPI_LOAD |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 20 | select SPL_SYSCON |
Patrick Delaunay | 9cd8b9f | 2019-07-30 19:16:33 +0200 | [diff] [blame] | 21 | select SPL_WATCHDOG_SUPPORT if WATCHDOG |
Patrick Delaunay | 27a986d | 2019-04-18 17:32:47 +0200 | [diff] [blame] | 22 | imply BOOTSTAGE_STASH if SPL_BOOTSTAGE |
| 23 | imply SPL_BOOTSTAGE if BOOTSTAGE |
Patrick Delaunay | 006ea18 | 2019-02-27 17:01:14 +0100 | [diff] [blame] | 24 | imply SPL_DISPLAY_PRINT |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 25 | imply SPL_LIBDISK_SUPPORT |
| 26 | |
| 27 | config SYS_SOC |
| 28 | default "stm32mp" |
| 29 | |
Patrick Delaunay | ef84ddd | 2019-04-18 17:32:36 +0200 | [diff] [blame] | 30 | config SYS_MALLOC_LEN |
| 31 | default 0x2000000 |
| 32 | |
Patrick Delaunay | 579a3e7 | 2019-04-18 17:32:37 +0200 | [diff] [blame] | 33 | config ENV_SIZE |
Patrice Chotard | 1538e1a | 2019-05-07 18:40:47 +0200 | [diff] [blame] | 34 | default 0x2000 |
Patrick Delaunay | 579a3e7 | 2019-04-18 17:32:37 +0200 | [diff] [blame] | 35 | |
Patrick Delaunay | 8462548 | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 36 | config STM32MP15x |
| 37 | bool "Support STMicroelectronics STM32MP15x Soc" |
Patrick Delaunay | 654706b | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 38 | select ARCH_SUPPORT_PSCI if !TFABOOT |
| 39 | select ARM_SMCCC if TFABOOT |
Lokesh Vutla | acf1500 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 40 | select CPU_V7A |
Patrick Delaunay | 654706b | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 41 | select CPU_V7_HAS_NONSEC if !TFABOOT |
Patrick Delaunay | 41c7977 | 2018-04-16 10:13:24 +0200 | [diff] [blame] | 42 | select CPU_V7_HAS_VIRT |
Patrick Delaunay | e81f8d1 | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 43 | select OF_BOARD_SETUP |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 44 | select PINCTRL_STM32 |
Patrick Delaunay | d090cba | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 45 | select STM32_RCC |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 46 | select STM32_RESET |
Patrick Delaunay | 16a0722 | 2019-07-30 19:16:25 +0200 | [diff] [blame] | 47 | select STM32_SERIAL |
Andre Przywara | 7842b6a | 2018-04-12 04:24:46 +0300 | [diff] [blame] | 48 | select SYS_ARCH_TIMER |
Patrick Delaunay | c16cba8 | 2020-07-02 17:43:45 +0200 | [diff] [blame] | 49 | imply CMD_NVEDIT_INFO |
Patrick Delaunay | 654706b | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 50 | imply SYSRESET_PSCI if TFABOOT |
| 51 | imply SYSRESET_SYSCON if !TFABOOT |
Patrick Delaunay | 8462548 | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 52 | help |
| 53 | support of STMicroelectronics SOC STM32MP15x family |
| 54 | STM32MP157, STM32MP153 or STM32MP151 |
| 55 | STMicroelectronics MPU with core ARMv7 |
| 56 | dual core A7 for STM32MP157/3, monocore for STM32MP151 |
| 57 | target all the STMicroelectronics board with SOC STM32MP1 family |
| 58 | |
| 59 | choice |
| 60 | prompt "STM32MP15x board select" |
| 61 | optional |
| 62 | |
| 63 | config TARGET_ST_STM32MP15x |
| 64 | bool "STMicroelectronics STM32MP15x boards" |
| 65 | select STM32MP15x |
Patrick Delaunay | 3419982 | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 66 | imply BOOTCOUNT_LIMIT |
Patrick Delaunay | 15ac0c7 | 2020-03-10 10:15:03 +0100 | [diff] [blame] | 67 | imply BOOTSTAGE |
Patrick Delaunay | 3419982 | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 68 | imply CMD_BOOTCOUNT |
Patrick Delaunay | 15ac0c7 | 2020-03-10 10:15:03 +0100 | [diff] [blame] | 69 | imply CMD_BOOTSTAGE |
Patrick Delaunay | eee1580 | 2019-12-03 09:38:58 +0100 | [diff] [blame] | 70 | imply CMD_CLS if CMD_BMP |
Patrick Delaunay | a67d958 | 2019-07-30 19:16:26 +0200 | [diff] [blame] | 71 | imply DISABLE_CONSOLE |
Patrick Delaunay | 6755198 | 2019-07-30 19:16:23 +0200 | [diff] [blame] | 72 | imply PRE_CONSOLE_BUFFER |
Patrick Delaunay | c50c928 | 2019-07-30 19:16:22 +0200 | [diff] [blame] | 73 | imply SILENT_CONSOLE |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 74 | help |
Patrick Delaunay | 8462548 | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 75 | target the STMicroelectronics board with SOC STM32MP15x |
| 76 | managed by board/st/stm32mp1: |
| 77 | Evalulation board (EV1) or Discovery board (DK1 and DK2). |
| 78 | The difference between board are managed with devicetree |
| 79 | |
Marek Vasut | 1995373 | 2020-01-24 18:39:16 +0100 | [diff] [blame] | 80 | config TARGET_DH_STM32MP1_PDK2 |
| 81 | bool "DH STM32MP1 PDK2" |
| 82 | select STM32MP15x |
| 83 | imply BOOTCOUNT_LIMIT |
| 84 | imply CMD_BOOTCOUNT |
| 85 | help |
| 86 | Target the DH PDK2 development kit with STM32MP15x SoM. |
| 87 | |
Patrick Delaunay | 8462548 | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 88 | endchoice |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 89 | |
| 90 | config SYS_TEXT_BASE |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 91 | default 0xC0100000 |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 92 | |
Patrick Delaunay | 45ccdb6 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 93 | config NR_DRAM_BANKS |
| 94 | default 1 |
| 95 | |
Patrick Delaunay | 67f9f11 | 2020-09-04 12:55:19 +0200 | [diff] [blame] | 96 | config DDR_CACHEABLE_SIZE |
| 97 | hex "Size of the DDR marked cacheable in pre-reloc stage" |
| 98 | default 0x10000000 if TFABOOT |
| 99 | default 0x40000000 |
| 100 | help |
| 101 | Define the size of the DDR marked as cacheable in U-Boot |
| 102 | pre-reloc stage. |
| 103 | This option can be useful to avoid speculatif access |
| 104 | to secured area of DDR used by TF-A or OP-TEE before U-Boot |
| 105 | initialization. |
| 106 | The areas marked "no-map" in device tree should be located |
| 107 | before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE. |
| 108 | |
Patrick Delaunay | 11dfd1a | 2018-03-20 10:54:54 +0100 | [diff] [blame] | 109 | config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 |
| 110 | hex "Partition on MMC2 to use to load U-Boot from" |
| 111 | depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION |
| 112 | default 1 |
| 113 | help |
| 114 | Partition on the second MMC to load U-Boot from when the MMC is being |
| 115 | used in raw mode |
| 116 | |
Patrick Delaunay | c60f3b3 | 2019-07-05 17:20:15 +0200 | [diff] [blame] | 117 | config STM32_ETZPC |
| 118 | bool "STM32 Extended TrustZone Protection" |
Patrick Delaunay | 7a02e4d | 2020-03-10 16:05:43 +0100 | [diff] [blame] | 119 | depends on STM32MP15x |
Patrick Delaunay | c60f3b3 | 2019-07-05 17:20:15 +0200 | [diff] [blame] | 120 | default y |
| 121 | help |
| 122 | Say y to enable STM32 Extended TrustZone Protection |
| 123 | |
Patrick Delaunay | 954bd1a | 2020-03-18 09:24:49 +0100 | [diff] [blame] | 124 | config CMD_STM32PROG |
| 125 | bool "command stm32prog for STM32CudeProgrammer" |
| 126 | select DFU |
| 127 | select DFU_RAM |
| 128 | select DFU_VIRT |
Patrick Delaunay | aff4c5d | 2020-03-18 09:24:51 +0100 | [diff] [blame] | 129 | select PARTITION_TYPE_GUID |
| 130 | imply CMD_GPT if MMC |
Patrick Delaunay | eb845d6 | 2020-03-18 09:24:54 +0100 | [diff] [blame] | 131 | imply CMD_MTD if MTD |
Patrick Delaunay | aff4c5d | 2020-03-18 09:24:51 +0100 | [diff] [blame] | 132 | imply DFU_MMC if MMC |
Patrick Delaunay | eb845d6 | 2020-03-18 09:24:54 +0100 | [diff] [blame] | 133 | imply DFU_MTD if MTD |
Patrick Delaunay | 954bd1a | 2020-03-18 09:24:49 +0100 | [diff] [blame] | 134 | help |
| 135 | activate a specific command stm32prog for STM32MP soc family |
| 136 | witch update the device with the tools STM32CubeProgrammer, |
| 137 | using UART with STM32 protocol or USB with DFU protocol |
| 138 | NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based |
| 139 | on U-Boot DFU framework |
| 140 | |
Patrick Delaunay | f4cb5d6 | 2019-07-05 17:20:17 +0200 | [diff] [blame] | 141 | config CMD_STM32KEY |
| 142 | bool "command stm32key to fuse public key hash" |
| 143 | default y |
Patrick Delaunay | f4cb5d6 | 2019-07-05 17:20:17 +0200 | [diff] [blame] | 144 | help |
| 145 | fuse public key hash in corresponding fuse used to authenticate |
| 146 | binary. |
| 147 | |
Patrick Delaunay | 6755198 | 2019-07-30 19:16:23 +0200 | [diff] [blame] | 148 | config PRE_CON_BUF_ADDR |
| 149 | default 0xC02FF000 |
| 150 | |
| 151 | config PRE_CON_BUF_SZ |
| 152 | default 4096 |
| 153 | |
Patrick Delaunay | 27a986d | 2019-04-18 17:32:47 +0200 | [diff] [blame] | 154 | config BOOTSTAGE_STASH_ADDR |
| 155 | default 0xC3000000 |
| 156 | |
Patrick Delaunay | 3419982 | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 157 | if BOOTCOUNT_LIMIT |
| 158 | config SYS_BOOTCOUNT_SINGLEWORD |
| 159 | default y |
| 160 | |
| 161 | # TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) |
| 162 | config SYS_BOOTCOUNT_ADDR |
| 163 | default 0x5C00A154 |
| 164 | endif |
| 165 | |
Patrick Delaunay | 320d266 | 2018-05-17 14:50:46 +0200 | [diff] [blame] | 166 | if DEBUG_UART |
| 167 | |
| 168 | config DEBUG_UART_BOARD_INIT |
| 169 | default y |
| 170 | |
| 171 | # debug on UART4 by default |
| 172 | config DEBUG_UART_BASE |
| 173 | default 0x40010000 |
| 174 | |
| 175 | # clock source is HSI on reset |
| 176 | config DEBUG_UART_CLOCK |
| 177 | default 64000000 |
| 178 | endif |
| 179 | |
Patrick Delaunay | 45ccdb6 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 180 | source "board/st/stm32mp1/Kconfig" |
Marek Vasut | 1995373 | 2020-01-24 18:39:16 +0100 | [diff] [blame] | 181 | source "board/dhelectronics/dh_stm32mp1/Kconfig" |
Patrick Delaunay | 45ccdb6 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 182 | |
Patrick Delaunay | 2514c2d | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 183 | endif |