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Tom Rini83d290c2018-05-06 17:58:06 -04001# SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002#
Wolfgang Denkeca3aeb2013-06-21 10:22:36 +02003# (C) Copyright 2000 - 2013
wdenkc6097192002-11-03 00:24:07 +00004# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenkc6097192002-11-03 00:24:07 +00005
6Summary:
7========
8
wdenk24ee89b2002-11-03 17:56:27 +00009This directory contains the source code for U-Boot, a boot loader for
wdenke86e5a02004-10-17 21:12:06 +000010Embedded boards based on PowerPC, ARM, MIPS and several other
11processors, which can be installed in a boot ROM and used to
12initialize and test the hardware or to download and run application
13code.
wdenkc6097192002-11-03 00:24:07 +000014
15The development of U-Boot is closely related to Linux: some parts of
wdenk24ee89b2002-11-03 17:56:27 +000016the source code originate in the Linux source tree, we have some
17header files in common, and special provision has been made to
wdenkc6097192002-11-03 00:24:07 +000018support booting of Linux images.
19
20Some attention has been paid to make this software easily
21configurable and extendable. For instance, all monitor commands are
22implemented with the same call interface, so that it's very easy to
23add new commands. Also, instead of permanently adding rarely used
24code (for instance hardware test utilities) to the monitor, you can
25load and run it dynamically.
26
27
28Status:
29=======
30
31In general, all boards for which a configuration option exists in the
wdenk24ee89b2002-11-03 17:56:27 +000032Makefile have been tested to some extent and can be considered
wdenkc6097192002-11-03 00:24:07 +000033"working". In fact, many of them are used in production systems.
34
Robert P. J. Day7207b362015-12-19 07:16:10 -050035In case of problems see the CHANGELOG file to find out who contributed
36the specific port. In addition, there are various MAINTAINERS files
37scattered throughout the U-Boot source identifying the people or
38companies responsible for various boards and subsystems.
wdenkc6097192002-11-03 00:24:07 +000039
Robert P. J. Day7207b362015-12-19 07:16:10 -050040Note: As of August, 2010, there is no longer a CHANGELOG file in the
41actual U-Boot source tree; however, it can be created dynamically
42from the Git log using:
Robert P. J. Dayadb9d852012-11-14 02:03:20 +000043
44 make CHANGELOG
45
wdenkc6097192002-11-03 00:24:07 +000046
47Where to get help:
48==================
49
wdenk24ee89b2002-11-03 17:56:27 +000050In case you have questions about, problems with or contributions for
Robert P. J. Day7207b362015-12-19 07:16:10 -050051U-Boot, you should send a message to the U-Boot mailing list at
Peter Tyser0c325652008-09-10 09:18:34 -050052<u-boot@lists.denx.de>. There is also an archive of previous traffic
53on the mailing list - please search the archive before asking FAQ's.
54Please see http://lists.denx.de/pipermail/u-boot and
55http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
wdenkc6097192002-11-03 00:24:07 +000056
57
Wolfgang Denk218ca722008-03-26 10:40:12 +010058Where to get source code:
59=========================
60
Robert P. J. Day7207b362015-12-19 07:16:10 -050061The U-Boot source code is maintained in the Git repository at
Wolfgang Denk218ca722008-03-26 10:40:12 +010062git://www.denx.de/git/u-boot.git ; you can browse it online at
63http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
64
65The "snapshot" links on this page allow you to download tarballs of
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020066any version you might be interested in. Official releases are also
Wolfgang Denk218ca722008-03-26 10:40:12 +010067available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
68directory.
69
Anatolij Gustschind4ee7112008-03-26 18:13:33 +010070Pre-built (and tested) images are available from
Wolfgang Denk218ca722008-03-26 10:40:12 +010071ftp://ftp.denx.de/pub/u-boot/images/
72
73
wdenkc6097192002-11-03 00:24:07 +000074Where we come from:
75===================
76
77- start from 8xxrom sources
wdenk24ee89b2002-11-03 17:56:27 +000078- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
wdenkc6097192002-11-03 00:24:07 +000079- clean up code
80- make it easier to add custom boards
81- make it possible to add other [PowerPC] CPUs
82- extend functions, especially:
83 * Provide extended interface to Linux boot loader
84 * S-Record download
85 * network boot
Marcel Ziswiler11ccc332008-07-09 08:17:15 +020086 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
wdenk24ee89b2002-11-03 17:56:27 +000087- create ARMBoot project (http://sourceforge.net/projects/armboot)
wdenkc6097192002-11-03 00:24:07 +000088- add other CPU families (starting with ARM)
wdenk24ee89b2002-11-03 17:56:27 +000089- create U-Boot project (http://sourceforge.net/projects/u-boot)
Magnus Lilja0d28f342008-08-06 19:32:33 +020090- current project page: see http://www.denx.de/wiki/U-Boot
wdenk24ee89b2002-11-03 17:56:27 +000091
92
93Names and Spelling:
94===================
95
96The "official" name of this project is "Das U-Boot". The spelling
97"U-Boot" shall be used in all written text (documentation, comments
98in source files etc.). Example:
99
100 This is the README file for the U-Boot project.
101
102File names etc. shall be based on the string "u-boot". Examples:
103
104 include/asm-ppc/u-boot.h
105
106 #include <asm/u-boot.h>
107
108Variable names, preprocessor constants etc. shall be either based on
109the string "u_boot" or on "U_BOOT". Example:
110
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
wdenkc6097192002-11-03 00:24:07 +0000113
114
wdenk93f19cc2002-12-17 17:55:09 +0000115Versioning:
116===========
117
Thomas Weber360d8832010-09-28 08:06:25 +0200118Starting with the release in October 2008, the names of the releases
119were changed from numerical release numbers without deeper meaning
120into a time stamp based numbering. Regular releases are identified by
121names consisting of the calendar year and month of the release date.
122Additional fields (if present) indicate release candidates or bug fix
123releases in "stable" maintenance trees.
wdenk93f19cc2002-12-17 17:55:09 +0000124
Thomas Weber360d8832010-09-28 08:06:25 +0200125Examples:
Wolfgang Denkc0f40852011-10-26 10:21:21 +0000126 U-Boot v2009.11 - Release November 2009
Thomas Weber360d8832010-09-28 08:06:25 +0200127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
Jelle van der Waa0de21ec2016-10-30 17:30:30 +0100128 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
wdenk93f19cc2002-12-17 17:55:09 +0000129
130
wdenkc6097192002-11-03 00:24:07 +0000131Directory Hierarchy:
132====================
133
Peter Tyser8d321b82010-04-12 22:28:21 -0500134/arch Architecture specific files
Masahiro Yamada6eae68e2014-03-07 18:02:02 +0900135 /arc Files generic to ARC architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500136 /arm Files generic to ARM architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500137 /m68k Files generic to m68k architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500138 /microblaze Files generic to microblaze architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500139 /mips Files generic to MIPS architecture
Macpaul Linafc1ce82011-10-19 20:41:11 +0000140 /nds32 Files generic to NDS32 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500141 /nios2 Files generic to Altera NIOS2 architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400142 /openrisc Files generic to OpenRISC architecture
Stefan Roesea47a12b2010-04-15 16:07:28 +0200143 /powerpc Files generic to PowerPC architecture
Rick Chen3fafced2017-12-26 13:55:59 +0800144 /riscv Files generic to RISC-V architecture
Robert P. J. Day7207b362015-12-19 07:16:10 -0500145 /sandbox Files generic to HW-independent "sandbox"
Peter Tyser8d321b82010-04-12 22:28:21 -0500146 /sh Files generic to SH architecture
Robert P. J. Day33c77312013-09-15 18:34:15 -0400147 /x86 Files generic to x86 architecture
Peter Tyser8d321b82010-04-12 22:28:21 -0500148/api Machine/arch independent API for external apps
149/board Board dependent files
Xu Ziyuan740f7e52016-08-26 19:54:49 +0800150/cmd U-Boot commands functions
Peter Tyser8d321b82010-04-12 22:28:21 -0500151/common Misc architecture independent functions
Robert P. J. Day7207b362015-12-19 07:16:10 -0500152/configs Board default configuration files
Peter Tyser8d321b82010-04-12 22:28:21 -0500153/disk Code for disk drive partition handling
154/doc Documentation (don't expect too much)
155/drivers Commonly used device drivers
Robert P. J. Day33c77312013-09-15 18:34:15 -0400156/dts Contains Makefile for building internal U-Boot fdt.
Peter Tyser8d321b82010-04-12 22:28:21 -0500157/examples Example code for standalone applications, etc.
158/fs Filesystem code (cramfs, ext2, jffs2, etc.)
159/include Header Files
Robert P. J. Day7207b362015-12-19 07:16:10 -0500160/lib Library routines generic to all architectures
161/Licenses Various license files
Peter Tyser8d321b82010-04-12 22:28:21 -0500162/net Networking code
163/post Power On Self Test
Robert P. J. Day7207b362015-12-19 07:16:10 -0500164/scripts Various build scripts and Makefiles
165/test Various unit test files
Peter Tyser8d321b82010-04-12 22:28:21 -0500166/tools Tools to build S-Record or U-Boot images, etc.
wdenkc6097192002-11-03 00:24:07 +0000167
wdenkc6097192002-11-03 00:24:07 +0000168Software Configuration:
169=======================
170
171Configuration is usually done using C preprocessor defines; the
172rationale behind that is to avoid dead code whenever possible.
173
174There are two classes of configuration variables:
175
176* Configuration _OPTIONS_:
177 These are selectable by the user and have names beginning with
178 "CONFIG_".
179
180* Configuration _SETTINGS_:
181 These depend on the hardware etc. and should not be meddled with if
182 you don't know what you're doing; they have names beginning with
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183 "CONFIG_SYS_".
wdenkc6097192002-11-03 00:24:07 +0000184
Robert P. J. Day7207b362015-12-19 07:16:10 -0500185Previously, all configuration was done by hand, which involved creating
186symbolic links and editing configuration files manually. More recently,
187U-Boot has added the Kbuild infrastructure used by the Linux kernel,
188allowing you to use the "make menuconfig" command to configure your
189build.
wdenkc6097192002-11-03 00:24:07 +0000190
191
192Selection of Processor Architecture and Board Type:
193---------------------------------------------------
194
195For all supported boards there are ready-to-use default
Holger Freytherab584d62014-08-04 09:26:05 +0200196configurations available; just type "make <board_name>_defconfig".
wdenkc6097192002-11-03 00:24:07 +0000197
198Example: For a TQM823L module type:
199
200 cd u-boot
Holger Freytherab584d62014-08-04 09:26:05 +0200201 make TQM823L_defconfig
wdenkc6097192002-11-03 00:24:07 +0000202
Robert P. J. Day7207b362015-12-19 07:16:10 -0500203Note: If you're looking for the default configuration file for a board
204you're sure used to be there but is now missing, check the file
205doc/README.scrapyard for a list of no longer supported boards.
wdenkc6097192002-11-03 00:24:07 +0000206
Simon Glass75b3c3a2014-03-22 17:12:59 -0600207Sandbox Environment:
208--------------------
209
210U-Boot can be built natively to run on a Linux host using the 'sandbox'
211board. This allows feature development which is not board- or architecture-
212specific to be undertaken on a native platform. The sandbox is also used to
213run some of U-Boot's tests.
214
Jagannadha Sutradharudu Teki6b1978f2014-08-31 21:19:43 +0530215See board/sandbox/README.sandbox for more details.
Simon Glass75b3c3a2014-03-22 17:12:59 -0600216
217
Simon Glassdb910352015-03-03 08:03:00 -0700218Board Initialisation Flow:
219--------------------------
220
221This is the intended start-up flow for boards. This should apply for both
Robert P. J. Day7207b362015-12-19 07:16:10 -0500222SPL and U-Boot proper (i.e. they both follow the same rules).
Simon Glassdb910352015-03-03 08:03:00 -0700223
Robert P. J. Day7207b362015-12-19 07:16:10 -0500224Note: "SPL" stands for "Secondary Program Loader," which is explained in
225more detail later in this file.
226
227At present, SPL mostly uses a separate code path, but the function names
228and roles of each function are the same. Some boards or architectures
229may not conform to this. At least most ARM boards which use
230CONFIG_SPL_FRAMEWORK conform to this.
231
232Execution typically starts with an architecture-specific (and possibly
233CPU-specific) start.S file, such as:
234
235 - arch/arm/cpu/armv7/start.S
236 - arch/powerpc/cpu/mpc83xx/start.S
237 - arch/mips/cpu/start.S
238
239and so on. From there, three functions are called; the purpose and
240limitations of each of these functions are described below.
Simon Glassdb910352015-03-03 08:03:00 -0700241
242lowlevel_init():
243 - purpose: essential init to permit execution to reach board_init_f()
244 - no global_data or BSS
245 - there is no stack (ARMv7 may have one but it will soon be removed)
246 - must not set up SDRAM or use console
247 - must only do the bare minimum to allow execution to continue to
248 board_init_f()
249 - this is almost never needed
250 - return normally from this function
251
252board_init_f():
253 - purpose: set up the machine ready for running board_init_r():
254 i.e. SDRAM and serial UART
255 - global_data is available
256 - stack is in SRAM
257 - BSS is not available, so you cannot use global/static variables,
258 only stack variables and global_data
259
260 Non-SPL-specific notes:
261 - dram_init() is called to set up DRAM. If already done in SPL this
262 can do nothing
263
264 SPL-specific notes:
265 - you can override the entire board_init_f() function with your own
266 version as needed.
267 - preloader_console_init() can be called here in extremis
268 - should set up SDRAM, and anything needed to make the UART work
269 - these is no need to clear BSS, it will be done by crt0.S
270 - must return normally from this function (don't call board_init_r()
271 directly)
272
273Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
274this point the stack and global_data are relocated to below
275CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
276memory.
277
278board_init_r():
279 - purpose: main execution, common code
280 - global_data is available
281 - SDRAM is available
282 - BSS is available, all static/global variables can be used
283 - execution eventually continues to main_loop()
284
285 Non-SPL-specific notes:
286 - U-Boot is relocated to the top of memory and is now running from
287 there.
288
289 SPL-specific notes:
290 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
291 CONFIG_SPL_STACK_R_ADDR points into SDRAM
292 - preloader_console_init() can be called here - typically this is
Ley Foon Tan0680f1b2017-05-03 17:13:32 +0800293 done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
Simon Glassdb910352015-03-03 08:03:00 -0700294 spl_board_init() function containing this call
295 - loads U-Boot or (in falcon mode) Linux
296
297
298
wdenkc6097192002-11-03 00:24:07 +0000299Configuration Options:
300----------------------
301
302Configuration depends on the combination of board and CPU type; all
303such information is kept in a configuration file
304"include/configs/<board_name>.h".
305
306Example: For a TQM823L module, all configuration settings are in
307"include/configs/TQM823L.h".
308
309
wdenk7f6c2cb2002-11-10 22:06:23 +0000310Many of the options are named exactly as the corresponding Linux
311kernel configuration options. The intention is to make it easier to
312build a config tool - later.
313
Ashish Kumar63b23162017-08-11 11:09:14 +0530314- ARM Platform Bus Type(CCI):
315 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
316 provides full cache coherency between two clusters of multi-core
317 CPUs and I/O coherency for devices and I/O masters
318
319 CONFIG_SYS_FSL_HAS_CCI400
320
321 Defined For SoC that has cache coherent interconnect
322 CCN-400
wdenk7f6c2cb2002-11-10 22:06:23 +0000323
Ashish Kumarc055cee2017-08-18 10:54:36 +0530324 CONFIG_SYS_FSL_HAS_CCN504
325
326 Defined for SoC that has cache coherent interconnect CCN-504
327
wdenkc6097192002-11-03 00:24:07 +0000328The following options need to be configured:
329
Kim Phillips26281142007-08-10 13:28:25 -0500330- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
wdenkc6097192002-11-03 00:24:07 +0000331
Kim Phillips26281142007-08-10 13:28:25 -0500332- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
Wolfgang Denk6ccec442006-10-24 14:42:37 +0200333
Kumar Gala66412c62011-02-18 05:40:54 -0600334- 85xx CPU Options:
York Sunffd06e02012-10-08 07:44:30 +0000335 CONFIG_SYS_PPC64
336
337 Specifies that the core is a 64-bit PowerPC implementation (implements
338 the "64" category of the Power ISA). This is necessary for ePAPR
339 compliance, among other possible reasons.
340
Kumar Gala66412c62011-02-18 05:40:54 -0600341 CONFIG_SYS_FSL_TBCLK_DIV
342
343 Defines the core time base clock divider ratio compared to the
344 system clock. On most PQ3 devices this is 8, on newer QorIQ
345 devices it can be 16 or 32. The ratio varies from SoC to Soc.
346
Kumar Gala8f290842011-05-20 00:39:21 -0500347 CONFIG_SYS_FSL_PCIE_COMPAT
348
349 Defines the string to utilize when trying to match PCIe device
350 tree nodes for the given platform.
351
Scott Wood33eee332012-08-14 10:14:53 +0000352 CONFIG_SYS_FSL_ERRATUM_A004510
353
354 Enables a workaround for erratum A004510. If set,
355 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
356 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
357
358 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
359 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
360
361 Defines one or two SoC revisions (low 8 bits of SVR)
362 for which the A004510 workaround should be applied.
363
364 The rest of SVR is either not relevant to the decision
365 of whether the erratum is present (e.g. p2040 versus
366 p2041) or is implied by the build target, which controls
367 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
368
369 See Freescale App Note 4493 for more information about
370 this erratum.
371
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530372 CONFIG_A003399_NOR_WORKAROUND
373 Enables a workaround for IFC erratum A003399. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800374 required during NOR boot.
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +0530375
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530376 CONFIG_A008044_WORKAROUND
377 Enables a workaround for T1040/T1042 erratum A008044. It is only
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800378 required during NAND boot and valid for Rev 1.0 SoC revision
Prabhakar Kushwaha9f074e62014-10-29 22:33:09 +0530379
Scott Wood33eee332012-08-14 10:14:53 +0000380 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
381
382 This is the value to write into CCSR offset 0x18600
383 according to the A004510 workaround.
384
Priyanka Jain64501c62013-07-02 09:21:04 +0530385 CONFIG_SYS_FSL_DSP_DDR_ADDR
386 This value denotes start offset of DDR memory which is
387 connected exclusively to the DSP cores.
388
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530389 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
390 This value denotes start offset of M2 memory
391 which is directly connected to the DSP core.
392
Priyanka Jain64501c62013-07-02 09:21:04 +0530393 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
394 This value denotes start offset of M3 memory which is directly
395 connected to the DSP core.
396
Priyanka Jain765b0bd2013-04-04 09:31:54 +0530397 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
398 This value denotes start offset of DSP CCSR space.
399
Priyanka Jainb1359912013-12-17 14:25:52 +0530400 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
401 Single Source Clock is clocking mode present in some of FSL SoC's.
402 In this mode, a single differential clock is used to supply
403 clocks to the sysclock, ddrclock and usbclock.
404
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530405 CONFIG_SYS_CPC_REINIT_F
406 This CONFIG is defined when the CPC is configured as SRAM at the
Bin Menga1875592016-02-05 19:30:11 -0800407 time of U-Boot entry and is required to be re-initialized.
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530408
Tang Yuantianaade2002014-04-17 15:33:46 +0800409 CONFIG_DEEP_SLEEP
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800410 Indicates this SoC supports deep sleep feature. If deep sleep is
Tang Yuantianaade2002014-04-17 15:33:46 +0800411 supported, core will start to execute uboot when wakes up.
412
Daniel Schwierzeck6cb461b2012-04-02 02:57:56 +0000413- Generic CPU options:
414 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
415
416 Defines the endianess of the CPU. Implementation of those
417 values is arch specific.
418
York Sun5614e712013-09-30 09:22:09 -0700419 CONFIG_SYS_FSL_DDR
420 Freescale DDR driver in use. This type of DDR controller is
421 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
422 SoCs.
423
424 CONFIG_SYS_FSL_DDR_ADDR
425 Freescale DDR memory-mapped register base.
426
427 CONFIG_SYS_FSL_DDR_EMU
428 Specify emulator support for DDR. Some DDR features such as
429 deskew training are not available.
430
431 CONFIG_SYS_FSL_DDRC_GEN1
432 Freescale DDR1 controller.
433
434 CONFIG_SYS_FSL_DDRC_GEN2
435 Freescale DDR2 controller.
436
437 CONFIG_SYS_FSL_DDRC_GEN3
438 Freescale DDR3 controller.
439
York Sun34e026f2014-03-27 17:54:47 -0700440 CONFIG_SYS_FSL_DDRC_GEN4
441 Freescale DDR4 controller.
442
York Sun9ac4ffb2013-09-30 14:20:51 -0700443 CONFIG_SYS_FSL_DDRC_ARM_GEN3
444 Freescale DDR3 controller for ARM-based SoCs.
445
York Sun5614e712013-09-30 09:22:09 -0700446 CONFIG_SYS_FSL_DDR1
447 Board config to use DDR1. It can be enabled for SoCs with
448 Freescale DDR1 or DDR2 controllers, depending on the board
449 implemetation.
450
451 CONFIG_SYS_FSL_DDR2
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -0400452 Board config to use DDR2. It can be enabled for SoCs with
York Sun5614e712013-09-30 09:22:09 -0700453 Freescale DDR2 or DDR3 controllers, depending on the board
454 implementation.
455
456 CONFIG_SYS_FSL_DDR3
457 Board config to use DDR3. It can be enabled for SoCs with
York Sun34e026f2014-03-27 17:54:47 -0700458 Freescale DDR3 or DDR3L controllers.
459
460 CONFIG_SYS_FSL_DDR3L
461 Board config to use DDR3L. It can be enabled for SoCs with
462 DDR3L controllers.
463
464 CONFIG_SYS_FSL_DDR4
465 Board config to use DDR4. It can be enabled for SoCs with
466 DDR4 controllers.
York Sun5614e712013-09-30 09:22:09 -0700467
Prabhakar Kushwaha1b4175d2014-01-18 12:28:30 +0530468 CONFIG_SYS_FSL_IFC_BE
469 Defines the IFC controller register space as Big Endian
470
471 CONFIG_SYS_FSL_IFC_LE
472 Defines the IFC controller register space as Little Endian
473
Prabhakar Kushwaha1c407072017-02-02 15:01:26 +0530474 CONFIG_SYS_FSL_IFC_CLK_DIV
475 Defines divider of platform clock(clock input to IFC controller).
476
Prabhakar Kushwahaadd63f92017-02-02 15:02:00 +0530477 CONFIG_SYS_FSL_LBC_CLK_DIV
478 Defines divider of platform clock(clock input to eLBC controller).
479
Prabhakar Kushwaha690e4252014-01-13 11:28:04 +0530480 CONFIG_SYS_FSL_PBL_PBI
481 It enables addition of RCW (Power on reset configuration) in built image.
482 Please refer doc/README.pblimage for more details
483
484 CONFIG_SYS_FSL_PBL_RCW
485 It adds PBI(pre-boot instructions) commands in u-boot build image.
486 PBI commands can be used to configure SoC before it starts the execution.
487 Please refer doc/README.pblimage for more details
488
Prabhakar Kushwaha89ad7be2014-04-08 19:13:34 +0530489 CONFIG_SPL_FSL_PBL
490 It adds a target to create boot binary having SPL binary in PBI format
491 concatenated with u-boot binary.
492
York Sun4e5b1bd2014-02-10 13:59:42 -0800493 CONFIG_SYS_FSL_DDR_BE
494 Defines the DDR controller register space as Big Endian
495
496 CONFIG_SYS_FSL_DDR_LE
497 Defines the DDR controller register space as Little Endian
498
York Sun6b9e3092014-02-10 13:59:43 -0800499 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
500 Physical address from the view of DDR controllers. It is the
501 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
502 it could be different for ARM SoCs.
503
York Sun6b1e1252014-02-10 13:59:44 -0800504 CONFIG_SYS_FSL_DDR_INTLV_256B
505 DDR controller interleaving on 256-byte. This is a special
506 interleaving mode, handled by Dickens for Freescale layerscape
507 SoCs with ARM core.
508
York Sun1d71efb2014-08-01 15:51:00 -0700509 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
510 Number of controllers used as main memory.
511
512 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
513 Number of controllers used for other than main memory.
514
Prabhakar Kushwaha44937212015-11-09 16:42:07 +0530515 CONFIG_SYS_FSL_HAS_DP_DDR
516 Defines the SoC has DP-DDR used for DPAA.
517
Ruchika Gupta028dbb82014-09-09 11:50:31 +0530518 CONFIG_SYS_FSL_SEC_BE
519 Defines the SEC controller register space as Big Endian
520
521 CONFIG_SYS_FSL_SEC_LE
522 Defines the SEC controller register space as Little Endian
523
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200524- MIPS CPU options:
525 CONFIG_SYS_INIT_SP_OFFSET
526
527 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
528 pointer. This is needed for the temporary stack before
529 relocation.
530
Daniel Schwierzeck92bbd642011-07-27 13:22:39 +0200531 CONFIG_XWAY_SWAP_BYTES
532
533 Enable compilation of tools/xway-swap-bytes needed for Lantiq
534 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
535 be swapped if a flash programmer is used.
536
Christian Rieschb67d8812012-02-02 00:44:39 +0000537- ARM options:
538 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
539
540 Select high exception vectors of the ARM core, e.g., do not
541 clear the V bit of the c1 register of CP15.
542
York Sun207774b2015-03-20 19:28:08 -0700543 COUNTER_FREQUENCY
544 Generic timer clock source frequency.
545
546 COUNTER_FREQUENCY_REAL
547 Generic timer clock source frequency if the real clock is
548 different from COUNTER_FREQUENCY, and can only be determined
549 at run time.
550
Stephen Warren73c38932015-01-19 16:25:52 -0700551- Tegra SoC options:
552 CONFIG_TEGRA_SUPPORT_NON_SECURE
553
554 Support executing U-Boot in non-secure (NS) mode. Certain
555 impossible actions will be skipped if the CPU is in NS mode,
556 such as ARM architectural timer initialization.
557
wdenk5da627a2003-10-09 20:09:04 +0000558- Linux Kernel Interface:
wdenkc6097192002-11-03 00:24:07 +0000559 CONFIG_CLOCKS_IN_MHZ
560
561 U-Boot stores all clock information in Hz
562 internally. For binary compatibility with older Linux
563 kernels (which expect the clocks passed in the
564 bd_info data to be in MHz) the environment variable
565 "clocks_in_mhz" can be defined so that U-Boot
566 converts clock data to MHZ before passing it to the
567 Linux kernel.
wdenkc6097192002-11-03 00:24:07 +0000568 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
Wolfgang Denk218ca722008-03-26 10:40:12 +0100569 "clocks_in_mhz=1" is automatically included in the
wdenkc6097192002-11-03 00:24:07 +0000570 default environment.
571
wdenk5da627a2003-10-09 20:09:04 +0000572 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
573
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -0800574 When transferring memsize parameter to Linux, some versions
wdenk5da627a2003-10-09 20:09:04 +0000575 expect it to be in bytes, others in MB.
576 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
577
Gerald Van Barenfec6d9e2008-06-03 20:34:45 -0400578 CONFIG_OF_LIBFDT
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200579
580 New kernel versions are expecting firmware settings to be
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400581 passed using flattened device trees (based on open firmware
582 concepts).
583
584 CONFIG_OF_LIBFDT
585 * New libfdt-based support
586 * Adds the "fdt" command
Kim Phillips3bb342f2007-08-10 14:34:14 -0500587 * The bootm command automatically updates the fdt
Gerald Van Baren213bf8c2007-03-31 12:23:51 -0400588
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200589 OF_TBCLK - The timebase frequency.
Kumar Galac2871f02006-01-11 13:59:02 -0600590 OF_STDOUT_PATH - The path to the console device
Wolfgang Denkf57f70a2005-10-13 01:45:54 +0200591
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200592 boards with QUICC Engines require OF_QE to set UCC MAC
593 addresses
Kim Phillips3bb342f2007-08-10 14:34:14 -0500594
Kumar Gala4e253132006-01-11 13:54:17 -0600595 CONFIG_OF_BOARD_SETUP
596
597 Board code has addition modification that it wants to make
598 to the flat device tree before handing it off to the kernel
wdenk6705d812004-08-02 23:22:59 +0000599
Simon Glassc654b512014-10-23 18:58:54 -0600600 CONFIG_OF_SYSTEM_SETUP
601
602 Other code has addition modification that it wants to make
603 to the flat device tree before handing it off to the kernel.
604 This causes ft_system_setup() to be called before booting
605 the kernel.
606
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200607 CONFIG_OF_IDE_FIXUP
608
609 U-Boot can detect if an IDE device is present or not.
610 If not, and this new config option is activated, U-Boot
611 removes the ATA node from the DTS before booting Linux,
612 so the Linux IDE driver does not probe the device and
613 crash. This is needed for buggy hardware (uc101) where
614 no pull down resistor is connected to the signal IDE5V_DD7.
615
Igor Grinberg7eb29392011-07-14 05:45:07 +0000616 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
617
618 This setting is mandatory for all boards that have only one
619 machine type and must be used to specify the machine type
620 number as it appears in the ARM machine registry
621 (see http://www.arm.linux.org.uk/developer/machines/).
622 Only boards that have multiple machine types supported
623 in a single configuration file and the machine type is
624 runtime discoverable, do not have to use this setting.
625
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100626- vxWorks boot parameters:
627
628 bootvx constructs a valid bootline using the following
Bin Meng9e98b7e2015-10-07 20:19:17 -0700629 environments variables: bootdev, bootfile, ipaddr, netmask,
630 serverip, gatewayip, hostname, othbootargs.
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100631 It loads the vxWorks image pointed bootfile.
632
Niklaus Giger0b2f4ec2008-11-03 22:13:47 +0100633 Note: If a "bootargs" environment is defined, it will overwride
634 the defaults discussed just above.
635
Aneesh V2c451f72011-06-16 23:30:47 +0000636- Cache Configuration:
637 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
638 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
639 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
640
Aneesh V93bc2192011-06-16 23:30:51 +0000641- Cache Configuration for ARM:
642 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
643 controller
644 CONFIG_SYS_PL310_BASE - Physical base address of PL310
645 controller register space
646
wdenk6705d812004-08-02 23:22:59 +0000647- Serial Ports:
Andreas Engel48d01922008-09-08 14:30:53 +0200648 CONFIG_PL010_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000649
650 Define this if you want support for Amba PrimeCell PL010 UARTs.
651
Andreas Engel48d01922008-09-08 14:30:53 +0200652 CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +0000653
654 Define this if you want support for Amba PrimeCell PL011 UARTs.
655
656 CONFIG_PL011_CLOCK
657
658 If you have Amba PrimeCell PL011 UARTs, set this variable to
659 the clock speed of the UARTs.
660
661 CONFIG_PL01x_PORTS
662
663 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
664 define this to a list of base addresses for each (supported)
665 port. See e.g. include/configs/versatile.h
666
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -0400667 CONFIG_SERIAL_HW_FLOW_CONTROL
668
669 Define this variable to enable hw flow control in serial driver.
670 Current user of this option is drivers/serial/nsl16550.c driver
wdenk6705d812004-08-02 23:22:59 +0000671
wdenkc6097192002-11-03 00:24:07 +0000672- Console Baudrate:
673 CONFIG_BAUDRATE - in bps
674 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200675 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000676
wdenkc6097192002-11-03 00:24:07 +0000677- Autoboot Command:
678 CONFIG_BOOTCOMMAND
679 Only needed when CONFIG_BOOTDELAY is enabled;
680 define a command string that is automatically executed
681 when no character is read on the console interface
682 within "Boot Delay" after reset.
683
wdenkc6097192002-11-03 00:24:07 +0000684 CONFIG_RAMBOOT and CONFIG_NFSBOOT
wdenk43d96162003-03-06 00:02:04 +0000685 The value of these goes into the environment as
686 "ramboot" and "nfsboot" respectively, and can be used
687 as a convenience, when switching between booting from
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200688 RAM and NFS.
wdenkc6097192002-11-03 00:24:07 +0000689
wdenkc6097192002-11-03 00:24:07 +0000690- Serial Download Echo Mode:
691 CONFIG_LOADS_ECHO
692 If defined to 1, all characters received during a
693 serial download (using the "loads" command) are
694 echoed back. This might be needed by some terminal
695 emulations (like "cu"), but may as well just take
696 time on others. This setting #define's the initial
697 value of the "loads_echo" environment variable.
698
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500699- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
wdenkc6097192002-11-03 00:24:07 +0000700 CONFIG_KGDB_BAUDRATE
701 Select one of the baudrates listed in
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200702 CONFIG_SYS_BAUDRATE_TABLE, see below.
wdenkc6097192002-11-03 00:24:07 +0000703
Simon Glass302a6482016-03-13 19:07:28 -0600704- Removal of commands
705 If no commands are needed to boot, you can disable
706 CONFIG_CMDLINE to remove them. In this case, the command line
707 will not be available, and when U-Boot wants to execute the
708 boot command (on start-up) it will call board_run_command()
709 instead. This can reduce image size significantly for very
710 simple boot procedures.
711
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000712- Regular expression support:
713 CONFIG_REGEX
Wolfgang Denk93e14592013-10-04 17:43:24 +0200714 If this variable is defined, U-Boot is linked against
715 the SLRE (Super Light Regular Expression) library,
716 which adds regex support to some commands, as for
717 example "env grep" and "setexpr".
Wolfgang Denka5ecbe62013-03-23 23:50:31 +0000718
Simon Glass45ba8072011-10-15 05:48:20 +0000719- Device tree:
720 CONFIG_OF_CONTROL
721 If this variable is defined, U-Boot will use a device tree
722 to configure its devices, instead of relying on statically
723 compiled #defines in the board file. This option is
724 experimental and only available on a few boards. The device
725 tree is available in the global data as gd->fdt_blob.
726
Simon Glass2c0f79e2011-10-24 19:15:31 +0000727 U-Boot needs to get its device tree from somewhere. This can
Alex Deymo82f766d2017-04-02 01:25:20 -0700728 be done using one of the three options below:
Simon Glassbbb0b122011-10-15 05:48:21 +0000729
730 CONFIG_OF_EMBED
731 If this variable is defined, U-Boot will embed a device tree
732 binary in its image. This device tree file should be in the
733 board directory and called <soc>-<board>.dts. The binary file
734 is then picked up in board_init_f() and made available through
Nobuhiro Iwamatsueb3eb602017-08-26 07:34:14 +0900735 the global data structure as gd->fdt_blob.
Simon Glass45ba8072011-10-15 05:48:20 +0000736
Simon Glass2c0f79e2011-10-24 19:15:31 +0000737 CONFIG_OF_SEPARATE
738 If this variable is defined, U-Boot will build a device tree
739 binary. It will be called u-boot.dtb. Architecture-specific
740 code will locate it at run-time. Generally this works by:
741
742 cat u-boot.bin u-boot.dtb >image.bin
743
744 and in fact, U-Boot does this for you, creating a file called
745 u-boot-dtb.bin which is useful in the common case. You can
746 still use the individual files if you need something more
747 exotic.
748
Alex Deymo82f766d2017-04-02 01:25:20 -0700749 CONFIG_OF_BOARD
750 If this variable is defined, U-Boot will use the device tree
751 provided by the board at runtime instead of embedding one with
752 the image. Only boards defining board_fdt_blob_setup() support
753 this option (see include/fdtdec.h file).
754
wdenkc6097192002-11-03 00:24:07 +0000755- Watchdog:
756 CONFIG_WATCHDOG
757 If this variable is defined, it enables watchdog
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000758 support for the SoC. There must be support in the SoC
Christophe Leroy907208c2017-07-06 10:23:22 +0200759 specific code for a watchdog. For the 8xx
760 CPUs, the SIU Watchdog feature is enabled in the SYPCR
761 register. When supported for a specific SoC is
762 available, then no further board specific code should
763 be needed to use it.
Detlev Zundel6abe6fb2011-04-27 05:25:59 +0000764
765 CONFIG_HW_WATCHDOG
766 When using a watchdog circuitry external to the used
767 SoC, then define this variable and provide board
768 specific code for the "hw_watchdog_reset" function.
wdenkc6097192002-11-03 00:24:07 +0000769
770- Real-Time Clock:
771
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500772 When CONFIG_CMD_DATE is selected, the type of the RTC
wdenkc6097192002-11-03 00:24:07 +0000773 has to be selected, too. Define exactly one of the
774 following options:
775
wdenkc6097192002-11-03 00:24:07 +0000776 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
Fabio Estevam4e8b7542011-10-24 06:44:15 +0000777 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
wdenkc6097192002-11-03 00:24:07 +0000778 CONFIG_RTC_MC146818 - use MC146818 RTC
wdenk1cb8e982003-03-06 21:55:29 +0000779 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
wdenkc6097192002-11-03 00:24:07 +0000780 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
wdenk7f70e852003-05-20 14:25:27 +0000781 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
Markus Niebel412921d2014-07-21 11:06:16 +0200782 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
wdenk3bac3512003-03-12 10:41:04 +0000783 CONFIG_RTC_DS164x - use Dallas DS164x RTC
Tor Krill9536dfc2008-03-15 15:40:26 +0100784 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
wdenk4c0d4c32004-06-09 17:34:58 +0000785 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Chris Packham2bd3cab2017-05-30 12:03:33 +1200786 CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Heiko Schocher71d19f32011-03-28 09:24:22 +0200787 CONFIG_SYS_RV3029_TCR - enable trickle charger on
788 RV3029 RTC.
wdenkc6097192002-11-03 00:24:07 +0000789
wdenkb37c7e52003-06-30 16:24:52 +0000790 Note that if the RTC uses I2C, then the I2C interface
791 must also be configured. See I2C Support, below.
792
Peter Tysere92739d2008-12-17 16:36:21 -0600793- GPIO Support:
794 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
Peter Tysere92739d2008-12-17 16:36:21 -0600795
Chris Packham5dec49c2010-12-19 10:12:13 +0000796 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
797 chip-ngpio pairs that tell the PCA953X driver the number of
798 pins supported by a particular chip.
799
Peter Tysere92739d2008-12-17 16:36:21 -0600800 Note that if the GPIO device uses I2C, then the I2C interface
801 must also be configured. See I2C Support, below.
802
Simon Glassaa532332014-06-11 23:29:41 -0600803- I/O tracing:
804 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
805 accesses and can checksum them or write a list of them out
806 to memory. See the 'iotrace' command for details. This is
807 useful for testing device drivers since it can confirm that
808 the driver behaves the same way before and after a code
809 change. Currently this is supported on sandbox and arm. To
810 add support for your architecture, add '#include <iotrace.h>'
811 to the bottom of arch/<arch>/include/asm/io.h and test.
812
813 Example output from the 'iotrace stats' command is below.
814 Note that if the trace buffer is exhausted, the checksum will
815 still continue to operate.
816
817 iotrace is enabled
818 Start: 10000000 (buffer start address)
819 Size: 00010000 (buffer size)
820 Offset: 00000120 (current buffer offset)
821 Output: 10000120 (start + offset)
822 Count: 00000018 (number of trace records)
823 CRC32: 9526fb66 (CRC32 of all trace records)
824
wdenkc6097192002-11-03 00:24:07 +0000825- Timestamp Support:
826
wdenk43d96162003-03-06 00:02:04 +0000827 When CONFIG_TIMESTAMP is selected, the timestamp
828 (date and time) of an image is printed by image
829 commands like bootm or iminfo. This option is
Jon Loeliger602ad3b2007-06-11 19:03:39 -0500830 automatically enabled when you select CONFIG_CMD_DATE .
wdenkc6097192002-11-03 00:24:07 +0000831
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000832- Partition Labels (disklabels) Supported:
833 Zero or more of the following:
834 CONFIG_MAC_PARTITION Apple's MacOS partition table.
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000835 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
836 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
837 bootloader. Note 2TB partition limit; see
838 disk/part_efi.c
Simon Glassc649e3c2016-05-01 11:36:02 -0600839 CONFIG_SCSI) you must configure support for at
Karl O. Pinc923c46f2012-08-16 06:20:15 +0000840 least one non-MTD partition type as well.
wdenkc6097192002-11-03 00:24:07 +0000841
842- IDE Reset method:
wdenk4d13cba2004-03-14 14:09:05 +0000843 CONFIG_IDE_RESET_ROUTINE - this is defined in several
844 board configurations files but used nowhere!
wdenkc6097192002-11-03 00:24:07 +0000845
wdenk4d13cba2004-03-14 14:09:05 +0000846 CONFIG_IDE_RESET - is this is defined, IDE Reset will
847 be performed by calling the function
848 ide_set_reset(int reset)
849 which has to be defined in a board specific file
wdenkc6097192002-11-03 00:24:07 +0000850
851- ATAPI Support:
852 CONFIG_ATAPI
853
854 Set this to enable ATAPI support.
855
wdenkc40b2952004-03-13 23:29:43 +0000856- LBA48 Support
857 CONFIG_LBA48
858
859 Set this to enable support for disks larger than 137GB
Heiko Schocher4b142fe2009-12-03 11:21:21 +0100860 Also look at CONFIG_SYS_64BIT_LBA.
wdenkc40b2952004-03-13 23:29:43 +0000861 Whithout these , LBA48 support uses 32bit variables and will 'only'
862 support disks up to 2.1TB.
863
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200864 CONFIG_SYS_64BIT_LBA:
wdenkc40b2952004-03-13 23:29:43 +0000865 When enabled, makes the IDE subsystem use 64bit sector addresses.
866 Default is 32bit.
867
wdenkc6097192002-11-03 00:24:07 +0000868- SCSI Support:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200869 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
870 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
871 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
wdenkc6097192002-11-03 00:24:07 +0000872 maximum numbers of LUNs, SCSI ID's and target
873 devices.
wdenkc6097192002-11-03 00:24:07 +0000874
Wolfgang Denk93e14592013-10-04 17:43:24 +0200875 The environment variable 'scsidevs' is set to the number of
876 SCSI devices found during the last scan.
Stefan Reinauer447c0312012-10-29 05:23:48 +0000877
wdenkc6097192002-11-03 00:24:07 +0000878- NETWORK Support (PCI):
wdenk682011f2003-06-03 23:54:09 +0000879 CONFIG_E1000
Kyle Moffettce5207e2011-10-18 11:05:29 +0000880 Support for Intel 8254x/8257x gigabit chips.
881
882 CONFIG_E1000_SPI
883 Utility code for direct access to the SPI bus on Intel 8257x.
884 This does not do anything useful unless you set at least one
885 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
886
887 CONFIG_E1000_SPI_GENERIC
888 Allow generic access to the SPI bus on the Intel 8257x, for
889 example with the "sspi" command.
890
wdenkc6097192002-11-03 00:24:07 +0000891 CONFIG_EEPRO100
892 Support for Intel 82557/82559/82559ER chips.
Marcel Ziswiler11ccc332008-07-09 08:17:15 +0200893 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
wdenkc6097192002-11-03 00:24:07 +0000894 write routine for first time initialisation.
895
896 CONFIG_TULIP
897 Support for Digital 2114x chips.
898 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
899 modem chip initialisation (KS8761/QS6611).
900
901 CONFIG_NATSEMI
902 Support for National dp83815 chips.
903
904 CONFIG_NS8382X
905 Support for National dp8382[01] gigabit chips.
906
wdenk45219c42003-05-12 21:50:16 +0000907- NETWORK Support (other):
908
Jens Scharsigc041e9d2010-01-23 12:03:45 +0100909 CONFIG_DRIVER_AT91EMAC
910 Support for AT91RM9200 EMAC.
911
912 CONFIG_RMII
913 Define this to use reduced MII inteface
914
915 CONFIG_DRIVER_AT91EMAC_QUIET
916 If this defined, the driver is quiet.
917 The driver doen't show link status messages.
918
Rob Herringefdd7312011-12-15 11:15:49 +0000919 CONFIG_CALXEDA_XGMAC
920 Support for the Calxeda XGMAC device
921
Ashok3bb46d22012-10-15 06:20:47 +0000922 CONFIG_LAN91C96
wdenk45219c42003-05-12 21:50:16 +0000923 Support for SMSC's LAN91C96 chips.
924
wdenk45219c42003-05-12 21:50:16 +0000925 CONFIG_LAN91C96_USE_32_BIT
926 Define this to enable 32 bit addressing
927
Ashok3bb46d22012-10-15 06:20:47 +0000928 CONFIG_SMC91111
wdenkf39748a2004-06-09 13:37:52 +0000929 Support for SMSC's LAN91C111 chip
930
931 CONFIG_SMC91111_BASE
932 Define this to hold the physical address
933 of the device (I/O space)
934
935 CONFIG_SMC_USE_32_BIT
936 Define this if data bus is 32 bits
937
938 CONFIG_SMC_USE_IOFUNCS
939 Define this to use i/o functions instead of macros
940 (some hardware wont work with macros)
941
Heiko Schocherdc02bad2011-11-15 10:00:04 -0500942 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
943 Define this if you have more then 3 PHYs.
944
Macpaul Linb3dbf4a52010-12-21 16:59:46 +0800945 CONFIG_FTGMAC100
946 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
947
948 CONFIG_FTGMAC100_EGIGA
949 Define this to use GE link update with gigabit PHY.
950 Define this if FTGMAC100 is connected to gigabit PHY.
951 If your system has 10/100 PHY only, it might not occur
952 wrong behavior. Because PHY usually return timeout or
953 useless data when polling gigabit status and gigabit
954 control registers. This behavior won't affect the
955 correctnessof 10/100 link speed update.
956
Yoshihiro Shimoda3d0075f2011-01-27 10:06:03 +0900957 CONFIG_SH_ETHER
958 Support for Renesas on-chip Ethernet controller
959
960 CONFIG_SH_ETHER_USE_PORT
961 Define the number of ports to be used
962
963 CONFIG_SH_ETHER_PHY_ADDR
964 Define the ETH PHY's address
965
Yoshihiro Shimoda68260aa2011-01-27 10:06:08 +0900966 CONFIG_SH_ETHER_CACHE_WRITEBACK
967 If this option is set, the driver enables cache flush.
968
Heiko Schocherb2f97cf2014-07-18 06:07:19 +0200969- PWM Support:
970 CONFIG_PWM_IMX
Robert P. J. Day5052e812016-09-13 08:35:18 -0400971 Support for PWM module on the imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +0200972
Vadim Bendebury5e124722011-10-17 08:36:14 +0000973- TPM Support:
Che-liang Chiou90899cc2013-04-12 11:04:34 +0000974 CONFIG_TPM
975 Support TPM devices.
976
Christophe Ricard0766ad22015-10-06 22:54:41 +0200977 CONFIG_TPM_TIS_INFINEON
978 Support for Infineon i2c bus TPM devices. Only one device
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +0000979 per system is supported at this time.
980
Tom Wai-Hong Tam1b393db2013-04-12 11:04:37 +0000981 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
982 Define the burst count bytes upper limit
983
Christophe Ricard3aa74082016-01-21 23:27:13 +0100984 CONFIG_TPM_ST33ZP24
985 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
986
987 CONFIG_TPM_ST33ZP24_I2C
988 Support for STMicroelectronics ST33ZP24 I2C devices.
989 Requires TPM_ST33ZP24 and I2C.
990
Christophe Ricardb75fdc12016-01-21 23:27:14 +0100991 CONFIG_TPM_ST33ZP24_SPI
992 Support for STMicroelectronics ST33ZP24 SPI devices.
993 Requires TPM_ST33ZP24 and SPI.
994
Dirk Eibachc01939c2013-06-26 15:55:15 +0200995 CONFIG_TPM_ATMEL_TWI
996 Support for Atmel TWI TPM device. Requires I2C support.
997
Che-liang Chiou90899cc2013-04-12 11:04:34 +0000998 CONFIG_TPM_TIS_LPC
Vadim Bendebury5e124722011-10-17 08:36:14 +0000999 Support for generic parallel port TPM devices. Only one device
1000 per system is supported at this time.
1001
1002 CONFIG_TPM_TIS_BASE_ADDRESS
1003 Base address where the generic TPM device is mapped
1004 to. Contemporary x86 systems usually map it at
1005 0xfed40000.
1006
Reinhard Pfaube6c1522013-06-26 15:55:13 +02001007 CONFIG_TPM
1008 Define this to enable the TPM support library which provides
1009 functional interfaces to some TPM commands.
1010 Requires support for a TPM device.
1011
1012 CONFIG_TPM_AUTH_SESSIONS
1013 Define this to enable authorized functions in the TPM library.
1014 Requires CONFIG_TPM and CONFIG_SHA1.
1015
wdenkc6097192002-11-03 00:24:07 +00001016- USB Support:
1017 At the moment only the UHCI host controller is
Heiko Schocher064b55c2017-06-14 05:49:40 +02001018 supported (PIP405, MIP405); define
wdenkc6097192002-11-03 00:24:07 +00001019 CONFIG_USB_UHCI to enable it.
1020 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
wdenk30d56fa2004-10-09 22:44:59 +00001021 and define CONFIG_USB_STORAGE to enable the USB
wdenkc6097192002-11-03 00:24:07 +00001022 storage devices.
1023 Note:
1024 Supported are USB Keyboards and USB Floppy drives
1025 (TEAC FD-05PUB).
wdenk4d13cba2004-03-14 14:09:05 +00001026
Simon Glass9ab4ce22012-02-27 10:52:47 +00001027 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1028 txfilltuning field in the EHCI controller on reset.
1029
Oleksandr Tymoshenko6e9e0622014-02-01 21:51:25 -07001030 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1031 HW module registers.
1032
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001033- USB Device:
1034 Define the below if you wish to use the USB console.
1035 Once firmware is rebuilt from a serial console issue the
1036 command "setenv stdin usbtty; setenv stdout usbtty" and
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001037 attach your USB cable. The Unix command "dmesg" should print
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001038 it has found a new device. The environment variable usbtty
1039 can be set to gserial or cdc_acm to enable your device to
Wolfgang Denk386eda02006-06-14 18:14:56 +02001040 appear to a USB host as a Linux gserial device or a
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001041 Common Device Class Abstract Control Model serial device.
1042 If you select usbtty = gserial you should be able to enumerate
1043 a Linux host by
1044 # modprobe usbserial vendor=0xVendorID product=0xProductID
1045 else if using cdc_acm, simply setting the environment
1046 variable usbtty to be cdc_acm should suffice. The following
1047 might be defined in YourBoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001048
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001049 CONFIG_USB_DEVICE
1050 Define this to build a UDC device
wdenkc6097192002-11-03 00:24:07 +00001051
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001052 CONFIG_USB_TTY
1053 Define this to have a tty type of device available to
1054 talk to the UDC device
Wolfgang Denk386eda02006-06-14 18:14:56 +02001055
Vipin KUMARf9da0f82012-03-26 15:38:06 +05301056 CONFIG_USBD_HS
1057 Define this to enable the high speed support for usb
1058 device and usbtty. If this feature is enabled, a routine
1059 int is_usbd_high_speed(void)
1060 also needs to be defined by the driver to dynamically poll
1061 whether the enumeration has succeded at high speed or full
1062 speed.
1063
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001064 CONFIG_SYS_CONSOLE_IS_IN_ENV
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001065 Define this if you want stdin, stdout &/or stderr to
1066 be set to usbtty.
1067
Wolfgang Denk386eda02006-06-14 18:14:56 +02001068 If you have a USB-IF assigned VendorID then you may wish to
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001069 define your own vendor specific values either in BoardName.h
Wolfgang Denk386eda02006-06-14 18:14:56 +02001070 or directly in usbd_vendor_info.h. If you don't define
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001071 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1072 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1073 should pretend to be a Linux device to it's target host.
1074
1075 CONFIG_USBD_MANUFACTURER
1076 Define this string as the name of your company for
1077 - CONFIG_USBD_MANUFACTURER "my company"
Wolfgang Denk386eda02006-06-14 18:14:56 +02001078
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001079 CONFIG_USBD_PRODUCT_NAME
1080 Define this string as the name of your product
1081 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1082
1083 CONFIG_USBD_VENDORID
1084 Define this as your assigned Vendor ID from the USB
1085 Implementors Forum. This *must* be a genuine Vendor ID
1086 to avoid polluting the USB namespace.
1087 - CONFIG_USBD_VENDORID 0xFFFF
Wolfgang Denk386eda02006-06-14 18:14:56 +02001088
Wolfgang Denk16c8d5e2006-06-14 17:45:53 +02001089 CONFIG_USBD_PRODUCTID
1090 Define this as the unique Product ID
1091 for your device
1092 - CONFIG_USBD_PRODUCTID 0xFFFF
wdenkc6097192002-11-03 00:24:07 +00001093
Igor Grinbergd70a5602011-12-12 12:08:35 +02001094- ULPI Layer Support:
1095 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1096 the generic ULPI layer. The generic layer accesses the ULPI PHY
1097 via the platform viewport, so you need both the genric layer and
1098 the viewport enabled. Currently only Chipidea/ARC based
1099 viewport is supported.
1100 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1101 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
Lucas Stach6d365ea2012-10-01 00:44:35 +02001102 If your ULPI phy needs a different reference clock than the
1103 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1104 the appropriate value in Hz.
wdenkc6097192002-11-03 00:24:07 +00001105
1106- MMC Support:
1107 The MMC controller on the Intel PXA is supported. To
1108 enable this define CONFIG_MMC. The MMC can be
1109 accessed from the boot prompt by mapping the device
1110 to physical memory similar to flash. Command line is
Jon Loeliger602ad3b2007-06-11 19:03:39 -05001111 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1112 the FAT fs. This is enabled with CONFIG_CMD_FAT.
wdenkc6097192002-11-03 00:24:07 +00001113
Yoshihiro Shimodaafb35662011-07-04 22:21:22 +00001114 CONFIG_SH_MMCIF
1115 Support for Renesas on-chip MMCIF controller
1116
1117 CONFIG_SH_MMCIF_ADDR
1118 Define the base address of MMCIF registers
1119
1120 CONFIG_SH_MMCIF_CLK
1121 Define the clock frequency for MMCIF
1122
Pierre Aubert1fd93c62014-04-24 10:30:08 +02001123 CONFIG_SUPPORT_EMMC_BOOT
1124 Enable some additional features of the eMMC boot partitions.
1125
Tom Rinib3ba6e92013-03-14 05:32:47 +00001126- USB Device Firmware Update (DFU) class support:
Marek Vasutbb4059a2018-02-16 16:41:18 +01001127 CONFIG_DFU_OVER_USB
Tom Rinib3ba6e92013-03-14 05:32:47 +00001128 This enables the USB portion of the DFU USB class
1129
Pantelis Antoniouc6631762013-03-14 05:32:52 +00001130 CONFIG_DFU_NAND
1131 This enables support for exposing NAND devices via DFU.
1132
Afzal Mohammeda9479f02013-09-18 01:15:24 +05301133 CONFIG_DFU_RAM
1134 This enables support for exposing RAM via DFU.
1135 Note: DFU spec refer to non-volatile memory usage, but
1136 allow usages beyond the scope of spec - here RAM usage,
1137 one that would help mostly the developer.
1138
Heiko Schochere7e75c72013-06-12 06:05:51 +02001139 CONFIG_SYS_DFU_DATA_BUF_SIZE
1140 Dfu transfer uses a buffer before writing data to the
1141 raw storage device. Make the size (in bytes) of this buffer
1142 configurable. The size of this buffer is also configurable
1143 through the "dfu_bufsiz" environment variable.
1144
Pantelis Antoniouea2453d2013-03-14 05:32:48 +00001145 CONFIG_SYS_DFU_MAX_FILE_SIZE
1146 When updating files rather than the raw storage device,
1147 we use a static buffer to copy the file into and then write
1148 the buffer once we've been given the whole file. Define
1149 this to the maximum filesize (in bytes) for the buffer.
1150 Default is 4 MiB if undefined.
1151
Heiko Schocher001a8312014-03-18 08:09:56 +01001152 DFU_DEFAULT_POLL_TIMEOUT
1153 Poll timeout [ms], is the timeout a device can send to the
1154 host. The host must wait for this timeout before sending
1155 a subsequent DFU_GET_STATUS request to the device.
1156
1157 DFU_MANIFEST_POLL_TIMEOUT
1158 Poll timeout [ms], which the device sends to the host when
1159 entering dfuMANIFEST state. Host waits this timeout, before
1160 sending again an USB request to the device.
1161
wdenk6705d812004-08-02 23:22:59 +00001162- Journaling Flash filesystem support:
Simon Glassb2482df2016-10-02 18:00:59 -06001163 CONFIG_JFFS2_NAND
wdenk6705d812004-08-02 23:22:59 +00001164 Define these for a default partition on a NAND device
1165
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001166 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1167 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
wdenk6705d812004-08-02 23:22:59 +00001168 Define these for a default partition on a NOR device
1169
wdenkc6097192002-11-03 00:24:07 +00001170- Keyboard Support:
Simon Glass39f615e2015-11-11 10:05:47 -07001171 See Kconfig help for available keyboard drivers.
1172
1173 CONFIG_KEYBOARD
1174
1175 Define this to enable a custom keyboard support.
1176 This simply calls drv_keyboard_init() which must be
1177 defined in your board-specific files. This option is deprecated
1178 and is only used by novena. For new boards, use driver model
1179 instead.
wdenkc6097192002-11-03 00:24:07 +00001180
1181- Video support:
Timur Tabi7d3053f2011-02-15 17:09:19 -06001182 CONFIG_FSL_DIU_FB
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02001183 Enable the Freescale DIU video driver. Reference boards for
Timur Tabi7d3053f2011-02-15 17:09:19 -06001184 SOCs that have a DIU should define this macro to enable DIU
1185 support, and should also define these other macros:
1186
1187 CONFIG_SYS_DIU_ADDR
1188 CONFIG_VIDEO
Timur Tabi7d3053f2011-02-15 17:09:19 -06001189 CONFIG_CFB_CONSOLE
1190 CONFIG_VIDEO_SW_CURSOR
1191 CONFIG_VGA_AS_SINGLE_DEVICE
1192 CONFIG_VIDEO_LOGO
1193 CONFIG_VIDEO_BMP_LOGO
1194
Timur Tabiba8e76b2011-04-11 14:18:22 -05001195 The DIU driver will look for the 'video-mode' environment
1196 variable, and if defined, enable the DIU as a console during
Fabio Estevam8eca9432016-04-02 11:53:18 -03001197 boot. See the documentation file doc/README.video for a
Timur Tabiba8e76b2011-04-11 14:18:22 -05001198 description of this variable.
Timur Tabi7d3053f2011-02-15 17:09:19 -06001199
wdenkc6097192002-11-03 00:24:07 +00001200- LCD Support: CONFIG_LCD
1201
1202 Define this to enable LCD support (for output to LCD
1203 display); also select one of the supported displays
1204 by defining one of these:
1205
Stelian Pop39cf4802008-05-09 21:57:18 +02001206 CONFIG_ATMEL_LCD:
1207
1208 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1209
wdenkfd3103b2003-11-25 16:55:19 +00001210 CONFIG_NEC_NL6448AC33:
wdenkc6097192002-11-03 00:24:07 +00001211
wdenkfd3103b2003-11-25 16:55:19 +00001212 NEC NL6448AC33-18. Active, color, single scan.
wdenkc6097192002-11-03 00:24:07 +00001213
wdenkfd3103b2003-11-25 16:55:19 +00001214 CONFIG_NEC_NL6448BC20
wdenkc6097192002-11-03 00:24:07 +00001215
wdenkfd3103b2003-11-25 16:55:19 +00001216 NEC NL6448BC20-08. 6.5", 640x480.
1217 Active, color, single scan.
1218
1219 CONFIG_NEC_NL6448BC33_54
1220
1221 NEC NL6448BC33-54. 10.4", 640x480.
wdenkc6097192002-11-03 00:24:07 +00001222 Active, color, single scan.
1223
1224 CONFIG_SHARP_16x9
1225
1226 Sharp 320x240. Active, color, single scan.
1227 It isn't 16x9, and I am not sure what it is.
1228
1229 CONFIG_SHARP_LQ64D341
1230
1231 Sharp LQ64D341 display, 640x480.
1232 Active, color, single scan.
1233
1234 CONFIG_HLD1045
1235
1236 HLD1045 display, 640x480.
1237 Active, color, single scan.
1238
1239 CONFIG_OPTREX_BW
1240
1241 Optrex CBL50840-2 NF-FW 99 22 M5
1242 or
1243 Hitachi LMG6912RPFC-00T
1244 or
1245 Hitachi SP14Q002
1246
1247 320x240. Black & white.
1248
Simon Glass676d3192012-10-17 13:24:54 +00001249 CONFIG_LCD_ALIGNMENT
1250
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001251 Normally the LCD is page-aligned (typically 4KB). If this is
Simon Glass676d3192012-10-17 13:24:54 +00001252 defined then the LCD will be aligned to this value instead.
1253 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1254 here, since it is cheaper to change data cache settings on
1255 a per-section basis.
1256
1257
Hannes Petermaier604c7d42015-03-27 08:01:38 +01001258 CONFIG_LCD_ROTATION
1259
1260 Sometimes, for example if the display is mounted in portrait
1261 mode or even if it's mounted landscape but rotated by 180degree,
1262 we need to rotate our content of the display relative to the
1263 framebuffer, so that user can read the messages which are
1264 printed out.
1265 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1266 initialized with a given rotation from "vl_rot" out of
1267 "vidinfo_t" which is provided by the board specific code.
1268 The value for vl_rot is coded as following (matching to
1269 fbcon=rotate:<n> linux-kernel commandline):
1270 0 = no rotation respectively 0 degree
1271 1 = 90 degree rotation
1272 2 = 180 degree rotation
1273 3 = 270 degree rotation
1274
1275 If CONFIG_LCD_ROTATION is not defined, the console will be
1276 initialized with 0degree rotation.
1277
Tom Wai-Hong Tam45d7f522012-09-28 15:11:16 +00001278 CONFIG_LCD_BMP_RLE8
1279
1280 Support drawing of RLE8-compressed bitmaps on the LCD.
1281
Tom Wai-Hong Tam735987c2012-12-05 14:46:40 +00001282 CONFIG_I2C_EDID
1283
1284 Enables an 'i2c edid' command which can read EDID
1285 information over I2C from an attached LCD display.
1286
wdenk7152b1d2003-09-05 23:19:14 +00001287- Splash Screen Support: CONFIG_SPLASH_SCREEN
wdenkd791b1d2003-04-20 14:04:18 +00001288
wdenk8bde7f72003-06-27 21:31:46 +00001289 If this option is set, the environment is checked for
1290 a variable "splashimage". If found, the usual display
1291 of logo, copyright and system information on the LCD
wdenke94d2cd2004-06-30 22:59:18 +00001292 is suppressed and the BMP image at the address
wdenk8bde7f72003-06-27 21:31:46 +00001293 specified in "splashimage" is loaded instead. The
1294 console is redirected to the "nulldev", too. This
1295 allows for a "silent" boot where a splash screen is
1296 loaded very quickly after power-on.
wdenkd791b1d2003-04-20 14:04:18 +00001297
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001298 CONFIG_SPLASHIMAGE_GUARD
1299
1300 If this option is set, then U-Boot will prevent the environment
1301 variable "splashimage" from being set to a problematic address
Fabio Estevamab5645f2016-03-23 12:46:12 -03001302 (see doc/README.displaying-bmps).
Nikita Kiryanovc0880482013-02-24 21:28:43 +00001303 This option is useful for targets where, due to alignment
1304 restrictions, an improperly aligned BMP image will cause a data
1305 abort. If you think you will not have problems with unaligned
1306 accesses (for example because your toolchain prevents them)
1307 there is no need to set this option.
1308
Matthias Weisser1ca298c2009-07-09 16:07:30 +02001309 CONFIG_SPLASH_SCREEN_ALIGN
1310
1311 If this option is set the splash image can be freely positioned
1312 on the screen. Environment variable "splashpos" specifies the
1313 position as "x,y". If a positive number is given it is used as
1314 number of pixel from left/top. If a negative number is given it
1315 is used as number of pixel from right/bottom. You can also
1316 specify 'm' for centering the image.
1317
1318 Example:
1319 setenv splashpos m,m
1320 => image at center of screen
1321
1322 setenv splashpos 30,20
1323 => image at x = 30 and y = 20
1324
1325 setenv splashpos -10,m
1326 => vertically centered image
1327 at x = dspWidth - bmpWidth - 9
1328
Stefan Roese98f4a3d2005-09-22 09:04:17 +02001329- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1330
1331 If this option is set, additionally to standard BMP
1332 images, gzipped BMP images can be displayed via the
1333 splashscreen support or the bmp command.
1334
Anatolij Gustschind5011762010-03-15 14:50:25 +01001335- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1336
1337 If this option is set, 8-bit RLE compressed BMP images
1338 can be displayed via the splashscreen support or the
1339 bmp command.
1340
wdenkc29fdfc2003-08-29 20:57:53 +00001341- Compression support:
Kees Cook8ef70472013-08-16 07:59:12 -07001342 CONFIG_GZIP
1343
1344 Enabled by default to support gzip compressed images.
1345
wdenkc29fdfc2003-08-29 20:57:53 +00001346 CONFIG_BZIP2
1347
1348 If this option is set, support for bzip2 compressed
1349 images is included. If not, only uncompressed and gzip
1350 compressed images are supported.
1351
wdenk42d1f032003-10-15 23:53:47 +00001352 NOTE: the bzip2 algorithm requires a lot of RAM, so
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001353 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
wdenk42d1f032003-10-15 23:53:47 +00001354 be at least 4MB.
wdenkd791b1d2003-04-20 14:04:18 +00001355
wdenk17ea1172004-06-06 21:51:03 +00001356- MII/PHY support:
wdenk17ea1172004-06-06 21:51:03 +00001357 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1358
1359 The clock frequency of the MII bus
1360
wdenk17ea1172004-06-06 21:51:03 +00001361 CONFIG_PHY_RESET_DELAY
1362
1363 Some PHY like Intel LXT971A need extra delay after
1364 reset before any MII register access is possible.
1365 For such PHY, set this option to the usec delay
1366 required. (minimum 300usec for LXT971A)
1367
1368 CONFIG_PHY_CMD_DELAY (ppc4xx)
1369
1370 Some PHY like Intel LXT971A need extra delay after
1371 command issued before MII status register can be read
1372
wdenkc6097192002-11-03 00:24:07 +00001373- IP address:
1374 CONFIG_IPADDR
1375
1376 Define a default value for the IP address to use for
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001377 the default Ethernet interface, in case this is not
wdenkc6097192002-11-03 00:24:07 +00001378 determined through e.g. bootp.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001379 (Environment variable "ipaddr")
wdenkc6097192002-11-03 00:24:07 +00001380
1381- Server IP address:
1382 CONFIG_SERVERIP
1383
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001384 Defines a default value for the IP address of a TFTP
wdenkc6097192002-11-03 00:24:07 +00001385 server to contact when using the "tftboot" command.
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001386 (Environment variable "serverip")
wdenkc6097192002-11-03 00:24:07 +00001387
Robin Getz97cfe862009-07-21 12:15:28 -04001388 CONFIG_KEEP_SERVERADDR
1389
1390 Keeps the server's MAC address, in the env 'serveraddr'
1391 for passing to bootargs (like Linux's netconsole option)
1392
Wolfgang Denk1ebcd652011-10-26 10:21:22 +00001393- Gateway IP address:
1394 CONFIG_GATEWAYIP
1395
1396 Defines a default value for the IP address of the
1397 default router where packets to other networks are
1398 sent to.
1399 (Environment variable "gatewayip")
1400
1401- Subnet mask:
1402 CONFIG_NETMASK
1403
1404 Defines a default value for the subnet mask (or
1405 routing prefix) which is used to determine if an IP
1406 address belongs to the local subnet or needs to be
1407 forwarded through a router.
1408 (Environment variable "netmask")
1409
wdenkc6097192002-11-03 00:24:07 +00001410- BOOTP Recovery Mode:
1411 CONFIG_BOOTP_RANDOM_DELAY
1412
1413 If you have many targets in a network that try to
1414 boot using BOOTP, you may want to avoid that all
1415 systems send out BOOTP requests at precisely the same
1416 moment (which would happen for instance at recovery
1417 from a power failure, when all systems will try to
1418 boot, thus flooding the BOOTP server. Defining
1419 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1420 inserted before sending out BOOTP requests. The
Wolfgang Denk6c33c782007-08-06 23:21:05 +02001421 following delays are inserted then:
wdenkc6097192002-11-03 00:24:07 +00001422
1423 1st BOOTP request: delay 0 ... 1 sec
1424 2nd BOOTP request: delay 0 ... 2 sec
1425 3rd BOOTP request: delay 0 ... 4 sec
1426 4th and following
1427 BOOTP requests: delay 0 ... 8 sec
1428
Thierry Reding92ac8ac2014-08-19 10:21:24 +02001429 CONFIG_BOOTP_ID_CACHE_SIZE
1430
1431 BOOTP packets are uniquely identified using a 32-bit ID. The
1432 server will copy the ID from client requests to responses and
1433 U-Boot will use this to determine if it is the destination of
1434 an incoming response. Some servers will check that addresses
1435 aren't in use before handing them out (usually using an ARP
1436 ping) and therefore take up to a few hundred milliseconds to
1437 respond. Network congestion may also influence the time it
1438 takes for a response to make it back to the client. If that
1439 time is too long, U-Boot will retransmit requests. In order
1440 to allow earlier responses to still be accepted after these
1441 retransmissions, U-Boot's BOOTP client keeps a small cache of
1442 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1443 cache. The default is to keep IDs for up to four outstanding
1444 requests. Increasing this will allow U-Boot to accept offers
1445 from a BOOTP client in networks with unusually high latency.
1446
stroesefe389a82003-08-28 14:17:32 +00001447- DHCP Advanced Options:
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001448 You can fine tune the DHCP functionality by defining
1449 CONFIG_BOOTP_* symbols:
stroesefe389a82003-08-28 14:17:32 +00001450
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001451 CONFIG_BOOTP_NISDOMAIN
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001452 CONFIG_BOOTP_BOOTFILESIZE
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001453 CONFIG_BOOTP_SEND_HOSTNAME
1454 CONFIG_BOOTP_NTPSERVER
1455 CONFIG_BOOTP_TIMEOFFSET
1456 CONFIG_BOOTP_VENDOREX
Joe Hershberger2c00e092012-05-23 07:59:19 +00001457 CONFIG_BOOTP_MAY_FAIL
stroesefe389a82003-08-28 14:17:32 +00001458
Wilson Callan5d110f02007-07-28 10:56:13 -04001459 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1460 environment variable, not the BOOTP server.
stroesefe389a82003-08-28 14:17:32 +00001461
Joe Hershberger2c00e092012-05-23 07:59:19 +00001462 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1463 after the configured retry count, the call will fail
1464 instead of starting over. This can be used to fail over
1465 to Link-local IP address configuration if the DHCP server
1466 is not available.
1467
stroesefe389a82003-08-28 14:17:32 +00001468 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1469 to do a dynamic update of a DNS server. To do this, they
1470 need the hostname of the DHCP requester.
Wilson Callan5d110f02007-07-28 10:56:13 -04001471 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
Jon Loeliger1fe80d72007-07-09 22:08:34 -05001472 of the "hostname" environment variable is passed as
1473 option 12 to the DHCP server.
stroesefe389a82003-08-28 14:17:32 +00001474
Aras Vaichasd9a2f412008-03-26 09:43:57 +11001475 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1476
1477 A 32bit value in microseconds for a delay between
1478 receiving a "DHCP Offer" and sending the "DHCP Request".
1479 This fixes a problem with certain DHCP servers that don't
1480 respond 100% of the time to a "DHCP request". E.g. On an
1481 AT91RM9200 processor running at 180MHz, this delay needed
1482 to be *at least* 15,000 usec before a Windows Server 2003
1483 DHCP server would reply 100% of the time. I recommend at
1484 least 50,000 usec to be safe. The alternative is to hope
1485 that one of the retries will be successful but note that
1486 the DHCP timeout and retry process takes a longer than
1487 this delay.
1488
Joe Hershbergerd22c3382012-05-23 08:00:12 +00001489 - Link-local IP address negotiation:
1490 Negotiate with other link-local clients on the local network
1491 for an address that doesn't require explicit configuration.
1492 This is especially useful if a DHCP server cannot be guaranteed
1493 to exist in all environments that the device must operate.
1494
1495 See doc/README.link-local for more information.
1496
Prabhakar Kushwaha24acb832017-11-23 16:51:32 +05301497 - MAC address from environment variables
1498
1499 FDT_SEQ_MACADDR_FROM_ENV
1500
1501 Fix-up device tree with MAC addresses fetched sequentially from
1502 environment variables. This config work on assumption that
1503 non-usable ethernet node of device-tree are either not present
1504 or their status has been marked as "disabled".
1505
wdenka3d991b2004-04-15 21:48:45 +00001506 - CDP Options:
wdenk6e592382004-04-18 17:39:38 +00001507 CONFIG_CDP_DEVICE_ID
wdenka3d991b2004-04-15 21:48:45 +00001508
1509 The device id used in CDP trigger frames.
1510
1511 CONFIG_CDP_DEVICE_ID_PREFIX
1512
1513 A two character string which is prefixed to the MAC address
1514 of the device.
1515
1516 CONFIG_CDP_PORT_ID
1517
1518 A printf format string which contains the ascii name of
1519 the port. Normally is set to "eth%d" which sets
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001520 eth0 for the first Ethernet, eth1 for the second etc.
wdenka3d991b2004-04-15 21:48:45 +00001521
1522 CONFIG_CDP_CAPABILITIES
1523
1524 A 32bit integer which indicates the device capabilities;
1525 0x00000010 for a normal host which does not forwards.
1526
1527 CONFIG_CDP_VERSION
1528
1529 An ascii string containing the version of the software.
1530
1531 CONFIG_CDP_PLATFORM
1532
1533 An ascii string containing the name of the platform.
1534
1535 CONFIG_CDP_TRIGGER
1536
1537 A 32bit integer sent on the trigger.
1538
1539 CONFIG_CDP_POWER_CONSUMPTION
1540
1541 A 16bit integer containing the power consumption of the
1542 device in .1 of milliwatts.
1543
1544 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1545
1546 A byte containing the id of the VLAN.
1547
Uri Mashiach79267ed2017-01-19 10:51:05 +02001548- Status LED: CONFIG_LED_STATUS
wdenkc6097192002-11-03 00:24:07 +00001549
1550 Several configurations allow to display the current
1551 status using a LED. For instance, the LED will blink
1552 fast while running U-Boot code, stop blinking as
1553 soon as a reply to a BOOTP request was received, and
1554 start blinking slow once the Linux kernel is running
1555 (supported by a status LED driver in the Linux
Uri Mashiach79267ed2017-01-19 10:51:05 +02001556 kernel). Defining CONFIG_LED_STATUS enables this
wdenkc6097192002-11-03 00:24:07 +00001557 feature in U-Boot.
1558
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001559 Additional options:
1560
Uri Mashiach79267ed2017-01-19 10:51:05 +02001561 CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001562 The status LED can be connected to a GPIO pin.
1563 In such cases, the gpio_led driver can be used as a
Uri Mashiach79267ed2017-01-19 10:51:05 +02001564 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
Igor Grinberg1df7bbb2013-11-08 01:03:50 +02001565 to include the gpio_led driver in the U-Boot binary.
1566
Igor Grinberg9dfdcdf2013-11-08 01:03:52 +02001567 CONFIG_GPIO_LED_INVERTED_TABLE
1568 Some GPIO connected LEDs may have inverted polarity in which
1569 case the GPIO high value corresponds to LED off state and
1570 GPIO low value corresponds to LED on state.
1571 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
1572 with a list of GPIO LEDs that have inverted polarity.
1573
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001574- I2C Support: CONFIG_SYS_I2C
wdenkc6097192002-11-03 00:24:07 +00001575
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001576 This enable the NEW i2c subsystem, and will allow you to use
1577 i2c commands at the u-boot command line (as long as you set
1578 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
1579 based realtime clock chips or other i2c devices. See
1580 common/cmd_i2c.c for a description of the command line
1581 interface.
1582
1583 ported i2c driver to the new framework:
Heiko Schocherea818db2013-01-29 08:53:15 +01001584 - drivers/i2c/soft_i2c.c:
1585 - activate first bus with CONFIG_SYS_I2C_SOFT define
1586 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
1587 for defining speed and slave address
1588 - activate second bus with I2C_SOFT_DECLARATIONS2 define
1589 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
1590 for defining speed and slave address
1591 - activate third bus with I2C_SOFT_DECLARATIONS3 define
1592 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
1593 for defining speed and slave address
1594 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
1595 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
1596 for defining speed and slave address
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001597
Heiko Schocher00f792e2012-10-24 13:48:22 +02001598 - drivers/i2c/fsl_i2c.c:
1599 - activate i2c driver with CONFIG_SYS_I2C_FSL
1600 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
1601 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
1602 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
1603 bus.
Wolfgang Denk93e14592013-10-04 17:43:24 +02001604 - If your board supports a second fsl i2c bus, define
Heiko Schocher00f792e2012-10-24 13:48:22 +02001605 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
1606 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
1607 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
1608 second bus.
1609
Simon Glass1f2ba722012-10-30 07:28:53 +00001610 - drivers/i2c/tegra_i2c.c:
Nobuhiro Iwamatsu10cee512013-10-11 16:23:53 +09001611 - activate this driver with CONFIG_SYS_I2C_TEGRA
1612 - This driver adds 4 i2c buses with a fix speed from
1613 100000 and the slave addr 0!
Simon Glass1f2ba722012-10-30 07:28:53 +00001614
Dirk Eibach880540d2013-04-25 02:40:01 +00001615 - drivers/i2c/ppc4xx_i2c.c
1616 - activate this driver with CONFIG_SYS_I2C_PPC4XX
1617 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
1618 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
1619
tremfac96402013-09-21 18:13:35 +02001620 - drivers/i2c/i2c_mxc.c
1621 - activate this driver with CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001622 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
1623 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
1624 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
1625 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
tremfac96402013-09-21 18:13:35 +02001626 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
1627 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
1628 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
1629 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
1630 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
1631 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +02001632 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
1633 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001634 If those defines are not set, default value is 100000
tremfac96402013-09-21 18:13:35 +02001635 for speed, and 0 for slave.
1636
Nobuhiro Iwamatsu1086bfa2013-09-27 16:58:30 +09001637 - drivers/i2c/rcar_i2c.c:
1638 - activate this driver with CONFIG_SYS_I2C_RCAR
1639 - This driver adds 4 i2c buses
1640
1641 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
1642 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
1643 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
1644 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
1645 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
1646 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
1647 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
1648 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
1649 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
1650
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001651 - drivers/i2c/sh_i2c.c:
1652 - activate this driver with CONFIG_SYS_I2C_SH
1653 - This driver adds from 2 to 5 i2c buses
1654
1655 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
1656 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
1657 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
1658 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
1659 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
1660 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
1661 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
1662 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
1663 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
1664 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001665 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +09001666
Heiko Schocher6789e842013-10-22 11:03:18 +02001667 - drivers/i2c/omap24xx_i2c.c
1668 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
1669 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
1670 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
1671 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
1672 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
1673 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
1674 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
1675 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
1676 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
1677 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
1678 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
1679
Naveen Krishna Che717fc62013-12-06 12:12:38 +05301680 - drivers/i2c/s3c24x0_i2c.c:
1681 - activate this driver with CONFIG_SYS_I2C_S3C24X0
1682 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
1683 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
1684 with a fix speed from 100000 and the slave addr 0!
1685
Dirk Eibachb46226b2014-07-03 09:28:18 +02001686 - drivers/i2c/ihs_i2c.c
1687 - activate this driver with CONFIG_SYS_I2C_IHS
1688 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
1689 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
1690 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
1691 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
1692 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
1693 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
1694 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
1695 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
1696 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
1697 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
1698 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
1699 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
Dirk Eibach071be892015-10-28 11:46:22 +01001700 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
1701 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
1702 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
1703 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
1704 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
1705 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
1706 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
1707 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
1708 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
Dirk Eibachb46226b2014-07-03 09:28:18 +02001709
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001710 additional defines:
1711
1712 CONFIG_SYS_NUM_I2C_BUSES
Simon Glass945a18e2016-10-02 18:01:05 -06001713 Hold the number of i2c buses you want to use.
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001714
1715 CONFIG_SYS_I2C_DIRECT_BUS
1716 define this, if you don't use i2c muxes on your hardware.
1717 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1718 omit this define.
1719
1720 CONFIG_SYS_I2C_MAX_HOPS
1721 define how many muxes are maximal consecutively connected
1722 on one i2c bus. If you not use i2c muxes, omit this
1723 define.
1724
1725 CONFIG_SYS_I2C_BUSES
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001726 hold a list of buses you want to use, only used if
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001727 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
1728 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
1729 CONFIG_SYS_NUM_I2C_BUSES = 9:
1730
1731 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1732 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1733 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1734 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1735 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1736 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1737 {1, {I2C_NULL_HOP}}, \
1738 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1739 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1740 }
1741
1742 which defines
1743 bus 0 on adapter 0 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001744 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1745 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1746 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1747 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1748 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001749 bus 6 on adapter 1 without a mux
Heiko Schocherea818db2013-01-29 08:53:15 +01001750 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1751 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
Heiko Schocher3f4978c2012-01-16 21:12:24 +00001752
1753 If you do not have i2c muxes on your board, omit this define.
1754
Simon Glassce3b5d62017-05-12 21:10:00 -06001755- Legacy I2C Support:
Heiko Schocherea818db2013-01-29 08:53:15 +01001756 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
wdenkb37c7e52003-06-30 16:24:52 +00001757 then the following macros need to be defined (examples are
1758 from include/configs/lwmon.h):
wdenkc6097192002-11-03 00:24:07 +00001759
1760 I2C_INIT
1761
wdenkb37c7e52003-06-30 16:24:52 +00001762 (Optional). Any commands necessary to enable the I2C
wdenk43d96162003-03-06 00:02:04 +00001763 controller or configure ports.
wdenkc6097192002-11-03 00:24:07 +00001764
wdenkba56f622004-02-06 23:19:44 +00001765 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
wdenkb37c7e52003-06-30 16:24:52 +00001766
wdenkc6097192002-11-03 00:24:07 +00001767 I2C_ACTIVE
1768
1769 The code necessary to make the I2C data line active
1770 (driven). If the data line is open collector, this
1771 define can be null.
1772
wdenkb37c7e52003-06-30 16:24:52 +00001773 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1774
wdenkc6097192002-11-03 00:24:07 +00001775 I2C_TRISTATE
1776
1777 The code necessary to make the I2C data line tri-stated
1778 (inactive). If the data line is open collector, this
1779 define can be null.
1780
wdenkb37c7e52003-06-30 16:24:52 +00001781 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1782
wdenkc6097192002-11-03 00:24:07 +00001783 I2C_READ
1784
York Sun472d5462013-04-01 11:29:11 -07001785 Code that returns true if the I2C data line is high,
1786 false if it is low.
wdenkc6097192002-11-03 00:24:07 +00001787
wdenkb37c7e52003-06-30 16:24:52 +00001788 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1789
wdenkc6097192002-11-03 00:24:07 +00001790 I2C_SDA(bit)
1791
York Sun472d5462013-04-01 11:29:11 -07001792 If <bit> is true, sets the I2C data line high. If it
1793 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001794
wdenkb37c7e52003-06-30 16:24:52 +00001795 eg: #define I2C_SDA(bit) \
wdenk2535d602003-07-17 23:16:40 +00001796 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
wdenkba56f622004-02-06 23:19:44 +00001797 else immr->im_cpm.cp_pbdat &= ~PB_SDA
wdenkb37c7e52003-06-30 16:24:52 +00001798
wdenkc6097192002-11-03 00:24:07 +00001799 I2C_SCL(bit)
1800
York Sun472d5462013-04-01 11:29:11 -07001801 If <bit> is true, sets the I2C clock line high. If it
1802 is false, it clears it (low).
wdenkc6097192002-11-03 00:24:07 +00001803
wdenkb37c7e52003-06-30 16:24:52 +00001804 eg: #define I2C_SCL(bit) \
wdenk2535d602003-07-17 23:16:40 +00001805 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
wdenkba56f622004-02-06 23:19:44 +00001806 else immr->im_cpm.cp_pbdat &= ~PB_SCL
wdenkb37c7e52003-06-30 16:24:52 +00001807
wdenkc6097192002-11-03 00:24:07 +00001808 I2C_DELAY
1809
1810 This delay is invoked four times per clock cycle so this
1811 controls the rate of data transfer. The data rate thus
wdenkb37c7e52003-06-30 16:24:52 +00001812 is 1 / (I2C_DELAY * 4). Often defined to be something
wdenk945af8d2003-07-16 21:53:01 +00001813 like:
1814
wdenkb37c7e52003-06-30 16:24:52 +00001815 #define I2C_DELAY udelay(2)
wdenkc6097192002-11-03 00:24:07 +00001816
Mike Frysinger793b5722010-07-21 13:38:02 -04001817 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1818
1819 If your arch supports the generic GPIO framework (asm/gpio.h),
1820 then you may alternatively define the two GPIOs that are to be
1821 used as SCL / SDA. Any of the previous I2C_xxx macros will
1822 have GPIO-based defaults assigned to them as appropriate.
1823
1824 You should define these to the GPIO value as given directly to
1825 the generic GPIO functions.
1826
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001827 CONFIG_SYS_I2C_INIT_BOARD
wdenk47cd00f2003-03-06 13:39:27 +00001828
wdenk8bde7f72003-06-27 21:31:46 +00001829 When a board is reset during an i2c bus transfer
1830 chips might think that the current transfer is still
1831 in progress. On some boards it is possible to access
1832 the i2c SCLK line directly, either by using the
1833 processor pin as a GPIO or by having a second pin
1834 connected to the bus. If this option is defined a
1835 custom i2c_init_board() routine in boards/xxx/board.c
1836 is run early in the boot sequence.
wdenk47cd00f2003-03-06 13:39:27 +00001837
Ben Warrenbb99ad62006-09-07 16:50:54 -04001838 CONFIG_I2C_MULTI_BUS
1839
1840 This option allows the use of multiple I2C buses, each of which
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001841 must have a controller. At any point in time, only one bus is
1842 active. To switch to a different bus, use the 'i2c dev' command.
Ben Warrenbb99ad62006-09-07 16:50:54 -04001843 Note that bus numbering is zero-based.
1844
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001845 CONFIG_SYS_I2C_NOPROBES
Ben Warrenbb99ad62006-09-07 16:50:54 -04001846
1847 This option specifies a list of I2C devices that will be skipped
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001848 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
Peter Tyser0f89c542009-04-18 22:34:03 -05001849 is set, specify a list of bus-device pairs. Otherwise, specify
1850 a 1D array of device addresses
Ben Warrenbb99ad62006-09-07 16:50:54 -04001851
1852 e.g.
1853 #undef CONFIG_I2C_MULTI_BUS
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001854 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001855
1856 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1857
Wolfgang Denkc0f40852011-10-26 10:21:21 +00001858 #define CONFIG_I2C_MULTI_BUS
Simon Glass945a18e2016-10-02 18:01:05 -06001859 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
Ben Warrenbb99ad62006-09-07 16:50:54 -04001860
1861 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1862
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001863 CONFIG_SYS_SPD_BUS_NUM
Timur Tabibe5e6182006-11-03 19:15:00 -06001864
1865 If defined, then this indicates the I2C bus number for DDR SPD.
1866 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1867
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001868 CONFIG_SYS_RTC_BUS_NUM
Stefan Roese0dc018e2007-02-20 10:51:26 +01001869
1870 If defined, then this indicates the I2C bus number for the RTC.
1871 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1872
Andrew Dyer2ac69852008-12-29 17:36:01 -06001873 CONFIG_SOFT_I2C_READ_REPEATED_START
1874
1875 defining this will force the i2c_read() function in
1876 the soft_i2c driver to perform an I2C repeated start
1877 between writing the address pointer and reading the
1878 data. If this define is omitted the default behaviour
1879 of doing a stop-start sequence will be used. Most I2C
1880 devices can use either method, but some require one or
1881 the other.
Timur Tabibe5e6182006-11-03 19:15:00 -06001882
wdenkc6097192002-11-03 00:24:07 +00001883- SPI Support: CONFIG_SPI
1884
1885 Enables SPI driver (so far only tested with
1886 SPI EEPROM, also an instance works with Crystal A/D and
1887 D/As on the SACSng board)
1888
wdenkc6097192002-11-03 00:24:07 +00001889 CONFIG_SOFT_SPI
1890
wdenk43d96162003-03-06 00:02:04 +00001891 Enables a software (bit-bang) SPI driver rather than
1892 using hardware support. This is a general purpose
1893 driver that only requires three general I/O port pins
1894 (two outputs, one input) to function. If this is
1895 defined, the board configuration must define several
1896 SPI configuration items (port pins to use, etc). For
1897 an example, see include/configs/sacsng.h.
wdenkc6097192002-11-03 00:24:07 +00001898
Heiko Schocherf659b572014-07-14 10:22:11 +02001899 CONFIG_SYS_SPI_MXC_WAIT
1900 Timeout for waiting until spi transfer completed.
1901 default: (CONFIG_SYS_HZ/100) /* 10 ms */
1902
Matthias Fuchs01335022007-12-27 17:12:34 +01001903- FPGA Support: CONFIG_FPGA
1904
1905 Enables FPGA subsystem.
1906
1907 CONFIG_FPGA_<vendor>
1908
1909 Enables support for specific chip vendors.
1910 (ALTERA, XILINX)
1911
1912 CONFIG_FPGA_<family>
1913
1914 Enables support for FPGA family.
1915 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1916
1917 CONFIG_FPGA_COUNT
wdenkc6097192002-11-03 00:24:07 +00001918
wdenk43d96162003-03-06 00:02:04 +00001919 Specify the number of FPGA devices to support.
wdenkc6097192002-11-03 00:24:07 +00001920
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001921 CONFIG_SYS_FPGA_PROG_FEEDBACK
wdenkc6097192002-11-03 00:24:07 +00001922
wdenk8bde7f72003-06-27 21:31:46 +00001923 Enable printing of hash marks during FPGA configuration.
wdenkc6097192002-11-03 00:24:07 +00001924
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001925 CONFIG_SYS_FPGA_CHECK_BUSY
wdenkc6097192002-11-03 00:24:07 +00001926
wdenk43d96162003-03-06 00:02:04 +00001927 Enable checks on FPGA configuration interface busy
1928 status by the configuration function. This option
1929 will require a board or device specific function to
1930 be written.
wdenkc6097192002-11-03 00:24:07 +00001931
1932 CONFIG_FPGA_DELAY
1933
1934 If defined, a function that provides delays in the FPGA
1935 configuration driver.
1936
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001937 CONFIG_SYS_FPGA_CHECK_CTRLC
wdenkc6097192002-11-03 00:24:07 +00001938 Allow Control-C to interrupt FPGA configuration
1939
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001940 CONFIG_SYS_FPGA_CHECK_ERROR
wdenkc6097192002-11-03 00:24:07 +00001941
wdenk43d96162003-03-06 00:02:04 +00001942 Check for configuration errors during FPGA bitfile
1943 loading. For example, abort during Virtex II
1944 configuration if the INIT_B line goes low (which
1945 indicated a CRC error).
wdenkc6097192002-11-03 00:24:07 +00001946
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001947 CONFIG_SYS_FPGA_WAIT_INIT
wdenkc6097192002-11-03 00:24:07 +00001948
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001949 Maximum time to wait for the INIT_B line to de-assert
1950 after PROB_B has been de-asserted during a Virtex II
wdenk43d96162003-03-06 00:02:04 +00001951 FPGA configuration sequence. The default time is 500
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001952 ms.
wdenkc6097192002-11-03 00:24:07 +00001953
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001954 CONFIG_SYS_FPGA_WAIT_BUSY
wdenkc6097192002-11-03 00:24:07 +00001955
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08001956 Maximum time to wait for BUSY to de-assert during
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001957 Virtex II FPGA configuration. The default is 5 ms.
wdenkc6097192002-11-03 00:24:07 +00001958
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001959 CONFIG_SYS_FPGA_WAIT_CONFIG
wdenkc6097192002-11-03 00:24:07 +00001960
wdenk43d96162003-03-06 00:02:04 +00001961 Time to wait after FPGA configuration. The default is
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001962 200 ms.
wdenkc6097192002-11-03 00:24:07 +00001963
1964- Configuration Management:
Stefan Roeseb2b8a692014-10-22 12:13:24 +02001965
wdenkc6097192002-11-03 00:24:07 +00001966 CONFIG_IDENT_STRING
1967
wdenk43d96162003-03-06 00:02:04 +00001968 If defined, this string will be added to the U-Boot
1969 version information (U_BOOT_VERSION)
wdenkc6097192002-11-03 00:24:07 +00001970
1971- Vendor Parameter Protection:
1972
wdenk43d96162003-03-06 00:02:04 +00001973 U-Boot considers the values of the environment
1974 variables "serial#" (Board Serial Number) and
wdenk7152b1d2003-09-05 23:19:14 +00001975 "ethaddr" (Ethernet Address) to be parameters that
wdenk43d96162003-03-06 00:02:04 +00001976 are set once by the board vendor / manufacturer, and
1977 protects these variables from casual modification by
1978 the user. Once set, these variables are read-only,
1979 and write or delete attempts are rejected. You can
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001980 change this behaviour:
wdenkc6097192002-11-03 00:24:07 +00001981
1982 If CONFIG_ENV_OVERWRITE is #defined in your config
1983 file, the write protection for vendor parameters is
wdenk47cd00f2003-03-06 13:39:27 +00001984 completely disabled. Anybody can change or delete
wdenkc6097192002-11-03 00:24:07 +00001985 these parameters.
1986
Joe Hershberger92ac5202015-05-04 14:55:14 -05001987 Alternatively, if you define _both_ an ethaddr in the
1988 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02001989 Ethernet address is installed in the environment,
wdenkc6097192002-11-03 00:24:07 +00001990 which can be changed exactly ONCE by the user. [The
1991 serial# is unaffected by this, i. e. it remains
1992 read-only.]
1993
Joe Hershberger25980902012-12-11 22:16:31 -06001994 The same can be accomplished in a more flexible way
1995 for any variable by configuring the type of access
1996 to allow for those variables in the ".flags" variable
1997 or define CONFIG_ENV_FLAGS_LIST_STATIC.
1998
wdenkc6097192002-11-03 00:24:07 +00001999- Protected RAM:
2000 CONFIG_PRAM
2001
2002 Define this variable to enable the reservation of
2003 "protected RAM", i. e. RAM which is not overwritten
2004 by U-Boot. Define CONFIG_PRAM to hold the number of
2005 kB you want to reserve for pRAM. You can overwrite
2006 this default value by defining an environment
2007 variable "pram" to the number of kB you want to
2008 reserve. Note that the board info structure will
2009 still show the full amount of RAM. If pRAM is
2010 reserved, a new environment variable "mem" will
2011 automatically be defined to hold the amount of
2012 remaining RAM in a form that can be passed as boot
2013 argument to Linux, for instance like that:
2014
Wolfgang Denkfe126d82005-11-20 21:40:11 +01002015 setenv bootargs ... mem=\${mem}
wdenkc6097192002-11-03 00:24:07 +00002016 saveenv
2017
2018 This way you can tell Linux not to use this memory,
2019 either, which results in a memory region that will
2020 not be affected by reboots.
2021
2022 *WARNING* If your board configuration uses automatic
2023 detection of the RAM size, you must make sure that
2024 this memory test is non-destructive. So far, the
2025 following board configurations are known to be
2026 "pRAM-clean":
2027
Heiko Schocher5b8e76c2017-06-07 17:33:09 +02002028 IVMS8, IVML24, SPD8xx,
Wolfgang Denk1b0757e2012-10-24 02:36:15 +00002029 HERMES, IP860, RPXlite, LWMON,
Heiko Schocher2eb48ff2017-06-07 17:33:10 +02002030 FLAGADM
wdenkc6097192002-11-03 00:24:07 +00002031
Gabe Black40fef042012-12-02 04:55:18 +00002032- Access to physical memory region (> 4GB)
2033 Some basic support is provided for operations on memory not
2034 normally accessible to U-Boot - e.g. some architectures
2035 support access to more than 4GB of memory on 32-bit
2036 machines using physical address extension or similar.
2037 Define CONFIG_PHYSMEM to access this basic support, which
2038 currently only supports clearing the memory.
2039
wdenkc6097192002-11-03 00:24:07 +00002040- Error Recovery:
wdenkc6097192002-11-03 00:24:07 +00002041 CONFIG_NET_RETRY_COUNT
2042
wdenk43d96162003-03-06 00:02:04 +00002043 This variable defines the number of retries for
2044 network operations like ARP, RARP, TFTP, or BOOTP
2045 before giving up the operation. If not defined, a
2046 default value of 5 is used.
wdenkc6097192002-11-03 00:24:07 +00002047
Guennadi Liakhovetski40cb90e2008-04-03 17:04:19 +02002048 CONFIG_ARP_TIMEOUT
2049
2050 Timeout waiting for an ARP reply in milliseconds.
2051
Tetsuyuki Kobayashi48a3e992012-07-03 22:25:21 +00002052 CONFIG_NFS_TIMEOUT
2053
2054 Timeout in milliseconds used in NFS protocol.
2055 If you encounter "ERROR: Cannot umount" in nfs command,
2056 try longer timeout such as
2057 #define CONFIG_NFS_TIMEOUT 10000UL
2058
wdenkc6097192002-11-03 00:24:07 +00002059- Command Interpreter:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002060 CONFIG_SYS_PROMPT_HUSH_PS2
wdenkc6097192002-11-03 00:24:07 +00002061
2062 This defines the secondary prompt string, which is
2063 printed when the command interpreter needs more input
2064 to complete a command. Usually "> ".
2065
2066 Note:
2067
wdenk8bde7f72003-06-27 21:31:46 +00002068 In the current implementation, the local variables
2069 space and global environment variables space are
2070 separated. Local variables are those you define by
2071 simply typing `name=value'. To access a local
2072 variable later on, you have write `$name' or
2073 `${name}'; to execute the contents of a variable
2074 directly type `$name' at the command prompt.
wdenkc6097192002-11-03 00:24:07 +00002075
wdenk43d96162003-03-06 00:02:04 +00002076 Global environment variables are those you use
2077 setenv/printenv to work with. To run a command stored
2078 in such a variable, you need to use the run command,
2079 and you must not use the '$' sign to access them.
wdenkc6097192002-11-03 00:24:07 +00002080
2081 To store commands and special characters in a
2082 variable, please use double quotation marks
2083 surrounding the whole text of the variable, instead
2084 of the backslashes before semicolons and special
2085 symbols.
2086
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002087- Command Line Editing and History:
Marek Vasutf3b267b2016-01-27 04:47:55 +01002088 CONFIG_CMDLINE_PS_SUPPORT
2089
2090 Enable support for changing the command prompt string
2091 at run-time. Only static string is supported so far.
2092 The string is obtained from environment variables PS1
2093 and PS2.
2094
wdenka8c7c702003-12-06 19:49:23 +00002095- Default Environment:
wdenkc6097192002-11-03 00:24:07 +00002096 CONFIG_EXTRA_ENV_SETTINGS
2097
wdenk43d96162003-03-06 00:02:04 +00002098 Define this to contain any number of null terminated
2099 strings (variable = value pairs) that will be part of
wdenk7152b1d2003-09-05 23:19:14 +00002100 the default environment compiled into the boot image.
wdenk2262cfe2002-11-18 00:14:45 +00002101
wdenk43d96162003-03-06 00:02:04 +00002102 For example, place something like this in your
2103 board's config file:
wdenkc6097192002-11-03 00:24:07 +00002104
2105 #define CONFIG_EXTRA_ENV_SETTINGS \
2106 "myvar1=value1\0" \
2107 "myvar2=value2\0"
2108
wdenk43d96162003-03-06 00:02:04 +00002109 Warning: This method is based on knowledge about the
2110 internal format how the environment is stored by the
2111 U-Boot code. This is NOT an official, exported
2112 interface! Although it is unlikely that this format
wdenk7152b1d2003-09-05 23:19:14 +00002113 will change soon, there is no guarantee either.
wdenkc6097192002-11-03 00:24:07 +00002114 You better know what you are doing here.
2115
wdenk43d96162003-03-06 00:02:04 +00002116 Note: overly (ab)use of the default environment is
2117 discouraged. Make sure to check other ways to preset
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02002118 the environment like the "source" command or the
wdenk43d96162003-03-06 00:02:04 +00002119 boot command first.
wdenkc6097192002-11-03 00:24:07 +00002120
Simon Glass06fd8532012-11-30 13:01:17 +00002121 CONFIG_DELAY_ENVIRONMENT
2122
2123 Normally the environment is loaded when the board is
Jeremiah Mahlerb445bbb2015-01-04 18:56:50 -08002124 initialised so that it is available to U-Boot. This inhibits
Simon Glass06fd8532012-11-30 13:01:17 +00002125 that so that the environment is not available until
2126 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2127 this is instead controlled by the value of
2128 /config/load-environment.
2129
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002130- TFTP Fixed UDP Port:
2131 CONFIG_TFTP_PORT
2132
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002133 If this is defined, the environment variable tftpsrcp
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002134 is used to supply the TFTP UDP source port value.
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002135 If tftpsrcp isn't defined, the normal pseudo-random port
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002136 number generator is used.
2137
Wolfgang Denk28cb9372005-09-24 23:25:46 +02002138 Also, the environment variable tftpdstp is used to supply
2139 the TFTP UDP destination port value. If tftpdstp isn't
2140 defined, the normal port 69 is used.
2141
2142 The purpose for tftpsrcp is to allow a TFTP server to
Wolfgang Denkecb0ccd2005-09-24 22:37:32 +02002143 blindly start the TFTP transfer using the pre-configured
2144 target IP address and UDP port. This has the effect of
2145 "punching through" the (Windows XP) firewall, allowing
2146 the remainder of the TFTP transfer to proceed normally.
2147 A better solution is to properly configure the firewall,
2148 but sometimes that is not allowed.
2149
wdenka8c7c702003-12-06 19:49:23 +00002150- Show boot progress:
wdenkc6097192002-11-03 00:24:07 +00002151 CONFIG_SHOW_BOOT_PROGRESS
2152
wdenk43d96162003-03-06 00:02:04 +00002153 Defining this option allows to add some board-
2154 specific code (calling a user-provided function
2155 "show_boot_progress(int)") that enables you to show
2156 the system's boot progress on some display (for
2157 example, some LED's) on your board. At the moment,
2158 the following checkpoints are implemented:
wdenkc6097192002-11-03 00:24:07 +00002159
Simon Glass94fd1312012-09-28 08:56:37 +00002160
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002161Legacy uImage format:
2162
wdenkc6097192002-11-03 00:24:07 +00002163 Arg Where When
2164 1 common/cmd_bootm.c before attempting to boot an image
wdenkba56f622004-02-06 23:19:44 +00002165 -1 common/cmd_bootm.c Image header has bad magic number
wdenkc6097192002-11-03 00:24:07 +00002166 2 common/cmd_bootm.c Image header has correct magic number
wdenkba56f622004-02-06 23:19:44 +00002167 -2 common/cmd_bootm.c Image header has bad checksum
wdenkc6097192002-11-03 00:24:07 +00002168 3 common/cmd_bootm.c Image header has correct checksum
wdenkba56f622004-02-06 23:19:44 +00002169 -3 common/cmd_bootm.c Image data has bad checksum
wdenkc6097192002-11-03 00:24:07 +00002170 4 common/cmd_bootm.c Image data has correct checksum
2171 -4 common/cmd_bootm.c Image is for unsupported architecture
2172 5 common/cmd_bootm.c Architecture check OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002173 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
wdenkc6097192002-11-03 00:24:07 +00002174 6 common/cmd_bootm.c Image Type check OK
2175 -6 common/cmd_bootm.c gunzip uncompression error
2176 -7 common/cmd_bootm.c Unimplemented compression type
2177 7 common/cmd_bootm.c Uncompression OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002178 8 common/cmd_bootm.c No uncompress/copy overwrite error
wdenkc6097192002-11-03 00:24:07 +00002179 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002180
2181 9 common/image.c Start initial ramdisk verification
2182 -10 common/image.c Ramdisk header has bad magic number
2183 -11 common/image.c Ramdisk header has bad checksum
2184 10 common/image.c Ramdisk header is OK
2185 -12 common/image.c Ramdisk data has bad checksum
2186 11 common/image.c Ramdisk data has correct checksum
2187 12 common/image.c Ramdisk verification complete, start loading
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002188 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002189 13 common/image.c Start multifile image verification
2190 14 common/image.c No initial ramdisk, no multifile, continue.
2191
Wolfgang Denkc0f40852011-10-26 10:21:21 +00002192 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
wdenkc6097192002-11-03 00:24:07 +00002193
Stefan Roesea47a12b2010-04-15 16:07:28 +02002194 -30 arch/powerpc/lib/board.c Fatal error, hang the system
wdenk11dadd52004-02-27 00:07:27 +00002195 -31 post/post.c POST test failed, detected by post_output_backlog()
2196 -32 post/post.c POST test failed, detected by post_run_single()
wdenk63e73c92004-02-23 22:22:28 +00002197
Heiko Schocher566a4942007-06-22 19:11:54 +02002198 34 common/cmd_doc.c before loading a Image from a DOC device
2199 -35 common/cmd_doc.c Bad usage of "doc" command
2200 35 common/cmd_doc.c correct usage of "doc" command
2201 -36 common/cmd_doc.c No boot device
2202 36 common/cmd_doc.c correct boot device
2203 -37 common/cmd_doc.c Unknown Chip ID on boot device
2204 37 common/cmd_doc.c correct chip ID found, device available
2205 -38 common/cmd_doc.c Read Error on boot device
2206 38 common/cmd_doc.c reading Image header from DOC device OK
2207 -39 common/cmd_doc.c Image header has bad magic number
2208 39 common/cmd_doc.c Image header has correct magic number
2209 -40 common/cmd_doc.c Error reading Image from DOC device
2210 40 common/cmd_doc.c Image header has correct magic number
2211 41 common/cmd_ide.c before loading a Image from a IDE device
2212 -42 common/cmd_ide.c Bad usage of "ide" command
2213 42 common/cmd_ide.c correct usage of "ide" command
2214 -43 common/cmd_ide.c No boot device
2215 43 common/cmd_ide.c boot device found
2216 -44 common/cmd_ide.c Device not available
2217 44 common/cmd_ide.c Device available
2218 -45 common/cmd_ide.c wrong partition selected
2219 45 common/cmd_ide.c partition selected
2220 -46 common/cmd_ide.c Unknown partition table
2221 46 common/cmd_ide.c valid partition table found
2222 -47 common/cmd_ide.c Invalid partition type
2223 47 common/cmd_ide.c correct partition type
2224 -48 common/cmd_ide.c Error reading Image Header on boot device
2225 48 common/cmd_ide.c reading Image Header from IDE device OK
2226 -49 common/cmd_ide.c Image header has bad magic number
2227 49 common/cmd_ide.c Image header has correct magic number
2228 -50 common/cmd_ide.c Image header has bad checksum
2229 50 common/cmd_ide.c Image header has correct checksum
2230 -51 common/cmd_ide.c Error reading Image from IDE device
2231 51 common/cmd_ide.c reading Image from IDE device OK
2232 52 common/cmd_nand.c before loading a Image from a NAND device
2233 -53 common/cmd_nand.c Bad usage of "nand" command
2234 53 common/cmd_nand.c correct usage of "nand" command
2235 -54 common/cmd_nand.c No boot device
2236 54 common/cmd_nand.c boot device found
2237 -55 common/cmd_nand.c Unknown Chip ID on boot device
2238 55 common/cmd_nand.c correct chip ID found, device available
2239 -56 common/cmd_nand.c Error reading Image Header on boot device
2240 56 common/cmd_nand.c reading Image Header from NAND device OK
2241 -57 common/cmd_nand.c Image header has bad magic number
2242 57 common/cmd_nand.c Image header has correct magic number
2243 -58 common/cmd_nand.c Error reading Image from NAND device
2244 58 common/cmd_nand.c reading Image from NAND device OK
wdenkc6097192002-11-03 00:24:07 +00002245
Heiko Schocher566a4942007-06-22 19:11:54 +02002246 -60 common/env_common.c Environment has a bad CRC, using default
wdenkc6097192002-11-03 00:24:07 +00002247
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002248 64 net/eth.c starting with Ethernet configuration.
Heiko Schocher566a4942007-06-22 19:11:54 +02002249 -64 net/eth.c no Ethernet found.
2250 65 net/eth.c Ethernet found.
wdenk206c60c2003-09-18 10:02:25 +00002251
Heiko Schocher566a4942007-06-22 19:11:54 +02002252 -80 common/cmd_net.c usage wrong
Joe Hershbergerbc0571f2015-04-08 01:41:21 -05002253 80 common/cmd_net.c before calling net_loop()
2254 -81 common/cmd_net.c some error in net_loop() occurred
2255 81 common/cmd_net.c net_loop() back without error
Heiko Schocher566a4942007-06-22 19:11:54 +02002256 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
2257 82 common/cmd_net.c trying automatic boot
Wolfgang Denk74de7ae2009-04-01 23:34:12 +02002258 83 common/cmd_net.c running "source" command
2259 -83 common/cmd_net.c some error in automatic boot or "source" command
Heiko Schocher566a4942007-06-22 19:11:54 +02002260 84 common/cmd_net.c end without errors
wdenkc6097192002-11-03 00:24:07 +00002261
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002262FIT uImage format:
2263
2264 Arg Where When
2265 100 common/cmd_bootm.c Kernel FIT Image has correct format
2266 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
2267 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
2268 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
2269 102 common/cmd_bootm.c Kernel unit name specified
2270 -103 common/cmd_bootm.c Can't get kernel subimage node offset
Marian Balakowiczf773bea2008-03-12 10:35:46 +01002271 103 common/cmd_bootm.c Found configuration node
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002272 104 common/cmd_bootm.c Got kernel subimage node offset
2273 -104 common/cmd_bootm.c Kernel subimage hash verification failed
2274 105 common/cmd_bootm.c Kernel subimage hash verification OK
2275 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
2276 106 common/cmd_bootm.c Architecture check OK
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002277 -106 common/cmd_bootm.c Kernel subimage has wrong type
2278 107 common/cmd_bootm.c Kernel subimage type OK
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002279 -107 common/cmd_bootm.c Can't get kernel subimage data/size
2280 108 common/cmd_bootm.c Got kernel subimage data/size
2281 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
2282 -109 common/cmd_bootm.c Can't get kernel subimage type
2283 -110 common/cmd_bootm.c Can't get kernel subimage comp
2284 -111 common/cmd_bootm.c Can't get kernel subimage os
2285 -112 common/cmd_bootm.c Can't get kernel subimage load address
2286 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
2287
2288 120 common/image.c Start initial ramdisk verification
2289 -120 common/image.c Ramdisk FIT image has incorrect format
2290 121 common/image.c Ramdisk FIT image has correct format
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002291 122 common/image.c No ramdisk subimage unit name, using configuration
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002292 -122 common/image.c Can't get configuration for ramdisk subimage
2293 123 common/image.c Ramdisk unit name specified
2294 -124 common/image.c Can't get ramdisk subimage node offset
2295 125 common/image.c Got ramdisk subimage node offset
2296 -125 common/image.c Ramdisk subimage hash verification failed
2297 126 common/image.c Ramdisk subimage hash verification OK
2298 -126 common/image.c Ramdisk subimage for unsupported architecture
2299 127 common/image.c Architecture check OK
2300 -127 common/image.c Can't get ramdisk subimage data/size
2301 128 common/image.c Got ramdisk subimage data/size
2302 129 common/image.c Can't get ramdisk load address
2303 -129 common/image.c Got ramdisk load address
2304
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002305 -130 common/cmd_doc.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002306 131 common/cmd_doc.c FIT image format OK
2307
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002308 -140 common/cmd_ide.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002309 141 common/cmd_ide.c FIT image format OK
2310
Marcel Ziswiler11ccc332008-07-09 08:17:15 +02002311 -150 common/cmd_nand.c Incorrect FIT image format
Marian Balakowicz1372cce2008-03-12 10:33:01 +01002312 151 common/cmd_nand.c FIT image format OK
2313
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002314- Standalone program support:
2315 CONFIG_STANDALONE_LOAD_ADDR
2316
Wolfgang Denk6feff892011-10-09 21:06:34 +02002317 This option defines a board specific value for the
2318 address where standalone program gets loaded, thus
2319 overwriting the architecture dependent default
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002320 settings.
2321
2322- Frame Buffer Address:
2323 CONFIG_FB_ADDR
2324
2325 Define CONFIG_FB_ADDR if you want to use specific
Wolfgang Denk44a53b52013-01-03 00:43:59 +00002326 address for frame buffer. This is typically the case
2327 when using a graphics controller has separate video
2328 memory. U-Boot will then place the frame buffer at
2329 the given address instead of dynamically reserving it
2330 in system RAM by calling lcd_setmem(), which grabs
2331 the memory for the frame buffer depending on the
2332 configured panel size.
Wolfgang Denk4cf26092011-10-07 09:58:21 +02002333
2334 Please see board_init_f function.
2335
Detlev Zundelcccfc2a2009-12-01 17:16:19 +01002336- Automatic software updates via TFTP server
2337 CONFIG_UPDATE_TFTP
2338 CONFIG_UPDATE_TFTP_CNT_MAX
2339 CONFIG_UPDATE_TFTP_MSEC_MAX
2340
2341 These options enable and control the auto-update feature;
2342 for a more detailed description refer to doc/README.update.
2343
2344- MTD Support (mtdparts command, UBI support)
Heiko Schocherff94bc42014-06-24 10:10:04 +02002345 CONFIG_MTD_UBI_WL_THRESHOLD
2346 This parameter defines the maximum difference between the highest
2347 erase counter value and the lowest erase counter value of eraseblocks
2348 of UBI devices. When this threshold is exceeded, UBI starts performing
2349 wear leveling by means of moving data from eraseblock with low erase
2350 counter to eraseblocks with high erase counter.
2351
2352 The default value should be OK for SLC NAND flashes, NOR flashes and
2353 other flashes which have eraseblock life-cycle 100000 or more.
2354 However, in case of MLC NAND flashes which typically have eraseblock
2355 life-cycle less than 10000, the threshold should be lessened (e.g.,
2356 to 128 or 256, although it does not have to be power of 2).
2357
2358 default: 4096
Simon Glassc654b512014-10-23 18:58:54 -06002359
Heiko Schocherff94bc42014-06-24 10:10:04 +02002360 CONFIG_MTD_UBI_BEB_LIMIT
2361 This option specifies the maximum bad physical eraseblocks UBI
2362 expects on the MTD device (per 1024 eraseblocks). If the
2363 underlying flash does not admit of bad eraseblocks (e.g. NOR
2364 flash), this value is ignored.
2365
2366 NAND datasheets often specify the minimum and maximum NVM
2367 (Number of Valid Blocks) for the flashes' endurance lifetime.
2368 The maximum expected bad eraseblocks per 1024 eraseblocks
2369 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
2370 which gives 20 for most NANDs (MaxNVB is basically the total
2371 count of eraseblocks on the chip).
2372
2373 To put it differently, if this value is 20, UBI will try to
2374 reserve about 1.9% of physical eraseblocks for bad blocks
2375 handling. And that will be 1.9% of eraseblocks on the entire
2376 NAND chip, not just the MTD partition UBI attaches. This means
2377 that if you have, say, a NAND flash chip admits maximum 40 bad
2378 eraseblocks, and it is split on two MTD partitions of the same
2379 size, UBI will reserve 40 eraseblocks when attaching a
2380 partition.
2381
2382 default: 20
2383
2384 CONFIG_MTD_UBI_FASTMAP
2385 Fastmap is a mechanism which allows attaching an UBI device
2386 in nearly constant time. Instead of scanning the whole MTD device it
2387 only has to locate a checkpoint (called fastmap) on the device.
2388 The on-flash fastmap contains all information needed to attach
2389 the device. Using fastmap makes only sense on large devices where
2390 attaching by scanning takes long. UBI will not automatically install
2391 a fastmap on old images, but you can set the UBI parameter
2392 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
2393 that fastmap-enabled images are still usable with UBI implementations
2394 without fastmap support. On typical flash devices the whole fastmap
2395 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
2396
2397 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
2398 Set this parameter to enable fastmap automatically on images
2399 without a fastmap.
2400 default: 0
2401
Heiko Schocher0195a7b2015-10-22 06:19:21 +02002402 CONFIG_MTD_UBI_FM_DEBUG
2403 Enable UBI fastmap debug
2404 default: 0
2405
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002406- SPL framework
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02002407 CONFIG_SPL
2408 Enable building of SPL globally.
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002409
Tom Rini95579792012-02-14 07:29:40 +00002410 CONFIG_SPL_LDSCRIPT
2411 LDSCRIPT for linking the SPL binary.
2412
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002413 CONFIG_SPL_MAX_FOOTPRINT
2414 Maximum size in memory allocated to the SPL, BSS included.
2415 When defined, the linker checks that the actual memory
2416 used by SPL from _start to __bss_end does not exceed it.
Albert ARIBAUD8960af82013-04-14 04:48:38 +00002417 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002418 must not be both defined at the same time.
2419
Tom Rini95579792012-02-14 07:29:40 +00002420 CONFIG_SPL_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002421 Maximum size of the SPL image (text, data, rodata, and
2422 linker lists sections), BSS excluded.
2423 When defined, the linker checks that the actual size does
2424 not exceed it.
Tom Rini95579792012-02-14 07:29:40 +00002425
Wolfgang Denk04e5ae72011-09-11 21:24:09 +02002426 CONFIG_SPL_TEXT_BASE
2427 TEXT_BASE for linking the SPL binary.
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002428
Scott Wood94a45bb2012-09-20 19:05:12 -05002429 CONFIG_SPL_RELOC_TEXT_BASE
2430 Address to relocate to. If unspecified, this is equal to
2431 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
2432
Tom Rini95579792012-02-14 07:29:40 +00002433 CONFIG_SPL_BSS_START_ADDR
2434 Link address for the BSS within the SPL binary.
2435
2436 CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002437 Maximum size in memory allocated to the SPL BSS.
2438 When defined, the linker checks that the actual memory used
2439 by SPL from __bss_start to __bss_end does not exceed it.
Albert ARIBAUD8960af82013-04-14 04:48:38 +00002440 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +00002441 must not be both defined at the same time.
Tom Rini95579792012-02-14 07:29:40 +00002442
2443 CONFIG_SPL_STACK
2444 Adress of the start of the stack SPL will use
2445
Albert ARIBAUD \(3ADEV\)8c80eb32015-03-31 11:40:50 +02002446 CONFIG_SPL_PANIC_ON_RAW_IMAGE
2447 When defined, SPL will panic() if the image it has
2448 loaded does not have a signature.
2449 Defining this is useful when code which loads images
2450 in SPL cannot guarantee that absolutely all read errors
2451 will be caught.
2452 An example is the LPC32XX MLC NAND driver, which will
2453 consider that a completely unreadable NAND block is bad,
2454 and thus should be skipped silently.
2455
Scott Wood94a45bb2012-09-20 19:05:12 -05002456 CONFIG_SPL_RELOC_STACK
2457 Adress of the start of the stack SPL will use after
2458 relocation. If unspecified, this is equal to
2459 CONFIG_SPL_STACK.
2460
Tom Rini95579792012-02-14 07:29:40 +00002461 CONFIG_SYS_SPL_MALLOC_START
2462 Starting address of the malloc pool used in SPL.
Fabio Estevam9ac4fc82015-11-12 12:30:19 -02002463 When this option is set the full malloc is used in SPL and
2464 it is set up by spl_init() and before that, the simple malloc()
2465 can be used if CONFIG_SYS_MALLOC_F is defined.
Tom Rini95579792012-02-14 07:29:40 +00002466
2467 CONFIG_SYS_SPL_MALLOC_SIZE
2468 The size of the malloc pool used in SPL.
Daniel Schwierzeck6a11cf42011-07-18 07:48:07 +00002469
Tom Rini9607faf2014-03-28 12:03:39 -04002470 CONFIG_SPL_OS_BOOT
2471 Enable booting directly to an OS from SPL.
2472 See also: doc/README.falcon
2473
Tom Rini861a86f2012-08-13 11:37:56 -07002474 CONFIG_SPL_DISPLAY_PRINT
2475 For ARM, enable an optional function to print more information</